SEMICONDUCTORS
p-n Junction Diode
EXTRINSIC SEMICONDUCTORS
Impure semiconductor
When pure semiconductor material is mixed with small amounts of certain specific
impurities with valency different from that of the parent material, the number
of mobile electrons or holes drastically changes. This process is called doping
ne = nh
ne x nh= ni2 ISC + Impurity
n Type
Intrinsic Pentavalent
semiconductor Impurity
1) Majority charge carriers - electrons
2) Minority charge carriers - holes
3) n type semiconductor is electrically
neutral (not negatively charged )
4) Donor energy level lies just below the
conduction band
Forward biasing
p-side is connected to
higher potential and n-side
to lower potential.
Forward bias opposes
the potential barrier.
In F.B, width of depletion
region decreases.
If the applied potential,
V>VB, a forward current
is set up across the junction.
INTRINSIC SEMICONDUCTORS
Depletion layer
Pure semiconductor Due to diffusion, neutrality
At absolute temperature (0K) of both N and P type semiconductor
conduction band of semiconductor is disturbed
is completely empty and the
semiconductor behaves as an A layer of negatively charged ions
insulator. appear near the junction in the p
Extrinsic SC
As temperature increases, crystals and a layer of positive
the valence electrons acquire ions appear near the Junction in
thermal energy to jump into the n crystals
2 TYPES
conduction band
This layer is called depletion layer
( due to breakage of covalent bond)
p Type
when they leave the CB they leave
behind the deficiency of electrons 1) The thickness of depletion layer is
N type in the valence band. 1 micron = 10-6 m 1
S C Intrinsic
semiconductor + trivalent
Impurity P type SC
This deficency of electrons is
2) Width of depletion layer
Doping
known as HOLES or cotter
B,Al,Ga,In,Tl 3) Depletion is directly proportional
ne=nh=ni to temperature
1) Majority charge carriers - holes 4) The P N junction diode is
2) Minority charge carriers - electrons equivalent to capacitor in which the
3) P type is electrically neutral depletion layer acts as a dielectric
(not positively charged)
4) Acceptor energy level lies just above
the valence band
Barrier potential Diffusion Current-
Due to flow of majority charge carriers
The potential difference created Drift Current -
across the P N junction due to Due to flow of minority charge carriers
diffusion of electron and holes
is called potential barrier
Symbol of p-n P n
For Ge,VB = O.3 V
For Si VB = 0.7V Junction Diode
ELECTRONICS
BIASING BREAKDOWN VOLTAGE
The reverse bias voltage at which breakdown of S.C
Reverse biasing occurs Eg:- Ge 2.5V , Si 3.5V
Zener Breakdown Avalanche breakdown
When reverse bias voltage is At high voltage, more minority
p-side is connected to lower charge carriers are generated
Cut in voltage or knee voltage increased,the electric field at the
potential and n-side to junction also increases. due to breakage of covalent bond
is the voltage at which current higher potential. by collision of electrons
starts to increase rapidly. At some stage, electric field becomes
Width of the depletion Thus more number of charge
It is equal to so high it can break covalent bond at
layer increases. carriers are generated. A chain
VB For Ge VB = 0.3V, the junction creating minority charge
No current flows through reaction is established giving rise
Si VB = 0.7V carriers (e - hole pairs).
the junction to even more collisions, thus
DYNAMIC RESISTANCE due to diffusion of majority carriers. Thus a large no. of charge carriers creating high current.
∆V A small current inthe order of μA exists are generated. This causes a large
Rf = ∆I current flow
due to drift of minority charge carriers.
 1 wave rectification-1 Diode

Input voltage waveform

2 + + Bridge Rectifier
Rectification -
full wave rectification-2 Diodes Rectifies half of the AC wave 4 Diodes & full wave rectification
In Positive half cycle,diode is forward biased Output is taken from diagonal where both
RECTIFICATION
Half wave rectification and output signal is obtained the terminals are same
In Negative half cycle,diode is reverse biased,
output signal is not obtained.
AC Input
Full wave rectification (Unrectified)

It uses a center-tap
Input Voltage

+ + Rectified output

Positive half cycle diode: Filter circuit

- - D₁– forward bias D₂-Reverse
biased Converts rippled DC into pure DC
Rectifier Filter
Negative half cycle, diode: D₁– Using parallel capacitor method or AC Rippled DC Pure DC
+ +
reverse bias D₂-forward biased by series inductor method

SPECIAL PURPOSE DIODES

Zener diode Photodiode Light emitting diode Solar cell

Representation
Heavily doped p-n junction diode
Cannot be damaged by high reverse current
Always operated in reverse biased condition
Can operate continuously without being
damaged
Can be used as a voltage regulator (in the region
of reverse breakdown voltage)
Zener diode as a voltage regulator
λ (A) = 12400
Representation
Representation
Heavily doped;should be connected in
forward biased
Spontaneously converts electrical energy into optical
energy
Recombination of charge carriers at depletion layer
Special type of photo detector Diode is unbiased
results in release of energy in the form of light
Connected in reverse bias Charge carriers are formed by breaking of
Choices of semi conductor material used in LED:
p-n junction is fabricated from a photosensitive covalent bond when light falls on depletion region
conductor & provided with transparent window of visible light ranges from 400-700 nm p side becomes positive n side becomes negative
giving rise to photo voltage
h > Eg, electron hole pairs are generated due to To emit visible light minimum band gap should be
When external load is connected, photocurrent IL
incident light & photo current can be detected 1.8 eV
flows through load
in external circuit Gallium arsenide phosphate (GaAsP) - 1.9 eV
where is maximum value of (Red light)
Gallium arsenide -1.5 eV (Infrared)
O

E ( eV
( wavelength which can be detected by
g
photodiode

Condition for working, V>Vz V=Applied voltage

Vz=Zener voltage
Applied voltage will be divided between zener
diode and series resistance (RS)

ELECTRONICS
Output is obtained from resistance RL which is photocurrent increases with increase
connected parallel to zener
in light intensity
 TRANSISTOR CONFIGURATION OF REALISATION OF BASIC GATES USING
TRANSISTORS 3 COMMON COLLECTOR
NAND OR NOR GATE
+
Voltage
npn pnp source
It is of three types -
USING NAND USING NOR

n p n p n p 1 COMMON EMITTER Input output A Y A Y

AND GATE
NOT

Y=A.A =A Y=A+A =A
Input output Y=A.B

NPN Common Collector A

IT HAS THREE PARTS IB Voltage
+ Input Output
Y A Y
source
Current gain = - A B Y
B
IE OR B
EMITTERS common emitter 0 0 0

0 1 0
C
It is a section on one side of the transistor. RELATIONSHIP BETWEEN 1 0 0
Y=A.B =A+B Y=A+B =A+B
It is moderate in size and heavily doped.

----
-------------------

----

----
It supplies a large number of majority & 1 1 1
B
charge carriers for current to flow through A Y A

----

----
---------
a transistor. RO B Y
IB
E AND B
BASE IC
IE = = Y=A.B =A.B
1+ 1-
RI

Very thin and lightly doped. NOT GATE

Y=A+B =A.B
Input Output
COLLECTOR VEE VCC
A Y BOOLEAN LOGIC
It is on the other side of the transistor. IC
Moderately doped and larger in size as Current gain = 0 1
IB Y=A
compared to the emitter VO ICRO RO A+A=A A+0=A
1 0 A+B=A.B
Voltage gain = = = De-Morgan‛s law
VI I B RI RI A.A=A A.0=0
+
A+1=1 A.B=A+B
TRANSCONDUCTANCE
Voltage

---------------
Pout RO 2 RO source
A.A=0
Power gain = Pg = VgIg = = x =
-
A.1=A
Pin RI RI A+A=1

----

----
I0 Output current
2 COMMON BASE TC=
VI
=
Input voltage

ELECTRONICS
VO I C x Ro NAND GATE
Vg= = = TC x Ro
VI VI
IE=IB+IC
Input output Input Output
TC Vg A B Y
Action of n-p-n Transistor Y=A.B
0 0 1
emitter-base junction - forward biased common base
0 1 1
base-collector junction - reverse biased 1 0 1

IE
LOGIC GATE 1 1 0
Forward bias of emitter-base circuit repels E C IC
the electrons of the emitter towards base
RI RO

Base is very thin and lightly doped, Principal Universal

so very few electrons (less than 5%) are VEE B NOR GATE
VCC gates gates
neutralised. by the holes giving rise to base IB OR,AND,NOT NAND,NOR
current I B
Input Output
Remaining electrons (greater than 95%) are
pulled by the collector which is at higher IC OR GATE Y=A+B
A B Y
potential. Current gain = 0 0 1
IE Input Output
0 1 0
VO ICRO RO A B Y
The electrons are finally collected by the Voltage gain = = = 1 0 0
VI IERI RI 0 0 0
positive terminal of Vcc giving rise to 1 1 0
0 1 1
collector current Ic 2 RO
Power gain = Pg = VgIg = 1 0 1
RI Y=A+B
1 1 1