EDC LAB REPORT #07

AND & OR Gates:

We are designed AND & OR gates using the simple diode (1N4007), which are
commonly used in the ICs computer Electronics.

AND GATE:
The AND gate is a basic digital logic gate that implements logical conjunction ( ) from
mathematical logic – AND gate behaves according to the truth table. A HIGH output (1)
results only if all the inputs to the AND gate are HIGH (1). If not all inputs to the AND gate
are HIGH, LOW output results

OR GATE:
The OR gate is a digital logic gate that implements logical disjunction. The OR gate returns
true if either or both of its inputs are true; otherwise it returns false. The input and output
states are normally represented by different voltage levels.

Apparatus:
• Diode (1N4007)
• Bread board
• DMM
• Connected lead
• Power Supply

AND GATE CIRCUIT:

Procedure

AND GATE:
• In this circuit we used two diode in reverse bias (as shown in fig.) , where a and b are
the inputs(weather is 5v or 0v)
• Their positive terminal are common and connected with the resistor and resistor is
connected with 5v.
• Output is measured across the resistor and 5v supply.
• We measure the value by applying the truth table value and got the expected value of
output.

Calculation:
Input input output
0 0 0
0 5v 0
5v 0 0
5v 5v 5v

OR GATE CIRCUIT:
OR GATE:
• In this circuit we used two diode in Forward bias (as shown in fig.) , where a and b
are the inputs(weather is 5v or 0v)
• Their positive terminal are common and connected with the resistor and resistor is
connected with 5v.
• Output is measured across the resistor and 5v supply.
• We measure the value by applying the truth table value and got the expected value of
output.
• In this case we got the value of 1 (5v) when there are anyone are one or both are one
(5 volts).

CALCULATION:
INPUT INPUT OUTPUT
0 0 0
0 5V 5V
5V 0 5V
5V 5V 5V

At a=5, b=0 & a=0, b=0

Proteus Simulation

AND GATE:
OR GATE:

CONCLUCTION:
In AND gate, when both of its inputs are 1, it will probably produce an output of 1 and this
gate basically performs an AND operation as well as the OR gate, it basically performs an
OR operation. The OR gate gets its name from the fact that it behaves after the fashion of the
logical inclusive "or." The output is "true" if either or both of the inputs are "true." If both
inputs are "false," then the output is "false." In other words, for the output to be 1, at least
input one OR two must be 1.