ED-2002-020 High Speed Mix Analog Input Output Module (4366)

Messung Systems NEXGEN PLC I/O Modules
NEXGEN Series of PLCs

High Speed Mix Analog I/O Module
(Ordering Code – 4366)
Document No.:ED-2002-020
Version: 1.0
Published July 2002
MESSUNG SYSTEMS
EL-2, J- Block MIDC Bhosari,
Pune – 411026.(INDIA)
Tel: (+91)-020-712 0807, 712 2807.

Email : marketing@ms.messung.com
WEB: www.messung.com
High Speed Mix Analog Input Output Module(4366) Published July 2002
Document No.: ED-2002-020/V1.0 Page 1 of 28
EXGEN PLC I/O Modules Messung Systems
Revision
Version Date Description
High Speed Mix Analog I/O Module

1.0 6 October 2003
(Ordering Code – 4366)
Published July 2002 High Speed Mix Analog Input Output Module(4366)
Page 2 of 28 Document No.: ED-2002-020/V1.0
INDEX
1. Module Overview ..............................................................................................................5

1.1 High Speed Mix Analog Module Overview..................................................................5
1.2 LED Indications...........................................................................................................7
1.3 General Specifications ................................................................................................7
2. Module Operation .............................................................................................................8
2.1 Block Diagram.............................................................................................................8
2.2 Input Range ................................................................................................................9
2.3 Output Range............................................................................................................11
2.4 On-Board Processor Operations...............................................................................12
2.4.1 Power On Operations..........................................................................................12
2.4.2 Analog to Digital Conversion...............................................................................13
2.4.3 Digital Filter .........................................................................................................13
2.4.4 Digital to Analog Conversion...............................................................................14
2.5 Module Information ...................................................................................................15
2.5.1 Input Output Image Mapping...............................................................................15
2.5.2 Memory Mapping ................................................................................................16
2.5.3 Module Status Bits ..............................................................................................17
3. Installations and Wiring...................................................................................................18
3.1 Module Installation ....................................................................................................18
3.2 Connection Details....................................................................................................18
3.3 Precautions to be taken ............................................................................................20
4. Configuration and Programming.....................................................................................21
4.1 Slot Configuration .....................................................................................................21
4.2 Data Information to Module.......................................................................................21
4.2.1 Analog Input Channel enable/ disable ................................................................22
4.2.2 Analog Output Channel Data ..............................................................................22
4.2.3 Digital Filter .........................................................................................................23
4.3 Analog Input Channel Data.......................................................................................23
4.4 Module Scan Time ....................................................................................................23
4.5 Programming ............................................................................................................24
INDEX OF FIGURES
Figure 1 : Front View of High Speed Mix Analog Module..........................................................6
Figure 2 : Block diagram of High Speed Mix Analog Module ....................................................8
Figure 3 :Data Range of Analog Input Voltage Signal...............................................................9
Figure 4 :Data Range of Analog Input Current Signal.............................................................10
Figure 5 :Data Range of Analog Output Voltage Signal..........................................................11
Figure 6 :ADC Coversion Cycle ..............................................................................................13
Figure 7 : Digital Filter Action ..................................................................................................14
Figure 8 : Input Output Image Mapping of High Speed Mix Analog Module ...........................15
Figure 9 : Memory Mapping of High Speed Mix Analog Module ............................................16
Figure 10 :Connection diagram of High Speed Mix Analog Module .......................................19
Guidelines for the Safety of the user and protection

of I/O Modules.
This manual provides information for the use of the I/O Modules . The
manual has been written to be used by trained and competent personnel.
The definition of such a person or persons is as follows:
a) Any engineer who is responsible for the planning, design and
construction of automatic equipment using the product associated with
this manual should be of a competent nature, trained and qualified to
the local and national standards required to fulfill that role. These
engineers should be fully aware of all aspects of safety with regards to
automated equipment.
b) Any commissioning or service engineer must be of a competent nature,
trained and qualified to the local and national standards required to
fulfill that job. These engineers should also be trained In the use and
maintenance of the completed product. This Includes being completely
familiar with all associated documentation for the said product. All
maintenance should be carried out in accordance with established
safety practices.
c) All operators of the completed equipment should be trained to use that
product in a safe and coordinated manner in compliance to established
safety practices. The operators should also be familiar with
documentation, which is connected with the actual operation of the
completed equipment.
Note: The term-completed equipment refers to a third party constructed
device, which contains or uses the product associated with this manual.
Note on the Symbol used in this Manual
At various times through out this manual certain symbols will be used to
highlight points of Information, which are Intended to ensure the users
personal safety and protect the integrity of equipment. Whenever any of the
following symbols are encountered it’s associated.
Note must be read and understood. Each of the symbols used is listed
below; with a brief description of its meaning.
Warning !
This product can only function correctly and safely if it is installed

correctly, and maintained as recommended.
Warning !
The specifications of product and contents of manual are subject to

change without notice.
1. Module Overview
This chapter describes the following
• High Speed Mix Analog Module Overview

• LED Indications
• General Specifications
1.1 High Speed Mix Analog Module Overview
This is high speed mix analog module. It provides four differential analog
voltage input channels and two non-isolated analog output channels. Four
differential analog voltage/current inputs are converted into equivalent binary
numbers and for two channels, binary data from CPU module is converted to
equivalent analog voltage output. For analog input, this is sigma delta type
analog to digital conversion where as for analog output. R-2R type of digital
to analog conversion is used. ADC is with 16-bit resolution. DAC is with 12-
bit resolution. Conversion time for ADC is 1 ms per channel. Conversion time
for DAC is 200 µs
The analog range supported is.
Analog input
• 0 to +10 VDC
• 0 to 20 mA
Analog output
• 0 to +10 VDC
The resolution is 312.5 µV/ 625 µA for analog input. The resolution is 2.50
mV for analog output.
This is an intelligent module with on board processor and memory. The data
transfer between CPU module and high speed mix analog module takes
place by 'READ_W' and 'WRITE_W' functions in application program. The
module status is available in input image.
The figure 1 on next page shows front view of high speed mix analog
module.
4366
Terminal Block MIXED ANALOG IO
Fixing Screw 4 IP –2 OP
NO 5 V SUPPLY
01 Module
02 CPU FAULT Status
03 ADC FAULT LEDs
04
05
06
07
08
09
10 CH0
11 CH1
Channel
Front Shield 12 Status
CH2
Plate 13 LEDs
CH3
14
V0 +
15
16
I0 +
17
18
V2 + IO Label
38 Pin COM 0
Removable 19
I2 +
Terminal Block 20
V1 +
21
COM 2
22
I1 +
23
V3 +
24
COM 1
25
I3 +
26
VOUT 1
27
COM 3
28
AG
29
VOUT 2
30
31
AG
32
33
34
FG
35
36
Terminal Block
37
Fixing Screw 38
LED Connection Front Door

Indications Details Label
Figure 1 : Front View of High Speed Mix Analog Module
The module provides LED indications on the front. Brief information about
channel can be written on the front door. Behind front door, 38-pin removable
terminal block is provided for interfacing. The wiring details are shown on
backside of front door.
The high speed mix analog module can be configured in any IO slot of the
PLC. The number of high speed mix analog module is limited by back panel
current capacity. In all, 13 words information per module is available.
1.2 LED Indications
The following table explains significance of LEDs provided on the module.

LED Color Status Description
No 5 V Supply Orange OFF 5 VDC from back plane healthy
ON 5 VDC from back plane not present
CPU Fault Orange OFF CPU watch dog healthy
ON CPU watch dog fault
ADC Fault Orange OFF ADC hardware OK
ON ADC hardware fault
Analog Input Channel Status (4) Green OFF Analog input channel disabled
One for each channel ON Analog Input channel enabled
1.3 General Specifications
General specifications of mix analog module are as given below..

Item Description
Number of analog input channels 4 differential
Conversion Method Sigma Delta
Input voltage 0 to 10 VDC
Input Range 0 to 32000 (Unipolar)
312.5 µV (15 Bits)
Resolution
625 µA (15 Bits)
Conversion time 1 ms per channel
Isolation Channel to channel Nil
Channel to internal circuit 1.5 KV optical
Input impedance for voltage input 1 MΩ
Input impedance for current input 500 Ω
Number of analog output channels 2 non-isolated

Conversion method R – 2R ladder
Output voltage 0 to 10 V DC
Output range 0 to 32000 (Unipolar)
Resolution 2.50 mV (12 bit)
Load resistance > 1 KOhms
Load current 10 mA max.
Output short circuit protection Yes
Maximum conversion time 200 µsec
Isolation Channel to channel Nil
Channel to Internal circuit 1.5 KV optical
Isolation between analog input and output channels Nil
• No 5 VDC supply
• CPU Fault
Indications
• ADC Fault
• Analog input channel status (4)
Back-plane current ( 5 V consumption) 1A*
IO points consumed 8 Input bits and 8 output bits
Termination / Connection Removable 38 pin terminal block
Ordering code 4366
* This module does not require any external power supply.
2. Module Operation
This chapter helps in getting started with high speed mix analog module. It
describes the basic operation of the module. This chapter explains
operational details of:
• Block Diagram
• Input Range
• Output Range
• On-Board Processor Operations
• Module Information
At the time of application program development, the module can be

configured using the programming software DOXMINI+. Refer chapter 4 for
configuration and programming details.
2.1 Block Diagram
Block diagram of high speed mix analog module is shown below.
Channel 0
Watch Analog to
0 to +10 VDC
Dog Digital
Channel 0 0 to 20 mA
+5V
Converter
Input 500 Ω
Circuit
On board O Instrumentation
Processor P Amplifier
T
I Channel 3
C
Channel 0 to +10 VDC
Memory for A
Configuration, L Multiplexer Channel 3 0 to 20 mA
Data, Status Input 500 Ω
Information I Circuit
S
O
L Output 0 Driver
A
T Channel 0
DAC0
I
R-2R
O 0 to +10 VDC
CPU
N Output Signal
Module
Module
Interface
Circuit Output 1 Driver
Channel 1
From DAC1
back R-2R
plane 0 to +10 VDC
Output Signal
+15 V
+ 5 VDC
-15 V Isolated
DC-to-DC Supply for
Converter +5 V
5 V GND Analog Circuit
GND
Figure 2 : Block diagram of High Speed Mix Analog Module
The module provides four analog to digital channels for analog input. CPU
bus is optically isolated from ADC circuit. The enabled channel input signals
are multiplexed and then amplified by differential amplifier for ADC input.
Thus sigma-delta (Σ/ ∆) ADC converts only enabled analog channels to
digital value one by one. On-board processor manipulates the converted
count for each channel. It provides instantaneous as well as filtered channel
data information.
The input channels can be independently enabled or disabled. The analog

input data information is available in dual port RAM on the module. The input
channel selection information is transferred to the module memory using
WRITE_W function in the application program. Similarly data of all channels
can be read by READ_W function in the application program.
The module also provides two digital to analog channels. CPU bus is
optically isolated from DAC circuit. The data from CPU for two channels is
stored in dual port module memory registers. DAC (R–2R type) converts
binary data to an equivalent analog output voltage. The module provides
proportional 0 to + 10 VDC. In output driving stage, presets are provided for
adjustments of gain and offset for each channel. These are factory settings
and should not be tampered.
The module works on 5 VDC supply from back plane. 5 VDC supply is
directly given to digital circuit. Also, DC-to-DC converter generates isolated ±
15 VDC and + 5 VDC as required for analog section. If isolated supply doe
analog section is not available to module, it generates 'No 5 V Supply' signal
for main CPU.
2.2 Input Range
This section describes data ranges as applicable to analog input.
+312.5 µV +10.24 VDC

$1 $ 7FFF
0 VDC
+10 VDC
$0000
$ 7D00
Figure 3 :Data Range of Analog Input Voltage Signal
625 µA 20.48 mA
$1 $ 7FFF
0 VDC
20 mA
$0000
$ 7D00
Figure 4 :Data Range of Analog Input Current Signal
The module provides 15-bit resolution. The figure above shows digital data
and associated input voltage values.
For the range of 0 to +10 V ( 20 mA ), the digital value ranges from 0 to

+32,000.
The resolution is the smallest detectable change in analog signal.
For 0 to +10 V range, the voltage span is 10 V and there can be 32,000 (15
bits) equal steps. Each step corresponds to –
10 V / 32000 = 312.5 µV
Similarly, for 0 to 20 mA range, the current span is 20 mA and there can be

32,000 (15 bits) equal steps. Each step corresponds to –
20 mA / 32000 = 625 µA
The table below shows typical data values in decimal as well as hexadecimal
format and their equivalent voltage values.
Input Voltage Input Current Data Data
Value Value (Decimal) (Hexadecimal)
0 0 0 0
312. 5 µV 625 µA 1 1
1V 2 mA 3200 C80
2V 4 mA 6400 1900
3V 6 mA 9600 2580
4V 8 mA 12800 3200
5V 10 mA 16000 3E80
6V 12 mA 19200 4B00
7V 14 mA 22400 5780
8V 16 mA 25600 6400
9V 18 mA 28800 7080
10 V 20 mA 32000 7D00
10.24 V 20.48 mA 32767 7FFF
2.3 Output Range
This section describes data ranges as applicable to analog voltage output.
+2.5 mV +10.24 VDC

$8 $ 7FFF
0 VDC
+10 VDC
$0000
$ 7D00
Figure 5 :Data Range of Analog Output Voltage Signal

The module provides 12-bit resolution. The figure above shows digital data
and associated output voltage values.
For voltage range of 0 to +10 V, the digital value ranges from 0 to +32,000
for user convenience.
The resolution is the smallest detectable change in analog output signal.
For 0 to +10 V range, the voltage span is 10 V and there can be 4,000 (12
bits) equal steps. Each step corresponds to –
10 V / 4,000 = 2.5 mV
The table below shows typical data values in decimal as well as hexadecimal
format and their equivalent voltage values. Even though resolution is 2.5 mV
( 4000 steps in 0 to 10 VDC ), input range provided is 0 to +32,000 for user
convenience.
Output Data Data
Value (Decimal) (Hexadecimal)
0 0 0
2.5 mV 1 1
1V 3200 C80
2V 6400 1900
3V 9600 2580
4V 12800 3200
5V 16000 3E80
6V 19200 4B00
7V 22400 5780
8V 25600 6400
9V 28800 7080
10 V 32000 7D00
10.24 V 32767 7FFF
2.4 On-Board Processor Operations
The high speed mix analog module is intelligent module with on-board
processor. The functions of on-board processor are explained below.
2.4.1 Power On Operations
After power ON, if isolated supply for analog section is absent then on-board
processor sets Ix.0 bit in input image. After power ON, this processor checks
the hardware called as self test. During self-test, Ix.7 bit is set in case of
watchdog fault and digital section hardware fault. Also ‘CPU Fault’ LED on
front panel is put ON indicating that module is not accessible. Also, during
module operation if digital section hardware is found faulty or watchdog error
is detected, Ix.7 bit is set.
If module CPU section is healthy, Ix.7 bit is cleared. The default values are
loaded for some parameters such as analog input filter values, etc. Module
starts ADC and DAC conversion as per data information available in module
memory. As per input channel selection, module starts sampling and digital
conversion cycle of enabled channels. For more details of IO image of
module, refer chapter 2.4.4. If ‘ADC hardware’ fault is detected, Ix.6 bit in
input image is set and analog input channel data is not updated.
The module continues sampling, converting the channels and updating

module memory even after main CPU is put in STOP mode. But In this case,
CPU module does not read the channel data and status.
For analog output channels, module reads channel binary data from module
memory and converts it to an equivalent analog output voltage. The module
provides proportional 0 to + 10 VDC. In case of ‘ADC Fault’, analog output is
updated as per binary data.
2.4.2 Analog to Digital Conversion
The module samples an analog input channel and converts analog input to
its digital value one by one. After power on, conversion is started for enabled
analog input channels. The disabled are bypassed retaining earlier values.
After one channel conversion, module initiates next channel conversion.
During this conversion period, module processes converted data of previous
channel. The processed data for previous channel is made available during
this period. After converting all healthy channels, processed data of all the
channels is transferred to respective memory area on the module. This cycle
continues. Thus when the processor module performs READ_W operation, it
reads either old or new information i.e. data and status of channels.
Channel Channel Channel Channel

disabled disabled disabled disabled
Channel 0 Channel 1 Channel 2 Channel 3

Conversion Conversion Conversion Conversion
Update all
channel
data
Figure 6 :ADC Coversion Cycle
The module takes certain time to sample all enabled channels and convert
into digital value. The factors affecting module update time is number of
channels enabled. The module update time is minimum when only one
channel is enabled. Likewise the module update time is maximum when all
channels are enabled.
2.4.3 Digital Filter
Module provides analog input channel data as instantaneous value as well

as filtered value. This is a digital filter implemented in software algorithm.
User can set three parameters for the filter, which is applicable for all the four
analog input channels. The significance of three filter parameters is
explained below.
Band 1 is a band within which analog input count is treated as valid analog
input count. Module samples analog input channel in its scan and converts to
equivalent binary count. This ADC cycle is explained in chapter 2.3.2.
Module compares current count with previous count and if current count lies
within ± band 1, then current count is valid count and respective memory
locations are updated accordingly. If current count is crossing the band 1,
then previous count is considered as valid count and respective memory
locations are not updated. As explained in chapter 2.2, for analog input from
0 to 10 V, module provides equivalent 0 to 32,000 counts. If band 1 value is
50, then acceptable band is previous count ± band 1value.
Band 2 parameter comes in picture when current analog input count crosses
band 1. Once current count has crossed the band 1, this changed count is
stored in temporary memory location. Previous count is treated as valid
count. Now current analog input count is compared with band 2. This is to
confirm whether the change in analog input count is a valid change or some
erroneous change due to noise, etc. If current count is within band 2 , then
current count replaces earlier count in temporary location. In this way if
number of successive samples of current count lies within band 2, then only
the change in analog input count is treated as valid and current count is
transferred to respective memory location. Parameter delay count decides for
how many samples the change in analog input count is to be confirmed. If at
any point, current count is again not within band 2, then changed value
replaces earlier count in temporary memory location and again change is
validated for number of samples as defined in parameter delay count. Thus,
once the change in analog input is detected, it is confirmed if number of
samples lies within a band defined as temporary memory location count ±
band 2 value.
The typical response for a step input is shown is figure below.
Temporary Memory
location
Analog input
Band 1
Sampling Instance
Band 1
Module memory location for

analog input channel data
Filtered
Analog input
count
Figure 7 : Digital Filter Action
2.4.4 Digital to Analog Conversion
Once ADC cycle is over, module reads the binary data from respective
memory locations and transfers that data to DAC serially. DAC converts
binary data to equivalent voltage signal. This signal is then amplified by
amplifier. The amplifier stage has presets for adjusting offset and gain. The
output of amplifier is 0 to 10 VDC signal. The presets for offset and gain
adjustments are factory set and should not be tampered.
2.5 Module Information
This section explains the entire information required and available with high
speed analog module. The following points are discussed
Input Output Image Mapping

Memory Mapping
Module Status Bits
2.5.1 Input Output Image Mapping
Input output image mapping related to high speed mix analog module is
shown below.
CPU Module Input Scan High Speed Mix Analog Module

Input Image
Input Image
No
No 55 V
V Supply
Supply Ix.0 Channel 0
Channel 1
Analog
Channel 2 Input
ADC Fault Ix.6
CPU Fault Ix.7 Module
Interface Channel 3
circuit
Logic Scan
Channel 0
IMM_IN Analog
EN ENO
Output
Channel 1
SLOT
• Output image bits are not used
Figure 8 : Input Output Image Mapping of High Speed Mix Analog Module
The module consumes 8 input bits (1 byte) of input image and 8 output bits
(1 byte) of output image in the CPU module. CPU reads the status of module
in input scan. For immediate updation of input image in application program,
IMM_IN functions can be used in application program whenever required.
For the details refer chapter 2.4.4.
2.5.2 Memory Mapping
The memory mapping related to high speed analog module is shown in figure
below.
CPU Module High Speed Mix Analog Module
6 Words 6 Words
Analog input channels enable/disable MW50 WRITE_W Analog input channels enable/disable MMW00
Analog output channel 0 data MW52 EN ENO Analog output channel 0 data MMW02
Analog output channel 1 data MW54 Analog output channel 1 data MMW04
Analog input filter value 1 MW56 SLOT
Analog input filter value 1 MMW06
Analog input filter value 2 MW58 Analog input filter value 2 MMW08
DATA
Analog input filter value 3 MW60 Analog input filter value 3 MMW10
LEN
ADDR
9 Words 9 Words
Analog input channel 0 data (Filtered) MW100 Analog input channel 0 data (Filtered) MMW256
READ_W Analog input channel 1 data (Filtered) MMW258
Analog input channel 1 data (Filtered) MW102
EN ENO Analog input channel 2 data (Filtered) MMW260
Analog input channel 2 data (Filtered) MW104
Analog input channel 3 data (Filtered) MW106 SLOT Analog input channel 3 data (Filtered) MMW262
Analog input channel 0 data (Instant) MW108 Analog input channel 0 data (Instant) MMW264
Analog input channel 1 data (Instant) MW110 DATA Analog input channel 1 data (Instant) MMW266
Analog input channel 2 data (Instant) MW112 Analog input channel 2 data (Instant) MMW268
LEN Analog input channel 3 data (Instant) MMW270
Analog input channel 3 data (Instant) MW114
Module scan time MW116 Module scan time MMW272
ADDR
Figure 9 : Memory Mapping of High Speed Mix Analog Module
The analog input channel enable/ disable configuration and filter values from
PLC variable area e.g. memory or page is transferred to module memory
when WRITE_W function gets executed in application program i.e. in logic
scan. The module takes appropriate action on configuration information
change immediately. After power on, the module starts converting enabled
input channels. If filter values are modified or channel is enabled / disabled, it
takes effect only in the subsequent conversion cycle. The configuration, filter
values can be modified by using WRITE_W function. Similarly channel can
be enabled or disabled during normal operation for optimum results.
CPU writes binary data for two analog output channels to module memory
words. The module coverts this data to equivalent analog output voltage.
These values can be modified by using WRITE_W function.
The analog input channel readings and module scan time count can be read
from the module using READ_W function.
2.5.3 Module Status Bits
As discussed in chapter 2.4.1, input image bits are used as module status
indications. User can check the module status through application program.
The module writes status in its input image area cyclically. The CPU reads
this input image area in input scan. If 'IMM_IN' function is executed in logic
scan for a particular slot, it stops current logic scan, executes input scan for
defined slot and resumes logic scan again. This is useful when ever
immediate updation of input image is needed. The functions of input image
bits are given below
No. Bit Address Module Status Status Description

Isolated supply to analog section is absent or
ON
1 Ixx.0 No 5 V Supply faulty
OFF Isolated supply to analog section is healthy
2 Ixx.6 ADC Fault ON ADC hardware fault
OFF ADC healthy
Module CPU watch dog fault
3 Ixx.7 CPU Fault ON
Module not ready.
OFF Module CPU section healthy and ready
Note – xx is slot number in which module is fixed.

Ixx.1 to Ixx.5 is reserved and should not be used.
Whenever accessing the module, user must check the module status bit Ix.0
and Ix.7. Whenever, isolated supply to analog section is absent or faulty, ‘No
5 V Supply’ bit Ixx.0 is set. In this case, ‘ADC Fault’ bit Ixx.6 also set.
3. Installations and Wiring
This chapter provides the following information –
• Module Installation
• Connection Details
• Precautions to be taken
3.1 Module Installation
The installation procedure for high speed mix analog module is same as any
other discrete I/O module.
• Put the module in to the desired slot of the PLC.

• Tighten the screw provided at the top of the module.
• Connect the terminal block at the front of the module and tighten it.
3.2 Connection Details
The figure on next page shows the connection diagram of high speed mix
analog module
01
02
03
04
05
06
07
08
09
10
11
12
+
13
14
0 to 10 VDC Input V0 +
15
-- 16
I0 +
17
+ V2 +
18
0 to 20 mA Input 19
COM 0
-- I2 +
20
V1 +
21
To interface current input, it is COM 2
22
necessary to short Vn + and In I1 +
23
terminals of respective channel. V3 +
24
COM 1
25
I3 +
26
+ VOUT 1
27
0 to 10 VDC Output 28
COM 3
-- AG
29
+ 30
VOUT 2
0 to 10 VDC Output 31
-- 32
AG
33
34
FG
35
36
37
38
Figure 10 :Connection diagram of High Speed Mix Analog Module
In figure, analog voltage input is connected to channel 0 and analog current

input is connected to channel 2. For interfacing analog signals, 38-pin
terminal block is provided. Analog voltage input is connected to Vn+ and
COMn terminals, where n is a channel number. Ensure correct polarity of
analog input. Analog voltage input 0 is to be connected to terminal numbers
15 and 19. Analog voltage input 1 is to be connected to terminal numbers 21
and 25. Analog voltage input 2 is to be connected to terminal numbers 18
and 22. Analog voltage input 3 is to be connected to terminal numbers 24
and 28.
Analog current input is connected to In+ and COMn terminals, where n is a

channel number. Here, short corresponding Vn+ terminal to In+ terminal.
Analog current input 0 is to be connected to terminal numbers 17 and 19.
Current input 1 is to be connected to terminal numbers 23 and 25. Current
input 2 is to be connected to terminal numbers 20 and 22. Current input 3 is
to be connected to terminal numbers 26 and 28.
Analog output is taken from VOUT n and AG. Analog output 1 can be taken
from terminal numbers 27 and 29. Analog output 2 can be taken from
terminal numbers 30 and 32.
For functioning of high-speed mix analog module, 5 VDC supply is taken

from back plane hence no external supply is required.
3.3 Precautions to be taken
All the normal precautions concerning the wiring and protection of an

electronic equipment in an industrial environment should be observed. To
guard against coupling noise from one conductor to another, follow the
guidelines given below.
Inside control panel
Following guidelines to be observed inside control panel.
• All power circuit wiring e.g. connected to power supply module, power
contactors, etc i.e. high voltage wiring should be kept separate and apart
from thermocouple signals.
• Digital input wiring and digital output wiring (especially, relay output and
AC output) should be separately bundled and kept as apart as possible
from analog signals.
• Analog signals should be carried through shielded cables.
Outside control panel
Following guidelines to be observed outside control panel.
Depending upon the type of modules used in PLC, separate ducts should be
provided for
• Power circuit wiring and power cables.
• Input cables
• Output cables
• All cables carrying low level signals for analog IO modules,
thermocouple/ RTD input modules and for communication.
Wherever possible, it is recommended to

• Avoid parallel routing of cables carrying analog signals and power
cables, etc over long distances
• Ensure that cables carrying analog signals cross at right angles to power
cables so that minimum length of cable will be in close vicinity of power
cables.
• Run cables on metallic surfaces
• Avoid number of joints
• Keep cable lengths as short as possible.
4. Configuration and Programming

This chapter explains configuration of high speed mix analog module and
transferring information with high speed analog module. This information is
useful for application program development. The module configuration
consists of only slot configuration as explained below.
4.1 Slot Configuration
The high speed mix analog module provides 4 analog input channels and 2
analog output channels, which can be independently operated. Configuring
the slot for high speed mix analog module is just like any other discrete IO
module only. The programming and documentation software DOXMINI+ is
used for configuration and programming. The module consumes 1 byte of
input image and 1 byte of output image. The input image is used for reading
status of module. For more details, refer chapter 2.4.4.
The IO byte consumption along with configuration of Nexgen PLC is shown

below.
Power Supply CPU Module Slot 0 Slot 1 Slot 2 Slot 3

Module
32 DC Input 32 DC Output High Speed 16 DC Output
Module Module Analog Module Module
I0.0 to I0.7 Q4.0 toQI4.7 I8.0 to I8.7 Q9.0 to Q9.7

I1.0 to I1.7 Q5.0 to Q5.7 Q8.0 to Q8.7 Q10.0 to Q10.7
I2.0 to I2.7 Q6.0 to Q6.7
I3.0 to I3.7 Q7.0 to Q7.7
Input module in first slot 0 consumes IB0 to IB3 of input image. Output
module in slot 1 consumes QB4 to QB7 of output image. High speed mix
analog module consumes IB8 of input image and QB8 of output image.16
DC Output module in slot 3 consumes QB9 and QB10 of output image.
4.2 Data Information to Module
The high speed mix analog module can be configured in any slot of PLC. It
provides 4 differential input channels and 2 non-isolated output channels.
Analog input channels can be independently used for voltage or current
inputs. Following information is provided by CPU module to high speed mix
analog modules
• Channel enable/disable
• Analog input filter values
• Analog output binary data
This information is transferred to module memory by using 'WRITE_W

function. The module takes action on this information immediately in its own
scan.
The required information is to be written to module memory words MMW #0

to MMW #10.
4.2.1 Analog Input Channel enable/ disable
Bit wise information is stored in module memory word MMW #0 for four
analog input channels as shown below.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Analog Input 0 Enable 1
Disable 0
Disable 0
Disable 0
Disable 0
Analog input 0 enable/disable bit is bit 0 of MMW#0 and so on. If this bit is
set, analog input channel 0 is enabled and module samples and converts
input to equivalent binary value. Channel 0 data is updated accordingly. Also,
corresponding channel LED indication (green) on module is switched ON
indicating that channel is enabled. If this bit is reset, analog input channel 0 is
disabled and the channel is not sampled and channel data is not updated.
Corresponding channel LED indication on module is switched OFF.
During module power ON, default value $000F is loaded to MMW#0 enabling
all the four analog input channels. At the same time, all four channel LEDs
are switched ON. User can modify this word by WRITE_W function for
optimum module scan time.
4.2.2 Analog Output Channel Data
Module memory word MMW #2 holds data for analog output channel 0
whereas MMW #4 holds data for analog output channel 1.
MMW #2 Analog Output Channel 0 data

MMW #4 Analog Output Channel 1 data
The data range is from 0 to 32,000 for 0 to 10 VDC output. For more details
of analog voltage output and equivalent binary data, refer chapter 2.2.
4.2.3 Digital Filter
Three filter values are to be programmed for stable analog input reading as
per varous site conditions. These three values are written to module memory
words MMW#6 to MMW#10.
During module power ON, following default values are loaded.User can
modify these words by WRITE_W function as per site conditions to get stable
analog input reading.
Module Memory Word Item Default Value

MMW #6 Filter Value 1 # 100
MMW #8 Filter Value 2 # 75
MMW #10 Filter Value 3 #3
4.3 Analog Input Channel Data
For the configured channels, necessary information is available as filtered

channel data and instantaneous channel data.
Module memory words MMW #256 to MMW #262 are module memory words
for four channel readings updated after applying software filter. Module
memory words MMW #264 to MMW #270 are module memory words for four
channel readings updated immediately.
For enabled channels, this information is updated cyclically in module. The

data is read and stored using READ_W function in application program.
MMW #256 Analog Input Channel 0 filtered data
MMW #262 Analog Input Channel 3 filtered data

MMW #264 Analog Input Channel 0 instantanous data
MMW #270 Analog Input Channel 3 instantanous data
4.4 Module Scan Time
Module scan count is available in module memory word MMW#272. The time
in nano seconds can be calculated as below.
Module scan time in ns = Module scan count x 375 x 10 -9

available in MMW#272
4.5 Programming
The data in PLC variables is transferred to the high speed mix analog
module when 'WRITE_W' function is executed. The data in the PLC variables
can be updated using functions like 'MOV_W', arithmetic or any other
functions. The data from high speed mix analog module memory can be
transferred to PLC variables when 'READ_W' function is executed.
The WRITE_W function below shows data transfer from the CPU module
memory to high speed mix analog module memory. The details of transfer
are -
• High speed analog module is configured in slot 2 of PLC

• Start address of memory on the CPU module is MW50
• Length of data area to be transferred is 6 words
• Address on high speed analog module in slot 2 is #00
'WRITE_W' function gets executed when condition for enable 'EN' is ON.
'ENO' output becomes ON, when EN is ON and function is executed
successfully. ENO is OFF if
Parameters of function are invalid or not within specified range.

High speed analog module is not accessible to CPU module.
M0.0 ------ WRITE_W ---- M0.1
+---| |---+--------- |EN ENO|-+---------+---( )---
| |
#2 -|SLOT |
| |
MW50 -|DATA |
| |
#6 -|LEN |
| |
#00 -|ADDR |
| |
-------------------
So 6 words (MW50 to MW60) information from CPU memory is transferred to

the memory at address #00 onwards of high speed mix analog module fitted
in slot 2.
The 'READ_W' function below shows data transfer from the high speed mix
analog module memory to CPU memory. The details of transfer are -
• High speed analog module is configured in slot 2 of PLC

• Address on high speed mix analog module in slot 2 is #256
• Start address of memory on the CPU module is MW100
• Length of data area to be transferred is 9 words
‘READ_W' function gets executed when condition for enable 'EN' is ON.
'ENO' output becomes ON, when EN is ON and function is executed
successfully. ENO is OFF if
• Parameters of function are invalid or not within specified range.

• High speed mix analog module is not accessible to CPU module
M0.2 ------ READ_W ----- M0.3

+---| |---+--------- |EN ENO|-+---------+---( )---
| |
#2 -|SLOT |
| |
#256 -|ADDR |
| |
#9 -|LEN |
| |
MW100-|DATA |
| |
-------------------
So 9 words (MMW256 to MMW272) information on high speed mix analog

module fitted in slot #2 are transferred to the CPU memory words (MW100 to
MW116).
Example of basic application program is given below. For the same, refer
Nexgen PLC configuration shown in chapter 4.1. In the configuration,
following points are to be noted.
I 8.0 is a module status bit as 'No 5 V Supply' bit. I8.0 is set if 5 VDC supply
to module is not healthy.
I 8.6 is a 'ADC Fault' bit. It is set in case of ADC circuit hardware fault. If this
bit is set, analog input channel readings are not updated.
I 8.7 is a module CPU circuit status bit as 'CPU Fault' bit. This is set in case
of watchdog fault.
S 4.2 is a 'Module Error' bit for the module fitted in slot 2.
While developing application program, first check whether the module is

healthy. For the same, check 'Module Error' bit S 4.2, 'CPU Fault' bit I8.7 and
'NO 5 V Supply' bit I8.0. If any bit is set, declare respective fault. In this case,
module is not accessible. If all these bits are OFF, then only enable
'WRITE_W' and 'READ_W' functions for high speed analog module.
Check 'ADC Fault' bit I8.6 while reading analog input channel data. In case of
ADC fault, analog input channel data is not updated and so data is not valid.
During self test of module at the time of power ON, default values are loaded
in MMW#0 and MMW#6 to MMW#10. This enables all the four analog input
channels indicated by four channels status LEDs. Default filters values are
also loaded. If user wants to continue with this configuration, it is not
necessary to write the configuration again. If user wants change the
configuration, it can be done using WRITE_W function as explained further.
When 'WRITE_W' function is executed successfully, ENO output becomes

ON, once this information is transferred to module, it is valid as long as PLC
power is present. It is recommended to enable 'WRITE_W function when
• Module Error bit becomes OFF i.e. System bit S4.2 is OFF
• No 5 V Supply bit becomes OFF i.e. Input bit I8.0 is OFF
• CPU Fault bit becomes OFF and Input bit I8.7 is OFF
Any other condition as per requirement of application program e.g. memory

bit M2.0 is ON.
S4.2 M0.3 ------ WRITE_W ---- M2.2

+---| |---+---|N|---|---------|EN ENO|-+---( )---
| | |
I8.0 M0.4 | | |
+---| |---+---|N|---| #2 -|SLOT |
| | |
M8.6 M0.5 | | |
+---| |---+---|N|---| MW50 -|DATA |
| | |
M2.0 M2.1 | | |
+---| |---+---|P|--- #6 -|LEN |
| |
| |
#0 -|ADDR |
| |
-------------------
If 'WRITE_W' function is executed successfully, M2.2 bit becomes ON for

one scan duration. If this bit is not ON even if function enable conditions are
ON, declare fault and take appropriate action.
When 'WRITE_W' function is executed, necessary data from PLC variables

MW 50 to MW60 is transferred to module memory MMW#00 onwards. The
significance of PLC variables is as given below.
MW 50 – Channel enable / disable word

MW 52 - Analog output channel 0 binary data
MW 54 - Analog output channel 1 binary data
MW 56 – Digital filter 1 value for analog inputs
After transferring this information to high speed mix analog module memory,
module starts functioning as per requirement. Enable 'READ_W' function
with any condition M1.0 with interlocks of Module Error bit S4.2, 'CPU Fault'
bit I8.7 and ‘ADC Fault’ bit I8.6. When 'READ_W' function is executed, the
analog input channel readings stored in module memory MMW#256 to
MMW#270 and module scan count stored in MMW#272 are transferred to
CPU memory MW100 to MW#116 respectively.
If 'READ_W' function is executed successfully, M1.1 bit becomes ON. If this

bit is not ON even if function enable conditions are ON, declare fault and take
appropriate action.
M1.0 S4.2 I8.7 I8.6 ------ READ_W ----- M1.1

+---| |---+---|/|---+---|/|---+|---|/|---|EN ENO|-+--( )-
| |
| |
#2 -|SLOT |
| |
| |
#256 -|ADDR |
| |
| |
#9 -|LEN |
| |
| |
MW100 -|DATA |
| |
-------------------
After execution, filtered analog input data from four channels is available in
PLC variables MW100 to MW106.
Instantanous analog analog input data from four channels is available in
MW108 to MW114. Module scan count is stored in MW116. This data can be
proceesed further in application program.
MESSUNG SYSTEMS
EL – 2, J - Block, MIDC, Bhosari,
PUNE – 411 026. INDIA
Tel. – (+91) –020 – 712 0807, 712 2807
Fax. – (+91) –020 –712 0391
NEXGEN PLC I/O Modules
Highspeed Mix Analog IO Module(4366)
Document No.:ED-2002-006

ED-2002-020 High Speed Mix Analog Input Output Module (4366)

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ED-2002-020 High Speed Mix Analog Input Output Module (4366)

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Messung Systems NEXGEN PLC I/O Modules

NEXGEN Series of PLCs

Published July 2002

Tel: (+91)-020-712 0807, 712 2807.

Version Date Description

High Speed Mix Analog I/O Module

1. Module Overview ..............................................................................................................5

Guidelines for the Safety of the user and protection

This product can only function correctly and safely if it is installed

The specifications of product and contents of manual are subject to

This chapter describes the following

• High Speed Mix Analog Module Overview

1.1 High Speed Mix Analog Module Overview

LED Connection Front Door

Figure 1 : Front View of High Speed Mix Analog Module

1.2 LED Indications

The following table explains significance of LEDs provided on the module.

1.3 General Specifications

General specifications of mix analog module are as given below..

Number of analog output channels 2 non-isolated

* This module does not require any external power supply.

At the time of application program development, the module can be

2.1 Block Diagram

Block diagram of high speed mix analog module is shown below.

Figure 2 : Block diagram of High Speed Mix Analog Module

The input channels can be independently enabled or disabled. The analog

2.2 Input Range

This section describes data ranges as applicable to analog input.

+312.5 µV +10.24 VDC

Figure 3 :Data Range of Analog Input Voltage Signal

Figure 4 :Data Range of Analog Input Current Signal

For the range of 0 to +10 V ( 20 mA ), the digital value ranges from 0 to

The resolution is the smallest detectable change in analog signal.

Similarly, for 0 to 20 mA range, the current span is 20 mA and there can be

2.3 Output Range

This section describes data ranges as applicable to analog voltage output.

+2.5 mV +10.24 VDC

Figure 5 :Data Range of Analog Output Voltage Signal

The resolution is the smallest detectable change in analog output signal.

2.4 On-Board Processor Operations

2.4.1 Power On Operations

The module continues sampling, converting the channels and updating

2.4.2 Analog to Digital Conversion

Channel Channel Channel Channel

Channel 0 Channel 1 Channel 2 Channel 3

Figure 6 :ADC Coversion Cycle

2.4.3 Digital Filter

Module provides analog input channel data as instantaneous value as well

The typical response for a step input is shown is figure below.

Module memory location for

Figure 7 : Digital Filter Action

2.4.4 Digital to Analog Conversion

2.5 Module Information

Input Output Image Mapping

2.5.1 Input Output Image Mapping

CPU Module Input Scan High Speed Mix Analog Module

• Output image bits are not used

2.5.2 Memory Mapping

CPU Module High Speed Mix Analog Module

Figure 9 : Memory Mapping of High Speed Mix Analog Module

2.5.3 Module Status Bits

No. Bit Address Module Status Status Description

Note – xx is slot number in which module is fixed.