Course code: ET/PC/B/T/316

Analog CMOS Design &

Technology
Part-10
Sep 2023

Dr. Joydeep Basu, Assistant Professor

Dept. of Electronics & Telecommunication Engg., Jadavpur University
https://jadavpuruniversity.in/faculty-profile/joydeep-basu
 Diff Amplifier
 Thank you so much! 

 Is the CMRR good enough?

J. Basu Image: ETCE UG-III students 2

 Diff Amplifier & Op-amp
 Opamp with SE o/p is required in many applications

 Can use just use one of the two outputs of a diff amp?
 O/p at X remains unused

 Voltage gain is halved

 CMRR is poor

 We use a current mirror load

J. Basu 3
 Diff Amplifier w/ Current Mirror Load
 With the current mirror load – there are two signal paths to o/p:
 Through M1 and M2 current mirror load

 Through M1, M3 and M4

 Current to output:
 Through M1 and M2: gm1∙(vin/2)

 Through M1, M3 and M4: gm2∙(-vin/2)

 Total current: gm1∙(vin/2) + gm2∙(-vin/2) = gm1∙vin

high-gain
 Thus, voltage gain: gm1∙ Rout = gm1∙(ro2 ‖ ro4) diff amp ≈
op-amp

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 4

 Operational Amplifier
 Opamp is used in –ve f/b loop to realize amplifiers Vin + G Vout
‒
with precise gain
Opamp
H
 Ideal opamp characteristics:
Symbol
 Infinite open-loop gain (AOL)
 Infinite input impedance (Rin)
….

Eq. model
 Two “golden rules” of opamps:
 In a closed loop, the output attempts to do whatever is necessary to make the voltage difference
between the inputs zero
 The inputs draw no current

J. Basu 5
 Op-amp Vs. OTA
 Having a high output impedance can be okay/necessary in many applications
 Called operational transconductance amplifier (OTA). E.g., Else, use a
voltage buffer
at the o/p

This is a
single-stage
OTA

 Though the names “OTA” and “op-amp” are used invariably!

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 6

 SE Vs. FD Output
 Single-ended (SE) and fully-differential (FD) versions of single-stage OTA:

𝐴𝑉 = 𝑔𝑚 (𝑟𝑜𝑛 ||𝑟𝑜𝑝 )

single-ended o/p fully-differential o/p

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 7

 Op-amp DC-gain
 Small-signal analysis - the circuit is not symmetric:
 Impedances seen looking up at nodes F and Vout differ
 So, P is not a virtual ground

o/p is shorted
to incremental
(ac) ground

 Now it’s approximately symmetric  can assume 𝑣𝑃 ≈ 0

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 8
 Op-amp DC-gain
 Now we can break into half circuits
Cannot find
 Thus, transconductance: 𝐺𝑚 = 𝑔𝑚1,2 Rout using this

𝑣𝑖𝑛
𝑔𝑚1
2
𝑣𝑖𝑛
𝑔𝑚1
2 𝑖𝑜𝑢𝑡 = 𝑔𝑚1 𝑣𝑖𝑛

𝑣𝑖𝑛
𝑔𝑚2
2

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 9

 Op-amp DC-gain
 Finding 𝑅𝑜𝑢𝑡 :

𝑉𝑋
 Thus, 𝑅𝑜𝑢𝑡 = ≈ (𝑟𝑜2 ||𝑟𝑜4 )
𝐼𝑋

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 10

 Op-amp DC-gain
 Thus, small-signal low-frequency (or, dc) voltage gain:

𝐴𝑉0 = 𝐺𝑚 𝑅𝑜𝑢𝑡
≈ 𝑔𝑚1 (𝑟𝑜2 ||𝑟𝑜4 )

 Low-frequency  don’t need to consider the effect of any capacitances

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 11

 5-Transistor OTA
Exercise-1:
Design the single-stage OTA for a gain of 20 V/V at a power consumption of 1 mW.
Assume that the i/p CM level is 1 V, and the input-pair transistors operate at the edge
of saturation. Given VDD= 1.8 V, VTHn= 0.5 V, VTHp= -0.4 V, μnCox= 100 μA/V2 = 2μpCox,
and λn= 0.1 V−1 = 0.5λp.

ANS: 𝑊
= 50
𝐿 1,2
𝑊
= 13.83
𝐿 3,4

J. Basu Image: B Razavi, Design of Analog CMOS Integrated Circuits 12