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1) What is the Vds-saturation voltage for an NMOS transistor of 400 nm width, and biased
with Vds of 0.5V, and Vgs of 1V, for 65 nm technology short channel current model?
a) 0.55 V
b) 0.85 V
c) 0.418 V
d) 0.35 V
e) 0.87 V
f) 0.57 V
g) 0.7 V
h) 0.2 V
2) What is the current generated from an PMOS transistor of Width 400 nm, for a 65 nm
technology node (channel length = 50nm) considering mobility of 40 cm2/V-sec? Consider
the PMOS is biased to Vds of -1V, and Vgs of -1V. The current for a PMOS of 200 nm Width
is 128.9 µA.
a) 257.8 µA
b) 128.9 µA
c) 112.8 µA
d) 688.9 µA
e) 128.9 mA
f) 112.8 mA
g) 688.9 mA
h) 257.8 mA
3) What is the current generated from an NMOS transistor of Width 200 nm, for a 65 nm
technology node (channel length = 50nm) considering mobility of 80 cm2/V-sec? Consider
the NMOS is biased to Vds of 1V, and Vgs of 1V. The current for a NMOS of 100 nm Width
is 128.9 µA.
a) 257.8 µA
b) 128.9 µA
c) 112.8 µA
d) 688.9 µA
e) 128.9 mA
f) 112.8 mA
g) 688.9 mA
h) 257.8 mA
4) For an N-cascaded NMOS pass transistors where all the gates are tied to 1V, and 0.9V is
applied as an input, what is the output of the cascaded N-Pass transistors?
a) (0.9N) V.
b) (N) V
c) 0.7 V
d) 0.3 V
e) -.0.7 V
f) -0.3 V
g) 1.3 V
h) 1.7 V
5) For an N-cascaded PMOS pass transistors where all the gates are tied to 0V, and 0.8V is
applied as an input, what is the output of the cascaded N-Pass transistors?
a) 0.8N.
b) N
c) 0.7V
d) 0.3V
e) -.0.7V
f) -0.3V
g) 1.3V
h) 0.8V
7) For an N-cascaded NMOS pass transistors where all the gates are tied to 1V, and 0.8V is
applied as an input, what is the output of the cascaded N-Pass transistors?
a) (0.8 N) V.
b) (N) V
c) 0.7 V
d) 0.3 V
e) -.0.7 V
f) -0.3 V
g) 1.3 V
h) 1.7 V
a) 1V
b) 0.7V
c) 0.4V
d) 0V
e) –0.3
f) -0.4V
g) High Impedance
h) Cannot be determined
9) As For an N-cascaded PMOS pass transistors where all the gates are tied to 0V, and 0.9V is
applied as an input, what is the output of the cascaded N-Pass transistors?
a) 0.9N.
b) N
c) 0.7V
d) 0.3V
e) -.0.7V
f) -0.3V
g) 1.3V
h) 0.9 V
10) For a nmosfet with positive constant drain voltage, as the gate voltage is swept from 0 to V
(where V >> Vtn), the regions of operations experienced by the device is in the order
a) cutoff → saturation → linear
b) cutoff → linear → saturation
c) linear → saturation → cutoff
d) linear → cutoff → saturation
e) saturation → linear → cutoff
f) saturation → cutoff → linear
g) linear → cutoff → linear
h) cutoff → linear → cutoff
Solution:
1) c) 0.418V
( ) . ( . )
Vds,sat = = = 0.418𝑉
. .
2) a) 257.8µA
Considering all the other parameters for both the mosfet to be same, current is directly
proportional to the width.
= => I400nm = 2 x 128.9 = 257.8µA
3) a) 257.8µA
Considering all the other parameters for both the mosfet to be same, current is directly
proportional to the width.
= => I200nm = 2 x 128.9 = 257.8µA
4) c) 0.7V
5) h) 0.8
7) c) 0.7V
8) c) 0.4V
9) h) 0.9V