EC 415 – VLSI Design

Anil Neerukonda Institute of Tech. &

Science
 Wafer Preparation
Quartz Tube

Rotating Chuck
The Czochralski process is a method Seed Crystal
of crystal growth used to obtain
single crystals of semiconductors (e.g. Growing Crystal
(boule)
silicon, germanium and gallium arsenide),
metals (e.g. platinum, silver, gold)

RF or Resistance
Heating Coils

Molten Silicon
(Melt)

Crucible
 WAFER SLICES

• Wafer diameter – 75 to 150 mm

• thickness - 0.4 mm
• Boron impurity concentration
(P – type) substrate – 1015 / cm3
to 1016 / cm3
• Resistivity – 25 ohm cm to 2
ohm cm
 Purpose of oxide layer
• Oxidation: The oxygen is led to the wafers in gaseous
state and reacts at the wafer surface to form silicon
dioxide.
• Purpose:
• Selective diffusion and ion implantation
• Device isolation
• Gate formation
• Final passivation to protect chip from dust particles
 Oxidation
In thermal oxidation, silicon wafers are oxidized in furnaces
at about 1000 °C. The furnaces consist of a quartz tube in
which the wafers are placed on a carrier made of quartz
glass.

(Quartz tube)

(Quartz Glass)

Quartz glass has a very high melting point (above 1500 °C) and thus is
applicable for high temperature processes
 Types of oxidation
• Dry oxidation
• The oxidation takes place under pure oxygen atmosphere. The
silicon and oxide react to form silicon dioxide:
Si + O2→SiO2
• This process is done at 1000 to 1200 °C actually.
• To create a very thin and stable oxide the process can be done
at even lower temperatures of about 800 °C.
• Characteristic of the dry oxidation:
• slow growth of oxide
• high density
• high breakdown voltage
 Types of oxidation
• Wet oxidation
• In wet thermal oxidation, the oxygen is led through a bubbler
vessel filled with heated water (about 95 °C), so that in
addition to oxygen water is present in the quartz tube as
steam.
• The oxidation is given by:
Si + 2H2O→SiO2 + 2H2
• This process is done by 900 to 1000 °C.
• The characteristics of wet thermal oxidation are:
• fast growth even on low temperatures
• less quality than dry oxides
Growth rate comparison
 Photoresist
• The surface of the wafer is cover with a photoresist
• It is applied as a liquid and the wafer is rotated to
spread / distribute it evenly on the surface (a layer
between 0.5 and 2.5 micro meters thick).
• Photoresists have three major components, a
solvent, resin, and sensitizer (or photoactive
compound).
• Two types: positive resist - the exposed areas are
soluble,
• Negative resist - the exposed areas are insoluble
during wet chemical development.
 Photoresist
• Positive photoresist reacts with light to cause the
polymer to break down and become soluble in a
developer solution – AR-P 1200, AR – P 3200, AR – P
3500
• negative photoresist, e.g. methyl methacrylate, AR-N
4200, AR-N 4300, ARN 4400
• For patterning of wafers in manufacturing, almost
only positive resists are used.
• Negative resists were primarily used as a passivation
which can be cured by ultra-violet radiation.
 Developer solution
• To remove photoresist Layer:
– tetramethylammonium hydroxide (TMAH) are
now used.
– sodium hydroxide (NaOH)
– Hydrofluric acid
 Photolithography
• The photoresist layer is then exposed to UV
light through a mask which defines which
defines those regions into which diffusion is to
take place together with transistor channels
 Etching
• Etching is used in IC fabrication to chemically remove
layers from the surface of a wafer during
manufacturing.
• Here we use negative photoresist and hence the area
exposed to UV light becomes harden and one which
is blocked (unexposed) from UV light is soft
• The soft regions of the photoresist together with the
underlying silicon dioxide are removed in the
developer solution (Hydrofluric acid)
 Chemicals used in etching
Layer to be etched Chemical etchant used
silicon dioxide (SiO2) Hydrofluoric acid (HF)
Silicon (Si) KOH is used (a mixture of nitric acid
(HNO3) and hydrofluoric acid (HF)).

Aluminum (Al) Phosphoric acid (H3PO4), sitric acid

(HNO3) and acetic acid (CH3COOH)

Silicon nitride (Si3N4) Hot Phosphoric acid (H3PO4)

 Gate formation
• A thin layer of Silicon dioxide (0.1 um typical) is
grown over the entire chip surface
• Then polysilicon is deposited by chemical vapour
deposition (CVD) process
• In the fabrication of fine pattern devices, precise
control of thickness, impurity concentration, and
resistivity is necessary
 Gate formation..
• Further photoresist coating and masking allows the
polysilicon to be patterned
• Thin oxide is removed to expose areas into which n -
type impurities are to be diffused to form the source
and drain regions
 Contact cuts / holes
• Thick oxide (Sio2) is grown all over again and is then
masked with photoresist and etched to expose
selected areas of the polysilicon gate and the drain
and source regions where connections (contact cuts)
are to be made
 Metallization
• The whole chip then has metal (aluminum) deposited
over its surface to a thickness typically of 1 um
• This layer is then masked and etched to form the
required interconnection pattern
 Metallization ..
• Technique of coating metal on the surface of
objects.

(Aluminum (Al))
Dicing and Packaging
DICING
Die Attach and Wire Bonding

lead frame gold wire

bonding pad

connecting pin
 Final Test
Chips are electrically
tested under varying
environmental conditions.

Yield = Number of Good chips/ Total number of Chips per wafer

 Technology Roadmap

Year 1978 1999 2002 2005 2008 2011 2014 2016 2018

Technology 3000 180 130 100 70 50 35 20 10

(nm)