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The BJT (cont’d)
• Ideal transistor analysis
• Narrow base and narrow emitter
• Ebers-Moll model
• Base-width modulation
EE130/230A Fall 2013 Lecture 26, Slide 2 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 11.1
“Game Plan” for I-V Derivation
• Solve the minority-carrier diffusion equation in each quasi-neutral
region to obtain excess minority-carrier profiles
– different set of boundary conditions for each region
dnC dp B
I qAD I Cp qAD
• Add hole Cn
& electronCcomponents
dx ' x ' 0
together B dx
terminal x W
currents
nE
I En qADE ddx " qA DLEE nE 0 (e qVEB / kT 1)
x " 0
• Solution: p B ( x ) p B 0 ( e qVEB / kT
1) e ( W x ) / LB e ( W x ) / LB
eW / LB e W / LB
pB 0 ( e qVCB / kT
1) e x / LB e x / LB
eW / LB e W / LB
EE130/230A Fall 2013 Lecture 26, Slide 6
Since sinh e e
2
we can write
pB ( x) pB 0 (e qVEB / kT
1) e ( W x ) / LB e ( W x ) / LB
eW / LB e W / LB
p B 0 (e qVCB / kT
1) e x / LB e x / LB
eW / LB e W / LB
sinh W x LB
pB ( x) pB 0 (e qVEB / kT 1)
sinh W LB
as
sinh x LB
pB 0 (e qVCB / kT 1)
sinh W LB
EE130/230A Fall 2013 Lecture 26, Slide 7
d d e e e e
sinh cosh
d d 2 2
sinh W x LB sinh x LB
pB ( x) pB 0 (e qVEB / kT 1) p B 0 (e qVCB / kT
1)
sinh LB
W sinh W LB
dp B
I Ep qAD B dx
x 0
qA DB
LB p cosh(W / LB )
B 0 sinh(W / LB ) (e qVEB / kT
1) 1
sinh(W / LB )
e qVCB / kT
1
I Cp qADB ddxpB
x W
qA DB
LB p 1
B 0 sinh(W / LB ) (e qVEB / kT
1)
cosh(W / LB )
sinh(W / LB )
e qVCB / kT
1
EE130/230A Fall 2013 Lecture 26, Slide 8
BJT Terminal Currents
• We know:
DE
I En qA LE nE 0 (e qVEB / kT 1)
I Ep qA DB
LB
pB 0 cosh(W / L B )
sinh(W / L B )
( e qVEB / kT
1) 1
sinh(W / L B )
e qVCB / kT
1
I Cp qA DB
LB p 1
B 0 sinh(W / LB ) (e qVEB / kT
1)
cosh(W / LB )
sinh(W / LB )
e qVCB / kT
1
DC
I Cn qA LC
nC 0 (e qVCB / kT 1)
• Therefore:
I E qA DE
LE
nE 0
DB
LB
pB 0
cosh(W / L B )
sinh(W / L B )
(e qV EB / kT
1) DB
LB
pB 0 sinh(W1 / LB ) e qVCB / kT 1
qA (e e
DB DC cosh(W / LB )
IC LB pB 0 1
sinh(W / LB )
qVEB / kT
1) LC nC 0 DLBB pB 0 sinh(W / LB )
qVCB / kT
1
EE130/230A Fall 2013 Lecture 26, Slide 9
BJT with Narrow Base
• In practice, we make W << LB to achieve high current gain.
Then, since
sinh for 1
cosh 1 2
2 for 1
we have:
EE130/230A Fall 2013 Lecture 26, Slide 10 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 11.2
BJT Performance Parameters
1
ni E 2 D N W
Assumptions:
1 E B
ni B 2 DB N E LE
• emitter junction forward
biased, collector junction
1 reverse biased
T
1 1
2
W 2
LB
• W << LB
Replace LE with WE’ if WE’ << LE
1
dc
1
ni E 2 D N W
E B
ni B 2 DB N E LE
1
2
W 2
LB
1
dc ni E 2 D N W
E B
ni B 2 DB N E LE
1
2
W 2
LB
increasing
I C F I F 0 ( e qVEB / kT 1)
I B 1 F I F 0 ( e qVEB / kT 1) E B C
IC
I C F I F 0 (e qVEB / kT
1) I R 0 ( e qVCB / kT
1)
IC: C-B diode current + fraction of E-B diode current that makes it to the C-B junction
I E I F 0 (e qVEB / kT 1) R I R 0 (e qVCB / kT 1)
IE: E-B diode current + fraction of C-B diode current that makes it to the E-B junction
Large-signal equivalent circuit for a pnp BJT
2
niB DB N E LE
+
VEB
2
niE DE N BW
pB(x) IC
p B 0 e qVEB / kT 1
(VCB=0)
x VEC
0 W(VBC)
EE130/230A Fall 2013 Lecture 26, Slide 15
Ways to Reduce Base-Width Modulation
1. Increase the base width, W
IC
IB3
IB2
IB1
0 VEC
VA
dI C dI C
VEC VEB VBC so g o for fixed VEB
dVEC dVBC
P+ N P
IC
qAni2 DB qVEB / kT
WN B
e
1
dI C
dW
qAni2 DB qVEB / kT
2
W NB
e
1
IC
W
dQdepC d (qN B xnC ) dxnC
C JC qN B
dVBC dVBC dVBC
dxnC C JC
dVBC qN B
IC IC IC qN BW
VA
g 0 dI C dxnC I C C JC C JC
dW dVBC W qN B
EE130/230A Fall 2013 Lecture 26, Slide 19
Summary: BJT Performance Requirements
• High gain (dc >> 1)
One-sided emitter junction, so emitter efficiency 1
• Emitter doped much more heavily than base (NE >> NB)