CPU structures

From B Govinda rajulu

Basic idea on CPU and memory connection

Address bus Address bus

Memory, I/O
devices
CPU Data bus Data bus

Control bus Control bus

3 types of CPU structures
• 3-address
General Register based processor
• 2-address

• 1-address Accumulator based processor

Stack based processor

• 0-address
 Address bus

MAR PC SP

MDR
Internal bus Data bus

 Rn
 
GPR’s
 R1
 R0

IR
Control bus
ALU Flags CU
Processor, CPU
SPRs of a CPU
• MAR: holds the address of memory (or I/O device) that is currently
being accessed by the processor
• MDR: holds the data that is currently being read or written by the
processor
• IR: holds that machine code of the instruction that is currently being
executed
• PC: holds the address of the next instruction to be fetched (or
executed). Its value is calculated and updated after every instruction
fetch.
• SP: Stack pointer
SPRs of a CPU
• Flags: indicate the arithmetic status of the last result of the processor

• Zero flag; Z = 1, if result of the arithmetic operation is = 0.

• Sign flag; S = 1, if result of the arithmetic operation is less than 0.

• Carry flag; C = 1, if result of the addition (or subtraction) generated a carry (or
borrow)

• Overflow flag; V = 1, if result is out of range of representable values

An example to understand unsigned and
signed numbers all yourself
• Why should we specify signed(or unsigned) in C or C++ programs?
• Make 4 columns
1. Bit pattern
2. Decimal value
3. Value in 1’s complement form
4. Value in 2’s complement form
• Write all 2-bit patterns, starting from 00 to 11, one below the other in the
first column.
• Write value in decimal against each of these bit pattern in the next column
• How to fill in the values in the next two columns?
Signed number representation
MSB LSB
• Sign-magnitude representation; MSB is the sign bit. 100100100
• In complement number systems also; MSB is sign bit.
• If sign bit is 0 => number is positive
• If sign bit is 1 => number is negative
• identity and split the table for signed numbers into two half
• top half representing all positive numbers
• bottom half representing all negative numbers
• Try to fill in those values under 1’s and 2’s complement
How to find value of a signed binary number?
• what value does each of these bit pattern under complement number
system represents?
• Let x be a binary number
• If x is positive (MSB = 0), simply write the value in decimal (place
value system)
• If x is negative (MSB = 1)
• Take the complement of the bit pattern
• find the value of complemented bit pattern in decimal (place value system)
• Obviously, the number will have a negative sign
Sign Magnitude 1’s Complement 2’s Complement
0111 = +7 0111 = +7 0111 = +7
0110 = + 6 0110 = + 6 0110 = + 6
0101 = + 5 0101 = + 5 0101 = + 5
0100 = + 4 0100 = + 4 0100 = + 4
0011 = + 3 0011 = + 3 0011 = + 3
0010 = + 2 0010 = + 2 0010 = + 2
0001 = + 1 0001 = + 1 0001 = + 1
0000 = + 0 0000 = + 0 0000 = + 0
1000 = - 0 1000 = - 7 1000 = - 8
1001 = - 1 1001 = - 6 1001 = - 7
1010 = - 2 1010 = - 5 1010 = - 6
1011 = - 3 1011 = - 4 1011 = - 5
1100 = - 4 1100 = - 3 1100 = - 4
1101 = - 5 1101 = - 2 1101 = - 3
1110 = - 6 1110 = - 1 1110 = - 2
1111 = - 7 1111 = - 0 1111 = - 1
Few observations on signed numbers
• Using 2 bits, range was, +1 to -2.
• Using 3 bits, range was +3 to -4.
• using more bits, we can increase the range of numbers.
• there is limit to the range when we fix up the number of bits.
• Every processor has a fixed bits in its ALU and we can increase it by
using multi-byte concept, in effect, we are able to increase the range
• Can an 4 bit ALU add two numbers such as say, 0111 and 0101,
another set of numbers, say 1000 and 1011?
• do we have any problems here?
Another example for Unsigned and Signed
numbers
• unsigned numbers
• All values are positive 0 to 255
• Eg. Considering 8 bit numbers
• 00H to FFH all bit patterns represent positive values
• signed numbers
• 2’s complement
• MSB represents the sign
• If MSB = 0, then it’s a positive value, else, it’s a negative value
• Eg. Considering 8 bit numbers
• 00H to 7FH represents positive values -128 to 127
• 80H to FFH represents negative values
 Signed Addition and Overflow issue

0111 1111 ( +127 se ) 1000 1111 ( -113

ase )
ca w c
0111 0011 erfl(ow+115 ) o - 45 )
1101 0011 verfl(
ov o
1111 0010 ( +242 ) 0110 0010 ( -158 )

C = 0, V = 1, S = 1, Z = 0 C = 0, V = 1, S = 0, Z = 0

0011 1111 (positive)

1101 0011 (negative)
0001 0010 (never overflows) C = 0, V = 0, S = 0, Z = 0
 Address bus

MAR PC SP

MDR
Internal bus Data bus

 Rn
 
GPR’s
 R1
 R0

IR
Control bus
ALU Flags CU
Processor, CPU
Accumulator based CPU

latch Accumulator

ALU registers Memory

latch
Stack based CPU

latch latch
latch latch
stack
stack
ALU Memory
ALU Memory
latch stack pt
latch stack pt
Which architecture is better?
• We have three choices:
1. A stack architecture
2. An accumulator architecture
3. A general purpose register architecture.
• In choosing one over the other, the tradeoffs are simplicity (and cost)
of hardware design with execution speed and ease of use.
• Accumulator architecture is also called as ‘Load-store architecture’
Memory-Memory: Pros and Cons
• Pros
• Requires fewer instructions (especially if 3 operands)
• Easy to write compilers for (especially if 3 operands)
• Cons
• Very high memory traffic (especially if 3 operands)
• With two memory operands, more data movements are required
• Variable number of clocks per instruction
Memory-Register: Pros and Cons
• Pros
• Some data can be accessed without loading
• Instruction format is easy to encode
• Good code density

• Cons
• Operands are not equivalent (poor orthogonality)
• Variable number of clocks per instruction
• May limit number of registers
Accumulators: Pros and Cons
• Pros
• Very low hardware requirements
• Easy to design and understand
• Simple instruction encoding
• Instructions take similar number of cycles

• Cons
• Higher instruction count
• Accumulator becomes the bottleneck
• High memory traffic
• Little ability for parallelism or pipelining
• Dependent on good compiler
Stacks: Pros and Cons
• Pros
• Good code density (implicit operand addressing top of stack)
• Low hardware requirements
• Easy to write a simple compiler for stack architectures
• Cons
• Stack becomes the bottleneck
• Data is not always at the top of stack when need, so additional instructions
like TOP and SWAP are needed
• Little ability for parallelism or pipelining
• Difficult to write an optimizing compiler for stack architectures
Registers: Advantages and Disadvantages
• Advantages
• Faster than cache (no addressing mode or tags)
• Reduce memory traffic
• Short identifier (typically 3 to 8 bits)
• Deterministic (no misses)
• Can replicate (multiple read ports)

• Disadvantages
• Need to save and restore on procedure calls and context switch
• Fixed size (can’t store strings or structures efficiently)
• Compiler must manage
• Can’t take the address of a register (for pointers)
Summarizing
• In stack architecture, instructions and operands are implicitly taken from
the stack.
• A stack cannot be accessed randomly.
• In accumulator architecture, one operand of a binary operation is
implicitly specified in the accumulator.
• One operand usually is in memory, creates lot of bus traffic.
• In general purpose register (GPR) architecture, registers can be used
instead of memory.
• Faster than accumulator architecture.
• Efficient implementation for compilers.
• Results in longer instructions.
Classifying ISAs