Quaid -E- Awam University of Engineering, Science and

Technology Nawabshah

Lecture # 8

MICROPROCESSOR AND INTERFACING

Department of Computer Systems Engineering

Addressing modes
8085 instruction fetch cycle
8085 instruction fetch cycle
8085 instruction fetch cycle
8085 instruction fetch cycle
8085 instruction fetch cycle
8085 instruction fetch cycle
8085 instruction fetch cycle
8085 instruction

opcode operand

MVI A, 02H
8085 instruction (one byte)
8085 instruction (two byte)
8085 instruction (three byte)
8085 instruction groups

 Data transfer operation

 Arithmetic operations
 Logic operation
 Branch operations
 control group
Data transfer instruction

 LDA
 STA
 MOV
 MVI
 LXI
Arithmetic instruction

 ADD
 ADI
 SUB
 SBI
 INR
 DCR M
logical instruction

 ANA- R/M - AND

 ORA- R/M - OR
 CMA - complement accumulator
 CMC - complement C
 RAL - rotate accumulator left
 CMP- R/M - compare
Branch instruction

 JNC
 JC
 JNZ
 JZ
 JMP address
 RET
 CALL address
Machine control group

 HLT – halt
 NOP- no operation
 SIM – set interrupt mask
 RIM- Read interrupt mask
 EI- Enable interrupt
 DI- Disable interrupt
8085 addressing modes
 Addressing modes are used to specify the data to be
operated with the help of instructions.

 Addressing Modes of 8085 are divided into five

groups.
 The instructions are used to transfer the data from
one register to another register, from the memory to
the register, and from the register to the memory
without any change in the content.

 Instructions are nothing but binary patterns which

are designed to perform some specific functions.
8085 addressing modes

 Immediate addressing
 Implied addressing
 Direct addressing
 Indirect addressing
 Register addressing
 Register in direct addressing
Immediate addressing

 Data is present in instruction itself.

 Instruction that use immediate addressing have data
immediately following the op-code in program memory.
 The 8-bit data is specified in the instruction itself as one of
its operands. 
 No memory reference
  MVI B, 40H means 40H is copied into register B. (two byte)
 ADI A, 0CH
 MVI A, 02H
 MVI B, 37H
 ADD 10H
 ADD 5
Implied addressing

 Data is not present in instruction itself.

 It does not require any operand.
 The operand is not specified in the instruction, specified
within the op-code itself.
  CMA - complement accumulator
 CMP - compare
 RAL - rotate accumulator left
 Direct addressing

 The memory location where the data to be operated is

directly specified as the operand.
 The address field of the instruction contains the effective
address of the operand.
 Only one reference to memory is required to fetch the
operand.
 The address of the operand is given in the instruction.
 LDA 2030 – load accumulator
 STA 7500 -
 ADD B, 5008H
 AC ← AC + [X]
 Indirect addressing

 The address field of the

instruction specifies the
address of memory location
that contains the effective
address of the operand.
 Two references to memory
are required to fetch the
operand.
 Register addressing

  The operand is contained in a

register set. The address field of
the instruction refers to a CPU
register that contains the
operand.
 No reference to memory is
required to fetch the operand.
 AC ← AC + [R]
 MOV B, C
 ADD A, B
 Register indirect addressing

 The address field of the

instruction refers to a CPU
register that contains the
effective address of the
operand.
 Only one reference to
memory is required to fetch
the operand.
 AC ← AC + [[R]]
 MOV A, M
 ADDRESS (hec) CONTENTS (hec)
Data / address register
0000 86 (opcode)- Load
0001 0A
 10+ 5+ 18=33 0002 8B (opcode)- ADD
0003 05
 Program contain Four instruction 0004 8B (opcode)- ADD
 Arithmetic operation 0005 12
0006 B7 (opcode)- Store
0007 21
0008
0009
000A
000B
2000
2001
2002
 ADDRESS (hec) CONTENTS (hec)
Data / address register
0000 84 (opcode)- AND
0001 00 -operand
0002 4C (opcode)- INC
 Program contain three instruction 0003 B7 (opcode)- Store
 Logical AND instructions 0004 20
 AND 00H with accumulator 0005 01
 Increment accumulator 0006
 Store the contents of accumulator
0007
into data memory at memory
0008
location 2001
0009
000A
000B
2000
2001 01H
2002
Allah Hafiz