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DESIGN AND SIMULATION

OF PLL & DLL USING


MATLAB SIMULINK
MADE BY :- KARTIK
PAL
(131029)
PHASE LOCKED LOOP (PLL)
INTRODUCTION

 What is a PLL?
 Block Diagram of PLL
 Parts of a PLL
 PLL Design in Simulink
• PLL Without divider design
• Waveform
• PLL With divider design
• Waveform
What is a PLL?
 A phase lock loop (PLL) is a control system
that generates an output signal whose phase
is related to the phase of an input signal
Block Diagram
Parts of a PLL
 Phase Detector
 Filter

 Voltage Controlled Oscillator

 Programmable Counter/Divider
Parts of a PLL
 Phase Detector
 Acts as comparator
 Produces a voltage proportional to the phase difference between
input and output signal
 Voltage becomes a control signal
Parts of a PLL
 Filter
 Determines dynamic characteristics of PLL
 Specify Capture Range (bandwidth)

 Specify Tracking Range

 Receives signal from Phase Detector and filters accordingly


Parts of a PLL
 Voltage Controlled Oscillator
 Set tuning range
 Set noise margin
 Creates low noise clock oscillation
Parts of a PLL
 Divider
 Divides the VCO output by the degree of the open loop gain
 Feedback loop allows phase comparison
PLL Design in Simulink
PLL Without Divider design
Waveform
Input signal
Phase Detector
Control signal
Synthesized Signal
Spectrum Analyser
PLL With Divider Design
Waveform
Input signal
Phase Detector
Control signal
Synthesized Signal
Spectrum Analyser 1
DELAY LOCKED LOOP
(DLL)
INTRODUCTION

 What is a DLL?
 Block Diagram of DLL
 Parts of a DLL
 DLL Design in Simulink
• DLL design
• Waveform
What is DLL?

A delay-locked loop (DLL) is a digital circuit similar to


a Phase-Locked Loop (PLL), with the main difference being
the absence of an internal voltage-controlled
oscillator(VCO), replaced by a voltage-controlled delay line
(VCDL).
Block Diagram
Parts of a PLL
 Phase Detector(PD)
 Charge pump(CP)

 Loop Filter(LF)

 Voltage Controlled Delay Line(VCDL)


Parts of a DLL
 Phase Detector(PD)
 Acts as comparator
 Produces a voltage proportional to the phase difference between
input and output signal
 Voltage becomes a control signal
Parts of a DLL
 Charge Pump(CP)
• The outputs of the PD are directly connected to the inputs of
CP, and CP prepares the input of LF which is proportional to
the width of the PD output signals (inputs of CP).
• In Matlab Simulink, a simple adder can be used to model
CP
Parts of a DLL
 Loop Filter(LF)
• Loop filter is a simple integrator that performs integral of
the output signals from CP.
• In the other word the loop filter’s capacitor gets charged or
discharged if there is a time lead or time lag between the
reference signal and the output of the delay line.
Parts of a DLL
 Voltage Controlled Delay Line(VCDL)
• Voltage controlled delay line (VCDL) includes a chain of
delay cells.
• Usually all of the delay cells have the same structure.
• In locked condition, the output of the last delay stage is exactly
one cycle lagged from the reference clock (Vin).
DLL Design in Simulink
Waveform
Input signal & Output signal

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