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• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
Improve cell edge behaviour, reduce inter-cell interference and power consumption.
DL ‘semi-static’ power setting
• eNodeB gives fixed power density per PRB scheduled for transport.
– Total Tx power is max. when all PRBs are scheduled
– No adaptive/dynamic power control
– (O&M parameter) Cell Power Reduction level CELL_PWR_RED [0...10] dB
attenuation in 0.1 dB steps
– DL PC on PDCCH
• If feedback from eNodeB the UE corrects the PSD when receiving PC commands
from eNodeB ( in the PDCCH UL PC command)
PC commands ( up and down) based on UL quality and signal level measurements
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
Low
Ve
r y
lo
w
High
Interference (I)
- main cause: inter-cell Very
h igh
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
α = 0 , no compensation
α = 1 , full compensation
α ≠ { 0 ,1 } , fractional compensation
For internal use only
13 © Nokia Siemens Networks /
Module Contents
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS (not in RL10)
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
UE: PL
MSRS (due to SRS configuration)
SIB1, UE class: PMAX
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
P (closed loop)
t
For internal use only
21 © Nokia Siemens Networks /
UL-PC: Closed Loop - Process
Per UE measurements of SIB/RRC parameters:
• receive power of wanted signal P0_NOMINAL_PUSCH, P0_UE_PUSCH, P0_NOMINAL_PUCCH,
• interference and noise P0_UE_PUCCH, ALPHA, deltaFListPUCCH,
DELTA_TF_ENABLED, ACCUMULATION_ENABLED,
deltaPreambleMsg3, P_SRS_OFFSET, filterCoefficient
Calculation of average ENABLE_CLPC
receive level per TTI.
Calculation of SINR (two
ENABLE_CLPC_PUSCH,
methods for I+N values)
ENABLE_CLPC_SRS;
Transformation from Watt
ENABLE_CLPC_PUCCH
into dBm/dB domain.
DELTA_TF_ENABLED,
Transformation into TF time scale: TTI deltaFListPUCCH
independent format
SINR_MAX, SINR_MIN,
Clipping using adjustable RSSI_MAX, RSSI_MIN
parameters
Commanding DELTA_PUSCH
and DELTA_PUCCH values to the DELTA_PUSCH, DELTA_PUCCH
UE via PDCCH
t
For internal use only
22 © Nokia Siemens Networks /
UL-PC: Closed Loop - Process
Measurements and Averaging
Averaged* received SINR per TTI per UE:
Averaged* received level per TTI per UE:
Relevant for PUSCH and PUCCH: (I+N)UE and (I+N)cell
• RSSIPUSCH/UE
and for SRS: (I+N)cell
• RSSIPUCCH/UE
(I+N)cell : all potential PRBs
• RSSISRS/UE
(I+N)UE : allocated PRBs to the particular UE
relevant: PRBs allocated to the particular UE
• SINRPUSCH/UE
* linear, but converted to dBm, dB for further • SINRPUSCH/cell
deployment
• SINRPUCCH/UE
• SINRPUCCH/cell
• SINRSRS/cell
C _ RSSI PUCCH RSSI PUCCH / UE Weighting factors WF_*** : range [1, 100]
DELTA_PUSCH DELTA_PUCCH
value value
y (n) c y (n 1) (1 c) x(n)
x: input (composite RSSI, SINR) c: filter coefficient
y: output (filtered RSSI, SINR) c = exp(-T/Tavg) i.e. impact = (1/e) at t = -Tavg
Example: T = 1ms, Tavg = 25 ms c = 0.96
n: step, max frequency = 1/TTI
Initialization: y(0) := target RSSI/SINR
SINR
+ 1 dB or - 1 dB - 1 dB
+ 3 dB
1 2 3
UP_QUAL_**
+ 1 dB or 0 dB -1 dB
+ 3 dB
4 5 6
LOW_QUAL_**
+ 1 dB or + 1 dB or + 1 dB or
+ 3 dB + 3 dB + 3 dB
7 8 9
RSSI
LOW_LEV_** UP_LEV_**
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters and setting impacts
• DL-PC: RL10
• DL-PC: PC on PDCCH
P0 = -46 dBm
= 0.5
12625 kbps /
1247 kbps
P0 = -36 dBm
= 0.4
12924 kbps /
1329 kbps
Power Offset LNCEL p0UePucch -8...7 dB, step 1 P0_UE_PUCCH: UE specific parameter, used to control mean 0 dB
For UE PUCCH dB received SNR for control data
Tx Power
Calculation
Power Offset LNCEL p0UePusch -8...7 dB, step 1 P0_UE_PUSCH: UE specific PUSCH power offset for controlling 0 dB
For UE PUSCH dB the mean received SNR for user data in UE uplink power control
Tx Power algorithm
Calculation
TPC Step Size LNCEL tpcStepSize 0: TPC step size Selects between TPC step-size sets {-1; 0; 1; 3} and {-1; 1} to be 0
PUSCH set (-1,0,1, 3) used for power control command on PDCCH (single parameter
1: TPC step size for PUSCH and PUCCH). Note: in RL10 no support of (-1,1)
set (-1,1)
Enabled TB LNCEL deltaTfEnabled false, true deltaMCS-Enabled: enabling/disabling of transport format false
Size Impact To dependent offset on a per UE basis
UE PUSCH
Power
Calculation
DeltaF PUCCH LNCEL dFListPucch n/a dFListPucch: SEQUENCE (see values below) n/a
List
DeltaF PUCCH LNCEL dFpucchF1 -2, 0, 2 dB Used to define the PUCCH format 1 0 dB
Format 1
DeltaF PUCCH LNCE dFpucchF2 -2, 0, 1, 2 dB Used to define the PUCCH format 2 0 dB
Format 2
DeltaF PUCCH LNCE dFpucchF2a -2, 0, 2 dB Used to define the PUCCH format 2a 0 dB
Format 2a
DeltaF PUCCH LNCEL dFpucchF2b -2, 0, 2 dB Used to define the PUCCH format 2b 0 dB
Format 2b
PUSCH/PUCCH LNCEL ulpcAccuEnable false, true Enables/disables the accumulation of PUSCH/PUCCH TPC true
TPC Commands commands. Note in RL10 “false” not supported.
Accumulation
Enabled
Delta Preamble LNCEL deltaPreMsg3 -2...12 dB, Used for the calculation of P0_NOMINAL_PUSCH(j=2) for 0 dB
Random Access step 2 dB PUSCH (re)transmission corresponding to the random access
Message 3 response grant.
Power Offset For LNCEL srsPwrOffset 0...15, step 1 Defines the power offset for SRS in UE uplink power control 7
SRS algorithm
Transmission Default=7
Power
Calculation corresponding to 0 dB for DELTA_TF_ENABLED = 0
Filter Coefficient LNCEL filterCoeff fc0 (0), fc1 (1), Filter coefficient for RSRP measurements used to calculate path fc4 (4)
fc2 (2), fc3 (3), loss as specified in [3GPP-36.213. 5.1.1.1]. Value fc0
fc4 (4), fc5 (5), corresponds to k = 0, fc1 corresponds to k = 1, and so on.
fc6 (6), fc7 (7),
fc8 (8), fc9 (9),
fc11 (10), fc13
(11), fc15 (12),
fc17 (13), fc19
(14)
Note: PL[dB] for macro case may be used, 1 slope model, clutter = rural (open),
hBS = 30 m, hUE = 1.5 m, f = 2000 MHz:
L(d) [dB] = 105.27 + 35.22 log10(d[km])
Tasks:
- UL power for UE1 ?
- expected SINR ?
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
PSD PSD
PSD = (Max_TX_Pwr – CELL_PWR_RED) – 10*log10( 12*# PRBs) PSD = (Max_TX_Pwr – CELL_PWR_RED) – 10*log10( 12*# PRBs)
Frequency Time
Allocated DL PRBs PDCCH
DL Pilots PDSCH, PCH BCH, SCH
For internal use only
35 © Nokia Siemens Networks /
DL-PC in RL10
Cell Power Reduction
PSD = (pMax - CELL_PWR_RED) - 10*log10( # PRBs_DL *12) - MIMO_COMP [dBm]
: Power Spectral Density, which specifies the constant absolute Power per 15kHz Resource Element (RE)
x: maximum eNodeB transmit power per Antenna in [dBm]
L_PWR_RED: O&M parameter
Bs_DL: maximum Number of downlink PRBs in given LTE Carrier Bandwidth
O_COMP: Compensation Factor
O_COMP = 0 dB for SISO/SIMO
O_COMP = 0...12 dB for MIMO Diversity and for MIMO Spatial Multiplexing
D given per antenna (RF amplifier output)
Bs not scheduled are blanked
Cell Power LNCEL dlCellPwrRed 0...10 dB, CELL_PWR_RED: Sets the power reduction from a antenna 0 dB
Reduce step 0.1 dB maximum Tx power
MIMO LNCEL dlpcMimoComp 0...10 dB, When TxDiv or 2x2 MIMO SM is used, gain applies in downlink. 0 dB
Compensation step 0.1 dB Parameter shall be set according to known gain (typically 3dB).
• Overview
• UL-PC: Overview
• UL-PC: PUSCH
• UL-PC: PUCCH
• UL-PC: SRS
• UL-PC: Control Scheme
• UL-PC: Closed Loop
• UL-PC: Parameters
• DL-PC: RL10
• DL-PC: PC on PDCCH
4-CCE
OUTPUT_LIST_DL_AMC_CCH
from DL-AMC-CCH
• required AGG levels per UE per DCI format
• assigned AGG levels per UE per DCI format
• pdcchCQI per UE …to DL-PHY
• calculated TOTAL_NUM_CCEs
(all available CCEs; PHICH&PCFICH considered)
OUTPUT_LIST_DL_PC_CCH
from DL-PC-CCH
Build the Power Basket • power levels to be applied for all scheduled UEs
(“free unused” power on PDCCH)
Count unused power from unscheduled CCEs
Decrease the power for all UEs with assigned
If the Power Basket is still not empty, relocate the
AGG level equal to the required AGG level to
excess power equally among all scheduled UEs.
meet the 1% BLER target and count the amount
to the Power Basket
Increase the power for all UEs with the assigned Modify the Power Basket according to the amount
AGG level lower than the required AGG level to of power used for boosting.
meet the 1% BLER target.