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N-Channel Logic Level Enhancement

Mode Field Effect Transistor

NIKO-SEM

P75N02LDG
TO-252 (DPAK)
Lead-Free

D
PRODUCT SUMMARY
V(BR)DSS

RDS(ON)

ID

25

5m

75A

1. GATE
2. DRAIN
3. SOURCE

G
S

ABSOLUTE MAXIMUM RATINGS (TC = 25 C Unless Otherwise Noted)


PARAMETERS/TEST CONDITIONS
Gate-Source Voltage
TC = 25 C

Continuous Drain Current


1

Repetitive Avalanche Energy

VGS

20

75
50
170

IAR

60

L = 0.1mH

EAS

140

L = 0.05mH

EAR

5.6

TC = 25 C

Power Dissipation

UNITS

IDM

Avalanche Current
Avalanche Energy

LIMITS

ID

TC = 100 C
Pulsed Drain Current

SYMBOL

Operating Junction & Storage Temperature Range


1

Lead Temperature ( /16 from case for 10 sec.)

mJ

60

PD

TC = 100 C

32.75

Tj, Tstg

-55 to 150

TL

275

THERMAL RESISTANCE RATINGS


THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

Junction-to-Case

RJC

2.3

Junction-to-Ambient

RJA

62.5

Case-to-Heatsink

RCS

UNITS

C / W

0.6

Pulse width limited by maximum junction temperature.


Duty cycle 1

ELECTRICAL CHARACTERISTICS (TC = 25 C, Unless Otherwise Noted)


PARAMETER

SYMBOL

TEST CONDITIONS

LIMITS
UNIT
MIN TYP MAX

STATIC
V(BR)DSS

VGS = 0V, ID = 250A

25

VGS(th)

VDS = VGS, ID = 250A

Gate-Body Leakage

IGSS

VDS = 0V, VGS = 20V

250

Zero Gate Voltage Drain Current

IDSS

VDS = 20V, VGS = 0V

25

VDS = 20V, VGS = 0V, TJ = 125 C

250

Drain-Source Breakdown Voltage


Gate Threshold Voltage

V
1.5

3
nA
A

SEP-02-2004

N-Channel Logic Level Enhancement


Mode Field Effect Transistor

NIKO-SEM
1

On-State Drain Current

ID(ON)

Drain-Source On-State
1
Resistance

RDS(ON)
1

Forward Transconductance

VDS = 10V, VGS = 10V

gfs

P75N02LDG
TO-252 (DPAK)
Lead-Free
70

VGS = 10V, ID = 30A

VGS = 7V, ID = 24A

VDS = 15V, ID = 30A

16

m
S

DYNAMIC
Input Capacitance

Ciss

Output Capacitance

Coss

Reverse Transfer Capacitance

Crss

800

Qg

140

Total Gate Charge

2
2

Gate-Source Charge
2

Gate-Drain Charge

5000
VGS = 0V, VDS = 15V, f = 1MHz

Qgs

VDS = 0.5V(BR)DSS, VGS = 10V,

40

Qgd

ID = 35A

75

Turn-On Delay Time

td(on)

tr

VDS = 15V, RL = 1

td(off)

ID 30A, VGS = 10V, RGS = 2.5

24

Rise Time

Turn-Off Delay Time


2

Fall Time

pF

1800

nC

tf

nS

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 C)


Continuous Current
Pulsed Current

3
1

Forward Voltage

Reverse Recovery Time


Peak Reverse Recovery Current
Reverse Recovery Charge

IS

75

ISM

170

VSD

IF = IS, VGS = 0V

1.3

trr
IRM(REC)

IF = IS, dlF/dt = 100A / S

Qrr

A
V

37

nS

200

0.043

Pulse test : Pulse Width 300 sec, Duty Cycle 2.


Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
1
2

REMARK: THE PRODUCT MARKED WITH P75N02LDG, DATE CODE or LOT #


Orders for parts with Lead-Free plating can be placed using the PXXXXXXXG parts name.

SEP-02-2004

N-Channel Logic Level Enhancement


Mode Field Effect Transistor

NIKO-SEM

P75N02LDG
TO-252 (DPAK)
Lead-Free

TO-252 (DPAK) MECHANICAL DATA


mm

mm

Dimension

Dimension
Min.

Typ.

Max.

Min.

Typ.

Max.

9.35

10.4

0.89

2.03

2.2

2.4

6.35

6.80

0.45

0.6

5.2

5.5

0.89

1.5

0.6

0.45

0.69

0.5

0.9

0.03

0.23

3.96

5.2

6.2

4.57

5.18

2
1

SEP-02-2004

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