MCQ in Field Effect Transistor Devices

Monday, January 13, 2020 5:05 PM

Practice Exam Test Questions

1. Which of the following controls the level of ID? VGS
2. Which of the following is (are) not an FET? p-n channel
3. What is the range of an FET's input impedance? 1 MΩ to several hundred MΩ
4. Which of the following transistor(s) has (have) depletion and enhancement types? MOSFET
5. A BJT is a current-controlled device. The JFET is a voltage-controlled device.
6. The BJT is a bipolar device. The FET is a unipolar device.
7. Which of the following is (are) the terminal(s) of a field-effect transistor (FET). Drain, Gate,
Source
8. What is the level of IG in an FET? Zero ampere
9. At which of the following is the level of VDS equal to the pinch-off voltage? When ID becomes
equal to IDSS, When VGS is zero volts, IG is zero
10. At which of the following condition(s) is the depletion region uniform? No bias
11. Refer to the following characteristic curve. Calculate the resistance of the FET at VGS = -0.25 V if
ro = 10kΩ. 11.378 kΩ

12. What is the level of drain current ID for gate-to-source voltages VGS less than (more negative than)
the pinch-off level? Zero ampere
13. The three terminals of the JFET are the gate, drain and source.
14. The level of VGS that results in ID = 0 mA is defined by VGS = VP.
15. The region to the left of the pinch-off locus is referred to as the ohmic region.
16. Which of the following represent(s) the cutoff region for an FET? ID = 0 mA, VGS = VP, IG = 0
17. Referring to this transfer curve. Calculate (using Shockley's equation) VGS at ID = 4 mA. -2.54 V

18. Referring to this transfer curve, determine ID at VGS = 2 V. 0.444 mA

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19. What is the ratio of ID / IDSS for VGS = 0.5 VP? 0.25
20. The drain current will always be one-fourth of IDSS as long as the gate-to-source voltage is one-
half the pinch-off value.
21. Which of the following ratings appear(s) in the specification sheet for an FET? Voltages between
specific terminals, current levels, power dissipation
22. Refer to this portion of a specification sheet. Determine the values of reverse-gate-source voltage
and gate current if the FET was forced to accept it. -25 Vdc, 10 mAdc

23. Hand-held instruments are available to measure βdc for the BJT.
24. How many terminals can a MOSFET have? 3 or 4
25. Which of the following applies to MOSFETs? No direct electrical connection between the gate
terminal and the channel, Desirable high input impedance, Uses metal for the gate, drain and
source connections
26. Referring to the following transfer curve, determine the level of VGS when the drain current is 20
mA. 1.66 V

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27. Refer to the following curves. Calculate ID at VGS = 1 V. 4.167 mA

28. It is the insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable
high input impedance of the device.
29. Refer to the following figure. Calculate VGS at ID = 8 mA for k = 0.278 x 10^-2 A/V2. 3.70 V

30. The transfer curve is not defined by Shockley's equation for the enhancement-type MOSFET.

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 30. The transfer curve is not defined by Shockley's equation for the enhancement-type MOSFET.
31. Which of the following applies to safe MOSFET handling? Always pick up the transistor by the
casing, power should always be off when network changes are made, always touch ground
before handling the device
32. What is the purpose of adding two Zener diodes to the MOSFET in this figure? To protect the
MOSFET for both polarities

33. Which of the following is (are) the advantage(s) of VMOS over MOSFETs? Reduced channel
resistance, higher current and power ratings, faster switching time
34. Which of the following FETs has the lowest input impedance? JFET
35. Which of the following input impedances is not valid for a JFET? 108 Ω
Fill in the blanks Questions
1. A junction field-effect transistor (JFET) is a voltage-controlled device.
2. The FET is a unipolar device depending solely on either electron (n-channel) or hole (p-channel)
conduction.
3. One of the most important characteristics of the FET is its high-input impedance.
4. The MOSFET transistor has become one of the most important devices used in the design and
construction of integrated circuits for digital computers.
5. In the n-channel transistor, the drain and source are connected to the n-type channel while the gate
is connected to the two layers of the p-type material.
6. In an FET transistor, the depletion region is wider near the top of both p-type materials.
7. The pinch-off voltage continues to drop in a parabolic manner as VGS becomes more and more
negative.
8. The region to the right of the pinch-off locus is commonly referred to as the constant-current /
saturation / linear amplification region.
9. As VGS becomes more negative, the slope of each curve in the characteristics becomes more
horizontal corresponding with an increasing resistance level.
10. The transfer curve can be obtained by using both Shockley's equation and by output
characteristics
11. The active region of an FET is bounded by ohmic region, cutoff region, power line.
12. A(n) curve tracer can be used to check the condition of an FET.
13. In a curve tracer, the per step reveals the distance between the VGS curves for the n-channel
device.
14. In an FET circuit, VGS is normally the parameter to be determined first.
15. The primary difference between the construction of a MOSFET and FET is the construction of the
gate connection.
16. The primary difference between the construction of depletion-type and enhancement-type
MOSFETs is the absence of the channel.
17. The level of VGS that results in the significant increase in drain current in enhancement-type
MOSFETs is called threshold voltage VT.
18. In an n-channel enhancement-type MOSFET with a fixed value of VT, the higher the level of
VGS, the more the saturation for VDS.
19. The enhancement-type MOSFET is in the cutoff region if applied VGS is less than or equal to

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 19. The enhancement-type MOSFET is in the cutoff region if applied VGS is less than or equal to
VGS(Th).
20. The specification sheet provides VGS(on), ID(on), VGS(Th) to calculate the value of k for
enhancement-type MOSFETs.
21. CMOS has high input impedance, fast switching speeds, and lower operating power levels.
22. The FET resistance in the ohmic region is largest at VP and smallest at the origin.
23. The silicon dioxide (SiO2) layer used in a MOSFET is an insulator.
24. In an n-channel depletion-type MOSFET, the region of positive gate voltages on the drain or
transfer characteristics is referred to as the enhancement region with the region between cutoff and
the saturation level of ID referred to as the depletion region.
25. VMOS FETs have a positive temperature coefficient that will combat the possibility of thermal
runaway.

Link: https://pinoybix.org/2019/07/mcq-in-field-effect-transistor-devices-boylestad.html

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