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Voltage Regulation
Presentation #4
2017
c
2 Anti Windup
Slew rate limiter
Conditional integration for anti windup
Feedback form of bi-proper controller for anti windup
3 Digital control
Continuous time and discrete time
Digital Redesign
Time delay due to digital conversion and process
Sensor and transducers are essential that can be considered as the eyes in
control systems.
In photovoltaic power systems, the signals of voltage and current are usually
measured.
Additional information, such as solar irradiance and temperature, can also be
sensed to improve control system performance.
Ideal measuring devices including sensors, transducers, and signal
conditioners can be defined as:
The magnitude of output impedance is as low as possible to output strong
signals against noise and signal distortion;
The magnitude of input impedance is as high as possible to avoid any distortion
to the measured signal;
The bandwidth is as high as possible to capture all essential dynamics;
The transducer output is linear over a large range;
All parameters are time invariant.
vo (s) R1
=
vi (s) R1 R2 Cs + R1 + R2
R3
vo1 = Vref + vac
R4
vo (s) R1
=
vo1 (s) R1 R2 Cs + R1 + R2
Photovoltaic Power System: Modelling, Design, and Control 5 / 36
Waveform in AC voltage measurement
An offset voltage (Vref) is applied at the Op-Amp input port to shift the AC
signal to DC signal
v
ac
vo
Vref
0
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
Time (s)
All physical systems shows a certain level of constraints, of which the input
and output should be limited to its top or bottom scale.
For the example of switching-mode power converters, the duty cycle of PWM
ranges from 0 to 100 %, furthermore, the values voltage and current can
reach certain limits.
Therefore, limiters are commonly implemented to constraint the control
variable before the plant to avoid any misplacement.
The PID controller output can reach the saturation limit if the error value is
significantly presented between the reference and the plant output.
Voltage (V)
40
39
38 Setpoint
vpv (V)
37
1.5 2 2.5 3 3.5 4 4.5
280
Ppv (V)
270
260
250
1.5 2 2.5 3 3.5 4 4.5
Duty cycel (%)
100
50
0
−50
1.5 2 2.5 3 3.5 4 4.5
Time (ms)
Photovoltaic Power System: Modelling, Design, and Control 9 / 36
Anti-windup solution by slew rate limiter
40
Voltage (V)
38 Setpoint
v (V)
pv
1.5 2 2.5 3 3.5 4 4.5
285
280
P (V)
275
pv
270
265
1.5 2 2.5 3 3.5 4 4.5
24
Duty cycel (%)
22
20
18
16
14
12
1.5 2 2.5 3 3.5 4 4.5
Time (ms)
1000
600 Irradiance (W/m2)
200
2 2.5 3 3.5 4 4.5
43
37
30 Setpoint vpv (V)
20
2 2.5 3 3.5 4 4.5
P (W)
200 pv
0
2 2.5 3 3.5 4 4.5
100
0
−100 PWM Duty (%)
2 2.5 3 3.5 4 4.5
Time (ms)
Photovoltaic Power System: Modelling, Design, and Control 11 / 36
Detection and conditional integration for anti windup
1000
Irradiance (W/m2)
600
200
2 2.5 3 3.5 4 4.5
43
37
30 Setpoint vpv (V)
20
2 2.5 3 3.5 4 4.5
200 P (W)
pv
0
2 2.5 3 3.5 4 4.5
100
PWM Duty (%)
50
0
2 2.5 3 3.5 4 4.5
Time (ms)
Photovoltaic Power System: Modelling, Design, and Control 13 / 36
Feedback form of bi-proper controller for anti windup
When the limiter takes no action, the value of Û is equal to U. The controller
transfer function is expressed as
U(s) 1
= = C(s)
E(s) 1 + [C(s)−1 − 1]
The controller output can be expressed as
Û(s) = E(s) − [C −1 (s) − 1]U(s)
When saturation happens, the value of Û is unequal to U since the limiter is in
action. The value of U is constrained by the saturation value, Usat .
Û(s) = [E(s) − C −1 (s)Usat ] + Usat
A special note should be given that the feedback form of the biproper
controller was developed for the case that C(s) shows positive static gain.
However, the static gain of C(s) can be negative when it is derived for the PV
link voltage regulation.
The sign should corrected before the anti-windup implementation.
Therefore, the implementation is revised for the voltage regulation of PV link.
1000
Irradiance (W/m2)
600
200
2 2.5 3 3.5 4 4.5
43
37
30 Setpoint v (V)
pv
20
2 2.5 3 3.5 4 4.5
Ppv (W)
200
0
2 2.5 3 3.5 4 4.5
100
PWM Duty (%)
50
0
2 2.5 3 3.5 4 4.5
Time (ms)
Voltage (V)
to DC signal. 0
The scaling factor is 20:1 shown −311
as Signal-1. 0 0.01 0.02 0.03 0.04 0.05
Signal 1 (V)
3
2
amplitude of the AC signal with
1
the scale factor of 10:1, which 0
0 0.01 0.02 0.03 0.04 0.05
shows better resolution than the
previous case.
Signal 2 (V)
3
2
The direction of zero crossing 1
should be detected for Signal-2 0
0 0.01 0.02 0.03 0.04 0.05
to differentiate the negative and Time (s)
positive cycle.
The command signal (R) can be either analog signal from outside or digital
input that is embedded inside the processor memory.
The holder is required to maintain the discrete signal and convert it into
continuous-time signals.
the common type is the zero-order holder (ZOH) that holds each sample
value for one sample interval, which is expressed as the simple form
1 − e−sTs
GZOH =
s
where Ts is the sampling time interval
It should be noted that the sampler, A/D, processor, D/A, and holder can be
integrated in one microcontroller that significantly reduce the component
count of the overall system.
The controller function is executed and programmed inside the processor with
memory support.
Advanced transducers can be integrated with digital processors, signal
conditioning, samplers, and A/D, which are able to output digital signal.
Data communication is required to interface the intelligent transducer with the
control
Photovoltaic processor.
Power System: Modelling, Design, and Control 23 / 36
Typical digital control loop
The sampling frequency in digital controlled systems refers to the flow rate of
digital values, which is limited by the bandwidth of the sensing components
and the processing speed of the digital controller. .
The Nyquist-Shannon sampling theory defines the minimal frequency of the
sampling rate that allows the sampled signal sequence to capture all
important dynamic information from the continuous-time signal.
The Nyquist frequency is defined as the half of the sampling frequency, which
is the upper band limit in digital control system dynamics.
In general, high sampling frequency is desirable for the best representation of
the analogy system.
However, constraints should be applied to achieve high sampling rate due to
the physical limit or the coefficient resolution due to the z-transformation.
The approach converting the analog controller into the digital controller is
called as digital redesign.
The concept allows that an analog controller is firstly designed by the
synthesis methods, such as the Affine parameterziation.
The stability margins and robustness should be evaluated before the
transformation from analog to digital.
Two common methods can be applied to approximate the digital controller to
fulfill the function of the analog controller.
The Bilinear method, which is also called Tustin transformation, can be
utilized to transform from s-domain to z-domain, which are expressed as
2 1 − z −1
s≈
Ts 1 + z −1
Ts − 2τd
The symbols of u and e represent the a1 = (1a)
controller output and the error value in 2τd + Ts
the control loop. KP Ts + 2KP τd + 2KD
b0 = (1b)
2τd + Ts
The index of k is applied to represent the
KP Ts − 2KP τd − 2KD
operating sequence in discrete time. b1 = (1c)
2τd + Ts
Photovoltaic Power System: Modelling, Design, and Control 28 / 36
Matched pole-zero method
Another approximation is based on the match among the pole, zero, and gain
between the analog controller and the digital counterpart.
The approximation is shown as zi ≈ esi Ts , where zi represents the zero or
pole in the z-domain and si is the zero or pole in the s-domain.
The pole and zero of the PD controller in s domain can be derived as
1
pc = − (2a)
τd
KP
zc = − (2b)
KP τd + KD
The analog controller is then transformed to a digital controller accordingly by
the match of pole and zero,
1 − eZc Ts z −1
CPD (z) = KPZ
1 − epc Ts z −1
The gain can be back-calculated to match the static gain in s-domain.
Kp(1 − epc Ts )
KPZ =
1 − eZc Ts
Photovoltaic Power System: Modelling, Design, and Control 29 / 36
Bode diagrams to compare analog control with the redesigned digital counterparts
Match before 10
the Nyquist
0
frequency;
Magnitude (dB)
Deviation when −10
the frequency is
close to the −20
Nyquist
−30
frequency. 270
Nyquist 225
Phase (deg)
frequency as
180
the boundary for
C(s)
digital; 135 CTustin(z)
Cmatch(z)
Analog 90
3 4 5 6 7
controller does 10 10 10 10 10
Frequency (rad/sec)
not show the
frequency limit; Higher sampling frequency indicates wider bound for digital.
In the hybrid control loop, additional dead time or time delay is introduced by
the sampler, A/D, D/A, holder, and the digital controller process.
When the controlled variable is sampled and converted to digital data, the
control algorithm is operated by software operation that consumes a certain
amount of time.
The controller output, i.e. the PWM duty cycle in controlling power interfaces,
can only be updated by the next PWM cycle.
Time delay can be expected in the output stage, sensor, and signal
conditioning.
The total time delay can be estimated to be several sampling time periods
depending on the programming and digital implementation.
The time delay introduces phase lag and lowers the phase margin of a
closed-loop system.
The deduction of phase margin can be calculated by
Td × ωCP × 360◦
φD =
2π
where Td and ωCP are the delayed time and the cross frequency when the
phase margin is measured.
Photovoltaic Power System: Modelling, Design, and Control 32 / 36
System controlled by analog controller
37.6
37.4
37.2 Setpoint
37 vpv (V)
1.5 2 2.5 3 3.5 4 4.5
20
10
1.5 2 2.5 3 3.5 4 4.5
Time (ms)
Photovoltaic Power System: Modelling, Design, and Control 33 / 36
System controlled by digital controller with sampling rate of 400 kHz
Voltage (V)
37.6
37.4
37.2 Setpoint
37 v (V)
pv
36.8
1.5 2 2.5 3 3.5 4 4.5
288.2
288
287.8
287.6 Ppv (W)
287.4
1.5 2 2.5 3 3.5 4 4.5
Sensors, transducers, and signal conditioning circuits are briefly included into
the discussion.
The system design constraints are presented with the consideration of the
system bandwidth and integral windup in real-world applications.
Even though the windup is not widely discussed in PV power systems, the
side effect is significant to degrade control performance and reduce PV power
harvesting.
The presentation also introduce the anti-windup solution including different
methods.
The slew rate limiter for the setpoint is effective to eliminate the windup that is
caused by the sudden change of the reference value.
The condition integration is effective to eliminate the windup that is caused by
various resources, such as the disturbance resulted from the significant
irradiance variation. However, this requires the integral path can be
distinguished from the controller format.
The feedback form of biproper controller is a general and effective solution for
anti windup when the controller is stable, non-minimal, and biproper.
Photovoltaic Power System: Modelling, Design, and Control 35 / 36
Summary