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Chaper 7

Voltage Regulation
Presentation #4

Dr. Weidong Xiao

School of Electrical and Information Engineering


University of Sydney, Australia

2017
c

Photovoltaic Power System: Modelling, Design, and Control 1 / 36


Outline

1 Fundamental of sensor, transducer, and signal conditioning

2 Anti Windup
Slew rate limiter
Conditional integration for anti windup
Feedback form of bi-proper controller for anti windup

3 Digital control
Continuous time and discrete time
Digital Redesign
Time delay due to digital conversion and process

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Sensor, transducer, and signal conditioning

Sensor and transducers are essential that can be considered as the eyes in
control systems.
In photovoltaic power systems, the signals of voltage and current are usually
measured.
Additional information, such as solar irradiance and temperature, can also be
sensed to improve control system performance.
Ideal measuring devices including sensors, transducers, and signal
conditioners can be defined as:
The magnitude of output impedance is as low as possible to output strong
signals against noise and signal distortion;
The magnitude of input impedance is as high as possible to avoid any distortion
to the measured signal;
The bandwidth is as high as possible to capture all essential dynamics;
The transducer output is linear over a large range;
All parameters are time invariant.

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Cascade connection of sensor and signal conditioner

A typical measurement for the voltage signal of vi :

The output signal of vo is eventually presented at the input port of


analog-to-digital (A/D) converter for digital control implementation.
The cascaded connection of the sensor and signal conditioner distorts the
measured signal due to the input and output impedance, as expressed
  
Zi2 (jω) Zi3 (jω)
vo (jω) = vi (jω)
Zo1 (jω) + Zi2 (jω) Zo2 (jω) + Zi3 (jω)
Only if |Zi2 (jω)| >> |Zo1 (jω)| and |Zi3 (jω)| >> |Zo2 (jω)|, the distortion can be
minimized.
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Example of voltage measurement circuits

The voltage follower is formed by the operational amplifier (Op-Amp), which


shows the feature of high input impedance and low output impedance.
The measurement and signal conditioning for DC voltage is straightforward.
Sensing AC voltage is trickier since the majority of A/D converters accepts
only low-voltage DC signal at the input port.
DC voltage measurement:

vo (s) R1
=
vi (s) R1 R2 Cs + R1 + R2

An offset voltage is added for AC


voltage measurement:

R3
vo1 = Vref + vac
R4

vo (s) R1
=
vo1 (s) R1 R2 Cs + R1 + R2
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Waveform in AC voltage measurement

An offset voltage (Vref) is applied at the Op-Amp input port to shift the AC
signal to DC signal

v
ac

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

vo

Vref

0
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
Time (s)

Signal conditioning is usually required in sensing circuit to manipulate the


measured signal for the next stage of processing.
It provide the functions of noise filtering, signal scaling, and impedance match
of input and output terminals.
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Introduction of anti windup

All physical systems shows a certain level of constraints, of which the input
and output should be limited to its top or bottom scale.
For the example of switching-mode power converters, the duty cycle of PWM
ranges from 0 to 100 %, furthermore, the values voltage and current can
reach certain limits.
Therefore, limiters are commonly implemented to constraint the control
variable before the plant to avoid any misplacement.
The PID controller output can reach the saturation limit if the error value is
significantly presented between the reference and the plant output.

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Introduction of anti windup

Before the error is completely eliminated, the integration term in PI or PID


controller continuously accumulate the error regardless the saturation.
Depending on the time period of the existing error, the integral term can make
the controller output up to a high value.
The limiter constraints the controller output by saturation.
The correction happens until the sign of error is changed, however, the
correction takes a long period due to the continuous integration.
Therefore, the phenomena is also named as the integral windup or integrator
windup.
In general, the windup effect results in sluggish operation that contribute
significant overshoot or undershoot in time-domain response.
The significant value of the error can results from many resources, such
sudden setpoint change, significant disturbances, and improper controller
design.
The windup can be avoided if the controller takes action when saturation
happens.
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Voltage regulation illustrating the saturation and windup effect

Voltage (V)
40
39
38 Setpoint
vpv (V)
37
1.5 2 2.5 3 3.5 4 4.5

280
Ppv (V)

270
260
250
1.5 2 2.5 3 3.5 4 4.5
Duty cycel (%)

100
50
0
−50
1.5 2 2.5 3 3.5 4 4.5
Time (ms)
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Anti-windup solution by slew rate limiter

40

Voltage (V)
38 Setpoint
v (V)
pv
1.5 2 2.5 3 3.5 4 4.5

285
280
P (V)

275
pv

270
265
1.5 2 2.5 3 3.5 4 4.5

24
Duty cycel (%)

22
20
18
16
14
12
1.5 2 2.5 3 3.5 4 4.5
Time (ms)

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Windup effect that is caused by sudden irradiance variation

1000
600 Irradiance (W/m2)
200
2 2.5 3 3.5 4 4.5

43
37
30 Setpoint vpv (V)
20
2 2.5 3 3.5 4 4.5

P (W)
200 pv

0
2 2.5 3 3.5 4 4.5

100
0
−100 PWM Duty (%)
2 2.5 3 3.5 4 4.5
Time (ms)
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Detection and conditional integration for anti windup

It is also called as the clamping method.


The input for the integral path is set to zero when windup is detected.
The implementation of the conditional integration is straightforward in digital
control systems.

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Anti-windup solution by the conditional integration

1000
Irradiance (W/m2)
600
200
2 2.5 3 3.5 4 4.5

43
37
30 Setpoint vpv (V)
20
2 2.5 3 3.5 4 4.5

200 P (W)
pv

0
2 2.5 3 3.5 4 4.5

100
PWM Duty (%)
50
0
2 2.5 3 3.5 4 4.5
Time (ms)
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Feedback form of bi-proper controller for anti windup

The implementation is general, whcih is not limited to the parallel-form


implementation of the PID or PI controller.
It is applicable for any controller type, which is stable, biproper, and minimum
phase.
When a controller is synthesized and shown as C(s), it can be inverted and
implemented as the feedback form for anti windup.
The limiter is integrated inside the feedback form of the controller.

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Feedback form of bi-proper controller for anti windup

When the limiter takes no action, the value of Û is equal to U. The controller
transfer function is expressed as
U(s) 1
= = C(s)
E(s) 1 + [C(s)−1 − 1]
The controller output can be expressed as
Û(s) = E(s) − [C −1 (s) − 1]U(s)
When saturation happens, the value of Û is unequal to U since the limiter is in
action. The value of U is constrained by the saturation value, Usat .
Û(s) = [E(s) − C −1 (s)Usat ] + Usat

Û(s) = C −1 (s)(Ûsat − Usat ) + Usat


When saturation, the controller maintains the output without accumulating the
error.
When the controller output is out of the saturation, the controller is back to the
standard form
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Feedback form of bi-proper controller for anti windup with a negative static gain

A special note should be given that the feedback form of the biproper
controller was developed for the case that C(s) shows positive static gain.
However, the static gain of C(s) can be negative when it is derived for the PV
link voltage regulation.
The sign should corrected before the anti-windup implementation.
Therefore, the implementation is revised for the voltage regulation of PV link.

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Anti-windup effect that is formed by the feedback form of bi-proper controller

1000
Irradiance (W/m2)
600
200
2 2.5 3 3.5 4 4.5

43
37
30 Setpoint v (V)
pv
20
2 2.5 3 3.5 4 4.5

Ppv (W)
200

0
2 2.5 3 3.5 4 4.5

100
PWM Duty (%)
50
0
2 2.5 3 3.5 4 4.5
Time (ms)

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Advantages of digital control

Digital control technique adopts software programming that shows the


following advantages:
Digital controller is less susceptible to noise and parameter variation due to
aging and operating environment.
Digital control becomes more cost effective than the traditional analog control
approach thanks to the latest development of the microcontroller technology.
High accuracy and control bandwidth can be achieved thanks to the advanced
microcontroller technology.
Control routine can be maintained accurately through programming. One digital
controller is capable to conduct the operation for multiple control loops.
It shows flexibility for complex control law, controller tuning, and redesign.
It is capable of data storage, data communication, advanced human machine
interfaces, i.e. graphic and digital display etc.
Component count can be reduced by using digital controller to avoid
complication in analog control approaches.
Overall power consumption can be reduced thanks to low component count and
advance in microcontroller technology.
It is flexible to redesign or retune the controller through programming.

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Hybrid system with digital controller

A control system for PV power applications is commonly constructed in the


hybrid format.
A typical control system includes three different signal formats, which are
analog, discrete, and digital in the control loop.

Signal format Alternative name Description


analog signal continuous-time signal ◦ continuous in time
◦ measured signals of voltage and current
discrete signal sampled signal ◦ pulse amplitude-modulated
◦ generated by sampler and holder
digital data digital signal ◦ coded numerical data
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Procedure to construct a hybrid system with the digital control implementation

A control system can be designed in the continues time domain and


implemented in a hybrid system using the digital controller.
1 Modelling should be initialized to derive the nominal plant model in the
continuous time domain, such as the nominal transfer function, G0 (s), which
shows the fundamental information of the damping and response speed.
2 System review should be always performed to identify all constraints including
disturbance, noise source, time delay, non-minimal phase zeros, damping level,
and model uncertainty etc.
3 Analog controller can be synthesized by various approaches, such as the Affine
parameterization and other design tools.
4 Frequency domain analysis should be performed to evaluate the stability
margins and sensitivity peak using either Bode diagram or Nyquist plot. All
system constraints should be considered.
5 The digital redesign procedure includes the selection of the sampling frequency
and the controller transformation from s-domain to z-domain. The controller is
eventually implemented in the discrete-time format.
6 Time delay caused by digital approach should be re-considered to check if the
phase margin is still sufficient.
7 Evaluation can be based on the time-domain simulation, and then the
experimental test.
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Sampled measurement of AC voltage signal

The analog signal is continuous in time that is sensed by the transducer.


The sampler produces the discrete signal from the analog signals.
The units of the analog-to-digital (A/D) and digital-to-analog (D/A) are the
interfaces between the discrete signal and digital data.
Sensing DC signal is generally straightforward since the digital system is DC
based.
For example, the voltage signals that is measured as 220 V in RMS and 50
Hz in frequency, can be transformed to two forms of discrete low-voltage DC
signals for measurement since the majority of A/D converters accepted only
DC signal within the upper limit of 5 V or lower.
The AC to DC conversion and scaling ratio can be achieved by the signal
conditioning circuit.
Signal conditioning is usually required in sensing circuit to manipulate the
measured signal for the next stage of processing.

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Sampled measurement of AC voltage signal

One discrete signal includes the


DC offset to shift the AC signal 311

Voltage (V)
to DC signal. 0
The scaling factor is 20:1 shown −311
as Signal-1. 0 0.01 0.02 0.03 0.04 0.05

Another captures only the

Signal 1 (V)
3
2
amplitude of the AC signal with
1
the scale factor of 10:1, which 0
0 0.01 0.02 0.03 0.04 0.05
shows better resolution than the
previous case.

Signal 2 (V)
3
2
The direction of zero crossing 1
should be detected for Signal-2 0
0 0.01 0.02 0.03 0.04 0.05
to differentiate the negative and Time (s)

positive cycle.

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Digital implementation for hybrid control systems

The command signal (R) can be either analog signal from outside or digital
input that is embedded inside the processor memory.
The holder is required to maintain the discrete signal and convert it into
continuous-time signals.
the common type is the zero-order holder (ZOH) that holds each sample
value for one sample interval, which is expressed as the simple form
1 − e−sTs
GZOH =
s
where Ts is the sampling time interval
It should be noted that the sampler, A/D, processor, D/A, and holder can be
integrated in one microcontroller that significantly reduce the component
count of the overall system.
The controller function is executed and programmed inside the processor with
memory support.
Advanced transducers can be integrated with digital processors, signal
conditioning, samplers, and A/D, which are able to output digital signal.
Data communication is required to interface the intelligent transducer with the
control
Photovoltaic processor.
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Typical digital control loop

The sampling time period is controlled by


timer.
The overflow interrupt of timer trigger the
digital control process.
The processor first read out the
measured variables from the data buffer
of the A/D unit.
The A/D unit should be re-activated for
the next sampling and analog to digital
conversion.
For the power interface in PV power
systems, the controller output signal is
mostly represented by the duty cycle of
PWM or sometimes phase shift angles. Data logging can be conducted to save
the measured variable as historic data.
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System representation and transformation in discrete time and continuous time

A dynamic system can be represented and analyzed in either continuous time


or discrete time.

In continuous time, the differential equations and transfer functions in


s-domain can be transformed to the discrete time through z transformation.
Control and digital filtering can be conducted in z-domain.
Difference equations can be implemented in digital controller for executing
control functions.
Sampling rate should be always included for the transformation.

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System representation and transformation in discrete time and continuous time

The sampling frequency in digital controlled systems refers to the flow rate of
digital values, which is limited by the bandwidth of the sensing components
and the processing speed of the digital controller. .
The Nyquist-Shannon sampling theory defines the minimal frequency of the
sampling rate that allows the sampled signal sequence to capture all
important dynamic information from the continuous-time signal.
The Nyquist frequency is defined as the half of the sampling frequency, which
is the upper band limit in digital control system dynamics.
In general, high sampling frequency is desirable for the best representation of
the analogy system.
However, constraints should be applied to achieve high sampling rate due to
the physical limit or the coefficient resolution due to the z-transformation.

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Bilinear method for analog to digital conversion

The approach converting the analog controller into the digital controller is
called as digital redesign.
The concept allows that an analog controller is firstly designed by the
synthesis methods, such as the Affine parameterziation.
The stability margins and robustness should be evaluated before the
transformation from analog to digital.
Two common methods can be applied to approximate the digital controller to
fulfill the function of the analog controller.
The Bilinear method, which is also called Tustin transformation, can be
utilized to transform from s-domain to z-domain, which are expressed as

2 1 − z −1
 
s≈
Ts 1 + z −1

where the symbol Ts refers to the sampling period.

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Example of Bilinear method for analog to digital conversion

A PD controller can be converted to the digital controllers in z-domain using


bilinear method.
(KP Ts + 2KP τd + 2KD ) + (KP Ts − 2KP τd − 2KD )z −1
CPD (z) =
(2τd + Ts ) + (Ts − 2τd )z −1
It can be converted into the difference equation for the digital controller
implementation.

u(k ) = −a1 u(k − 1) + b0 e(k ) + b1 e(k − 1)

Ts − 2τd
The symbols of u and e represent the a1 = (1a)
controller output and the error value in 2τd + Ts
the control loop. KP Ts + 2KP τd + 2KD
b0 = (1b)
2τd + Ts
The index of k is applied to represent the
KP Ts − 2KP τd − 2KD
operating sequence in discrete time. b1 = (1c)
2τd + Ts
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Matched pole-zero method

Another approximation is based on the match among the pole, zero, and gain
between the analog controller and the digital counterpart.
The approximation is shown as zi ≈ esi Ts , where zi represents the zero or
pole in the z-domain and si is the zero or pole in the s-domain.
The pole and zero of the PD controller in s domain can be derived as
1
pc = − (2a)
τd
KP
zc = − (2b)
KP τd + KD
The analog controller is then transformed to a digital controller accordingly by
the match of pole and zero,
1 − eZc Ts z −1
CPD (z) = KPZ
1 − epc Ts z −1
The gain can be back-calculated to match the static gain in s-domain.
Kp(1 − epc Ts )
KPZ =
1 − eZc Ts
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Bode diagrams to compare analog control with the redesigned digital counterparts

Match before 10

the Nyquist
0
frequency;

Magnitude (dB)
Deviation when −10
the frequency is
close to the −20

Nyquist
−30
frequency. 270

Nyquist 225
Phase (deg)

frequency as
180
the boundary for
C(s)
digital; 135 CTustin(z)
Cmatch(z)
Analog 90
3 4 5 6 7
controller does 10 10 10 10 10
Frequency (rad/sec)
not show the
frequency limit; Higher sampling frequency indicates wider bound for digital.

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Time delay due to digital conversion and process

In the hybrid control loop, additional dead time or time delay is introduced by
the sampler, A/D, D/A, holder, and the digital controller process.

For microcontrollers, one A/D unit is


integrated together with the sampler,
which is commonly shared by N
channels that are distributed by the
analog multiplexer.

The input voltage is maintained by the capacitor for A/D conversion.


Time delay can be expected with consideration of the A/D conversion time
and capacitor charging time.
The inputs of the multiplexer is connected to signal conditioning circuits.
Low output impedance of the signal conditioners is ideal to achieve fast
sampling and minimize the time delay.

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Time delay due to digital conversion and process

When the controlled variable is sampled and converted to digital data, the
control algorithm is operated by software operation that consumes a certain
amount of time.
The controller output, i.e. the PWM duty cycle in controlling power interfaces,
can only be updated by the next PWM cycle.
Time delay can be expected in the output stage, sensor, and signal
conditioning.
The total time delay can be estimated to be several sampling time periods
depending on the programming and digital implementation.
The time delay introduces phase lag and lowers the phase margin of a
closed-loop system.
The deduction of phase margin can be calculated by
Td × ωCP × 360◦
φD =

where Td and ωCP are the delayed time and the cross frequency when the
phase margin is measured.
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System controlled by analog controller

37.6
37.4
37.2 Setpoint
37 vpv (V)
1.5 2 2.5 3 3.5 4 4.5

288.2 Ppv (W)


288
287.8
287.6
287.4
1.5 2 2.5 3 3.5 4 4.5

30 Duty cycle (%)

20
10
1.5 2 2.5 3 3.5 4 4.5
Time (ms)
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System controlled by digital controller with sampling rate of 400 kHz

Voltage (V)
37.6
37.4
37.2 Setpoint
37 v (V)
pv
36.8
1.5 2 2.5 3 3.5 4 4.5

288.2
288
287.8
287.6 Ppv (W)
287.4
1.5 2 2.5 3 3.5 4 4.5

35 Duty cycel (%)


30
25
20
15
1.5 2 2.5 3 3.5 4 4.5
Time (ms)
Photovoltaic Power System: Modelling, Design, and Control 34 / 36
Summary

Sensors, transducers, and signal conditioning circuits are briefly included into
the discussion.
The system design constraints are presented with the consideration of the
system bandwidth and integral windup in real-world applications.
Even though the windup is not widely discussed in PV power systems, the
side effect is significant to degrade control performance and reduce PV power
harvesting.
The presentation also introduce the anti-windup solution including different
methods.
The slew rate limiter for the setpoint is effective to eliminate the windup that is
caused by the sudden change of the reference value.
The condition integration is effective to eliminate the windup that is caused by
various resources, such as the disturbance resulted from the significant
irradiance variation. However, this requires the integral path can be
distinguished from the controller format.
The feedback form of biproper controller is a general and effective solution for
anti windup when the controller is stable, non-minimal, and biproper.
Photovoltaic Power System: Modelling, Design, and Control 35 / 36
Summary

At the end of the presentation, the digital control approach is briefly


discussed, which is based on the technique of digital redesign.
For power electronic applications, time delay is introduced by the digital
process including the sampling, A/D, computation, zero-order holder, and D/A
etc.
The delay can dramatically reduce the stability margins and cause oscillation
and even instability.
Special attention should be given to the digital redesign with the consideration
of the time delay that is caused by the digital processing.
In general, increasing the sampling frequency can reduce the delay time, but
require fast operation in digital controllers.
If the sampling frequency cannot be increased to solve the time delay effect,
the analog controller should be redesigned or re-tuned for a more
conservative approach.
The original design should provide more phase margin against the deduction
that is caused by the digital control approach.
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