You are on page 1of 5

VLSI LAB #09

M.SALMAN SHAHID
170401026

SUBMITTED TO
Objective:

 To understand behavirol modeling


 To undertsand verilog coding

Apparatus

 Model Sim

Procedure

 I wrote down the code and created test bunch for checking the fucnctionality of it

ALU
Test Bench
output

Encoder
Test Bench

Output

You might also like