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Design of a high power low losses DC-DC


converter for mining applications
Mohsen Ghaffarpour Jahromi, Galina Mirzaeva, Member, IEEE, Steven.D.Mitchell, Member, IEEE

Abstract-This paper proposes a new design procedure


for a bidirectional LCL converter which has a potential
to be applied in mobile mine equipment . This type of
a converter employs two DC/AC insulated-gate bipolar
transistor-based (IGBT) converters and a passive LCL filter
instead of a traditional high frequency transformer. LCL
filter design is based on both zero reactive power circulation
and minimization of voltage across the capacitor. Switching
losses are minimized by using soft switching operation.
Lower capacitor voltage and related lower stepping ratio Figure 1: IGBT based Bi-directional DC/DC converter
can be mitigated by choosing an appropriate switching fre­
quency. The designed converter has attractive performance
characteristics under DC faults. The design process and
converter performance evaluation are carried out using voltage zero-crossing results in a complicated protection
EMTP-RV digital simulation for a 20-MW 24kV/1.2kV strategy and arcing in circuit breakers [6], [7]. Advanced
converter. The proposed converter design is experimentally fault diagnostic methods considering both electrical and
validated by developing a 200-W lOOV/20V prototype
mechanical operations of electrical excavators have been
converter.
proposed in [8], with the main objective being safe
Index Terms-DC-DC power conversion, Design method­ operation prevention of machine damage.
ology, DC power systems, Resonant power conversion,
Another challenging area is choosing an appropriate
Mining industry.
DC/DC converters for the internal DC microgrid inside
electric excavators. Bidirectional operation capability is
I.
c
INTRODUCTION a key factor in selecting a converter topology. Many
technologies have been studied in literature for low
D
systems has been known as an effective way for
bulk power delivery. Since 1950s, HVDC transmis­ power systems. However, most of them are not applicable
sion are playing an important role in bulk power trans­ to megawatt power levels due to low efficiency and
mission, interconnecting two separate AC networks and low stepping ratio. Other limitations are associated with
connecting large off-shore wind farms to the main power the switching frequency, high power switches and high
grid [1], [2]. Recent developments in power electronic frequency transformer losses [9], [10].
technologies result in expanding of DC system applica­ A dual active bridge (DAB) DC/DC converter is the
tions into more areas, including aircraft, spacecraft, data most popular topology studied in literature. Although
centers and telecommunication, traction and shipboard these converters utilize soft switching to reduce losses,
power networks [3], [4]. The main advantages of DC their efficiency may suffer due to circulating power flow
system are higher power transfer and efficiency, reduced and magnetic core losses of high frequency transformers
voltage drop and longer trailing cables. [11], [12]. Recently, LCL converters have been proposed
In [5] a prospective application of a DC distribu­ as an efficient topology for MW range power transfer
tion system to open cut mines is presented, at both with a high stepping ratio [13], [14]. Losses are de­
mine site level and inside large electric excavators. creased by replacing of high frequency transformer with
Several alternative DC configurations are proposed to a capacitor, and by controlling the power flow between
the existing AC supplied system, covering both DC­ two bridges. The main limitation of the previously known
and AC-motor based excavators. The known challenges LCL converter design is that capacitor voltage of the LCL
of DC distribution systems include DC protection, fault tank is neglected, allowing this voltage to be much higher
diagnostics and stability. The lack of natural current or than nominal DC voltages on both sides.
The present contribution aims to develop a converter
Mohsen Ghaffarpour Jahromi, Galina Mirzaeva and topology with MW power transfer capability and high
Steven.D.MitcheU are with the School of Electrical and Computer
Engineering, University of Newcastle, Callaghan, N.S.W 2308, step ratio. The proposed design procedure considers zero
Australia. reactive power and active power balance within LCL

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2016-MIC-0743 Page 2 of 8

�laj l '�" '�' mt+a


I

Z=!:s; !:z:!= !:s; .


I I I I I I

2rr i

I I i I 0 i D.mt+a.
i i i iir i i i
"+------+I
Pi I I I I I

�::; 2" ' Viae

W
�:� W i [j I : j C+a.
I

,PI
: :

I
I

:
:;r

17r
I
:

I
I

:
:

I
I
:

I
I
211' I

: Figure 3: Equivalent circuit of LCL resonant tank


+Vi
I I
___ � ____ �:__ I

F=::;"'-�' : :

(1)
. .
. ... . . - . _ . . . ,- - _ . . , - - - - - ,- -

--,-- -- '----', -" ',---


.
· . .

--·-
, - -- ------, ----,--- ',--
· . .
. . (2)
-Vi ..... .t.-,;...-____....... . ... .
7r
where (31 and (32 are the conduction angles, /6 <

Figure 2: Firing signals and AC voltage with bipolar (31, (32 :s; 7r/2, and can be expressed as
modulation ( i=1,2 )
(3)

(4)
tank, as well as maintaining capacitor voltage at a desired
value. To achieve these goals, switched AC voltages where Mal and Ma2 are control signal magnitudes
must be controllable on both sides. An effective topology and 0 :s; Mal , Ma2 :s; 2/3. It can be seen that the AC
includes two voltage source converters (V SCs) based on voltages magnitude and phase are directly controlled by
insulated-gate bipolar transistors (IGBTs) as shown in using control signals (Mal and Ma2 ) and phase shifts
Figure L V SCs are able to control AC side voltages (0;1 and 0;2), respectively.
which do not exceed DC side voltages. This implies that By considering AC sine waves at the fundamental
lower voltage bridge does not see a high voltage stress frequency, the KCL and KVL result in:
[14].

VIae = Ve + jW Ll . flae (5)


V2ae = Ve + jwL2 ·f2ae (6)
II. DESIGN OF LCL CONVERTER
flae + f2ae = jWO . Ve (7)

A. Fundamental equations For convenience of control, we introduce quadrature


components for all phasors and call them dq, similar to
Some assumptions are made to apply steady-state space vectors. Without loss of generality, we align the
analysis and reduce complexity of calculations. Firstly, coordinate frame with vector V2ae (V2 q = 0).
both high-voltage VI and low-voltage V2 DC-sources are
constant, and 01 and O2 are big enough to prevent DC
sides from changing. Secondly, all switches, diodes and VIae = Vl d + jVl q (8)
LCL elements are assumed to be ideal and lossless. The V2ae = V2d (9)
main objective is having a controllable power transfer flae = lId + jh q (10)
between two bridges. A bidirectional modulation scheme
f2ae = 12d + jl2 q (11)
is therefore needed for both bridges, as shown in Figure
2. The same methodology is employed for low voltage Using the above equations, VIae and flae can be
and high voltage sides. Consequently, two V SCs can be expressed as function of V2d and f2ae by
presented by two pulse voltage sources connected to the
LCL resonant tank. The equivalent circuit is shown in
flae = jw O,V2d - k2 ·f2ae (12)
Figure 3.
VIae = kl . V2d - jwk3 . f2ae (13)
By extracting fundamental component from Fourier
series expansion, the peak line-neutral voltage magni­
2 2
where kl = 1 - w Ll 0 , k2 = 1 - w L20 and k3 =
tudes are (1-k,k2)/w2c = Ll + L2 - w 2 Ll L20.

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We introduce three resonant frequencies for the LCL C. Phase shift between VIae and V2ae
converter

J
1 L1 + L2
frLCL = 27r (14)
L1L2C
1
frl = (15)
27rVLIC
1
fr2 = (16)
27rVL2C
where frLcL is the main LCL resonant frequency, and Figure 4: Phasor Diagram for LCL resonant tank
frl and fr2 are the local resonant frequencies.
Figure 4 shows the phasor digram for the LCL circuit
B. Zero reactive power condition under zero reactive power condition. The phase shift
between two AC voltages is:
We apply zero reactive power condition to the both
sides of the LCL circuit. This forces the circuit to 1 V1 q
a = tan - (23)
operate with minimum current magnitudes, this redicing V1 d
the switching losses [14]. Zero reactive power at terminal
By substituting R2 from (21), we derive the phase shift
2 results in zero q-component for its current (because of
expression.
V2 q = 0). Therefore, the terminal 2 side behaves as a
resistive load with effective resistance R2 given by
(24)
V2 d
R2 = _ (17) The above equation implies that the phase shift be­
12d
tween VIae and V2ae is fixed for given constant L1, L2,
Using (17), we will rewrite equations (12) and (13) as C and w, and also forces the following condition

(25)
(18)
D. Power balance
(19)
We derive active power expressions for both side under
zero-reactive power circumstance:
The reactive power expression can be now derived by
using (18) and (19) ,
1, , IV12ae
PI = VI . h = -VIae · ha c = - (26)
2 2 R1
,
1, , IV22ae
P2 = V2 · 12 = -V2ae · 12ae = - (27)
2 2 R2
where Rl and R2 are the equivalent resistance seen by
R2 can be obtained by applying zero reactive condition each side, respectively. We will obtain Rl by applying
also at terminal 1 (Ql = 0): power balance condition ( PI = P2 ) and using equations
(1) and (2):

(21) (28)

(22)
E. Voltage step ratio

At given frequency w determined by switching pattern, The voltage step ratio is defined as:
and once L1, L2 and C are chosen, then effective V1acj (2 /31 -1)
sin
resistance at the LV side of the converter is constant. (29)
V2acj (2 /32 -1)
sin
Voltage V2ae changes in proportion to current 12ae like
for a DC load. After rearranging (19) and using (21)

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2016-MIC-0743 Page 4 of 8

Table I: Pre-resonant parameters


A 2 2 k1
VIae =V2ae
A

k2
(30) 1 - w2 L1 C
0.1
I 1 - w2
0.00025
L2C I w2 L2C
0.99975
0.5 0.00125 0.99875
Using (30) in (29) the voltage ratio is expressed as
0.8 0.002 0.998

k1 (2sin,8 2 _ 1) 2
(31)
k2 (2sin,81 - 1) 2 If we use some realistic values for implementa-
This voltage step ratio will be calculated for maximum tion such as k2 0.lorO.05(min) and kl
power transferring which is in full conduction (,81 = 0.9or 0.95(max) then we achieve not very high voltage
,8 2 =90°). step ratio 3 and 4.2, respectively. The step ratio can be
improved by another factor of 2 by limiting the range
on ,81, i.e. that at maximum load 2sin,82 - 1 = 1 and
(32)
2sin,81 - 1 = 0.5. Using these values in equation (31)
gives 6 and 8 for the voltage ratio, which is still not very
Above equation indicates that both k1 and k2 are of
high.
the same sign and Ik11 > Ik21 (V2 < VI). From (21), k3
2) Post-resonant case: Both kl and k2 are negative,
must be positive, which means switching frequency must
and the switching frequency w is greater than both local
be less than the LCL resonance frequency. 2
resonance frequencies (i.e. w L1C > 1 and w L1C >
2
According to the above conditions, we introduce two
1). Therefore, it can be simply realized from (18) and
operation cases for converter: a) pre-resonant case and
(19) that the real parts of both VIae and [la c (V1d and
b) post-resonant case. The aim is to find the realistic
maximum voltage ratio for each case.
hd) are negative. Figure 6 shows the phasor diagram for
2 different relationship between VIae and V2ae.
1) P re-resonant case: Both (1 - w L1C) and (1 -
2
w L2C) are greater than zero, and the switching fre­
quency w is less than both local resonance frequencies
2 2
(i.e. 0 < w Ll C < 1 and 0 < w Ll C < 1). Therefore,
both real and imaginary parts of VIae and i1ae are
positive. Figure 5 shows the phasor diagram for different
relationship between V Iae and V2ae.

Vl'�" �'V"i",' I' Figure 6: Phasor diagram for LCL resonant tank in post­

iWL,I, , "
resonant case

U V2.� Vl••
Jw�Th<

In this case, the phase shift between two AC side


voltages is calculated as

Figure 5: Phasor diagram for LCL resonant tank in pre­ = - tan -


1 / 1 -1. (34)
ex 7f V k1 k2
resonant case
By considering the condition (25), the below condition
must be satisfied in this case.
For this case, instability becomes a big problem for
high step ratio in full power transferring. For example,
(35)
say VI =12kV and V2 =0.6kV and then using equation
(32) For example, if k2 = -0.05 then the minimum value

( 12000 ) 2 =400
-- (33)
for k1 is -20, which gives a maximum voltage ratio
of 20 (compared to 4.2 in pre-resonant case). Therefor,
600 higher voltage step ratio can be realistically implemented
in post-resonant case, which is clearly a preferred option
It is noted that both terms kl and k2 are positive and
for the converter design.
less than one, and then, k1 < 1jk2. Table I presents some
calculated values for these terms to give a clear picture.
It can be seen that L2C must be tuned very close but F. Capacitor voltage
not equal to w. If L2C varies slightly then L2C > �2 The voltage across the capacitor can reach several
and k2 becomes negative, and this causes instability. times the high voltage level, which would cause a high

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current passing from the capacitor. Using equations (22) current for side 2 and 1 determined from (17) and (18),
nad (32), we obtain kl and k2 as respectively:

VI � 1
kl = --y1 -r­ (36) 12aese2.n = - (46)
V2 ,
2
V2 V2 � �
k2 = kl . -2 = --y1 -r- (37) haeSe2.n = -'----'- (47)
VI VI ,
where, = wCR2 �� and must be less than one. Thus, where subscript "n" denotes the normalized value.
the maximum value for C is Therefore, , can be presented as a single design
parameter for converter. Figure 7 shows k2, Vc and
V2 1 normalized fault currents versus " for a 100-MW 300-
Cm ax = . . (38)
VI wR2 kV120 kV 1500 Hz test system. It is observed that
As a result, the capacitance C is expressed as increasing, causes decreasing Vc and short circuit cur­
rents, which is desired. However, this results in reducing
C = " Cm ax. (39) the absolute value of k2, which may lead to the system
instability. For the ease of estimating " the resonant
From (6) and (17), we calculate the capacitor voltage
frequencies for the converter has been plotted in Figure
8. The converter resonant frequency is approaching the
- . V2d . 2 1 switching frequency as , is decreasing. As a result, ,
Ve = V2 d+ JwL2 = V2d(1+ JW L2C ). (40)
R2 R
w 2C
:A-
must be carefully selected to avoid any instability caused
It is noted that V2d = and deriving (36) and (37) by working close to the resonant frequency.
into (40), the capacitor voltage magnitude is calculated:

(41)

',L____�--------�
G. DC fault analysis
gam:! gama
Prior to applying the fault analysis to the LCL con­
verter, we assume that the converter is operating atn
full power and that the switches remain at maximum
conduction ((31 = (32 = 7r /2) for high-power application.
This results in having a constant magnitude for VIae
equal to 4V1/7rV2. A DC fault is applied at terminal 2
(V2 = 0), which implies V2ae = O. Using this condition " L__________���
with (5), (6) and (7), we can calculate the short circuit gama gama

currents at both sides as


Figure 7: System variables versus,

- j - 1
12aese2 = � VIae' (42)
L2 + k2Ll
Il aeSe2 = -k2 . 12aeSe (43)

where subscript "ScT denotes the fault at terminal 2.


With considering the aforementioned conditions and
using (36) and (37), we calculate the magnitude of short
1450 0'-----------'-
- ., ----­
circuit currents as
gama gama

4Vl wC Figure 8: Resonant frequencies versus,


12aese2.m = 7r V2 . � (44)

4Vl . wC III. DESIGN PROCEDURE


haeSe2 m = k2 . V2 �
7r
(45)
This section illustrates the design steps for the afore­
The normalized values for AC fault currents can be mentioned converter with assuming given the maximum
obtained by dividing (44) and (45) to the magnitude rated power P2; and both DC side voltages, VI and V2.

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2016-MIC-0743 Page 6 of 8

4
A

Step 1: FInd V2ac = -; V2. all voltages in simulation are measured as pole-neutral
Step 2: Calculate R2 using (27). values.
-V2
Step 3: Plot graphs as in Figure 7 and choose "( for
an acceptable range of Vc and k2.
Step 4: For selected "(, calculate k1, k2 and Cm ax
using (36), (37) and (38), respectively.
Step 5: The capacitance C and inductance L1 and L2 1.6 2
Time(s)
can be determined as


IOOO
500
0
wmmm
-Vc
· · · · · · ·
..... .. -j········· 1 · ........ ( .. .....:........ ·t········· ; " ........ ( .. ... .
'" ...... : ...... .. j ... ..... : ...... ...'.... ......; ....... .. : ... ...... : ...... ..
(48)

(49) .::=
0.9995 1 1.0005 1.001 1.0015 1.002 1.0025 1.003 1.1)035
Time (!I)
-Hac
(50)

IV. SIMULATION AND COMPARISON W ITH OTHER


TECHNIQUE
,��' �
Jliltlt
0.9995

-I2ac
t 1.0005 1.001 1.0015 1.002
Timc(s)
1.0025 1.003 1.0035

In order to confirm the validity of the presented design

'J�
procedure, we compare the results to the work by lovcic
and Zhang [14] for a lOOMW 300-kV120 kV LCL
converter. Using illustrated design steps and Figure 7
0.9995 I 1.0005 1.001 l.0015 1.002 1.0025 1.003 1.0035
and 8, we have selected "( = 0.65 as the optimal value, Timc(s)

which can provide reasonable values for k2, Vc, ha c sc


and 12a c sc (-0.0507, 1.32pu, 1.17pu and 1.54pu, respec­
'� -llac-Vlac-QI
. . . . . . 't
tively). Table II shows the design values for converter by
following the both methods. The first advantage of the
' L�0.9995 J 1.0005 tOOl 1.0015 1.002 1.0025 Ul03 1.0035
Time(s)
proposed design procedure is better stability due to using
lower absolute value of k2 (approximately 5 times). -1.2ac-V2ac-Q2

Table II: System Designed Parameters


Design Parameters
Max Power
VI
I Presented method
100 MW
300 kV
I lovcic method
100 MW
300 kV
,�� -2 -:
0.9995 1
'
1.0005
:
1.001
'�-
1.0015 1.002 1.0025 1.003 1.0035
Timc(s)

V2 20 kV 20 kV Figure 9: Simulation results


Switching frequency 1500 Hz 1500 Hz
Calculated parameters 'Y = 0.65 kl =-3
Ll 98.4 mH 42.133 mH Another advantage of presented design is lower har­
L2 8.3 mH 10.674 mH monics at the high voltage side because of a higher L1
C 1.4181 ftF 1.0688 ftF (around twice compared to lovcic and Zhang) as shown
R2 3.2423 Q 6.4846 Q
in Table II. This leads to decreased stress on switches
and lower losses. It can be clearly seen that more
Simulation of the designed converter has been im­ harmonics are associated with lovcic method in Figure
plemented in EMTP-RV software environment. Figure lOa. Furthermore, another prominent improvement in
9 depicts the converter operation in steady state at the proposed method is power transfer capability. In
maximum voltage and power level, which implies that [14] the LCL converter cannot deliver maximum power
conduction angles are 7f /2 at both sides. The LCL res­ under zero-reactive power condition. Using (22), the
onant tank operates as an AC transformer and capacitor effective resistance R2 is 6.4846D, which is halved in
voltage has a sinusoidal waveform. By considering side the proposed design. This by virtue of (27) implies that
2 as load side, the active power flows from side 1 to the transferred power is twice as higher in the proposed
0
side 2 and equation (17) indicates that 12a c has 180 design, as illustrated in Figure lOb.
phase shift with voltage in zero reactive power condition.
Nonetheless, the AC voltages and currents are in phase V. EXPERIMENTAL VERIFICATION

with each other for the bridge 1, which results in zero A 200-W laboratory prototype converter was built to
switching and minimizing stress on switches. Note that validate the design procedure and simulation model. The

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Page 7 of 8 2016-MIC-0743

0' 4

0.2 ...

-Hac

... .

......... .

.. . .

.

.. .. ....•.... .. . .

........ .

.. . .

; .. .. ...

1::� 0.9995 1 1.0005 1.001 1.0015


Tim.(,)
1.002 1.0025 1.003 1.0035

(al High-voltage side AC current

<:jEr: mm '
-P2

0.2 ·
mml Figure 11: Experiment Setup

o ------�------�----�----��----�
o � u U U 2
Tim.(,)
(b 1 Transferred Power

Figure 10: Converter operation at steady-state for 10vcic


parameters

hardware setup included IGBT-switches and driver board,


an LCL tank, a National Instrument (NI) FPGA module,
voltage and current sensors, Lab VIEW software and DC
power supplies, as shown in Figure 11. Experiments Figure 12: Measured HV-side AC voltage and current in
were carried out with the converter operating in buck steady state
mode stepping down the voltage from 100 VDC (input)
to 20 VDC (output). By considering the design proce­
dure in section III, I 0.63 was selected to achieve
=

Vc 1 .22 pu, as depicted in Table III.


=

Table III: 200W Prototype Converter Parameters


Design Parameters I Presented method I
Max Power 200 W
VI 100Y
V2 20Y
Switching frequency 1000 Hz
Calculated parameters 'Y - 0.63
Ll 5 mH Figure 13: Measured LV-side AC voltage and current in
L2 1.2 mH
steady state
C 24.7/.lF
Vc 1.22 Pu

The converter was tested with a passive resistive load


on the low-voltage side (R 2 D). Control signals were =

set as to achieve maximum power transfer. Figures 12,


13,15 and 14 show the measured converters voltages
and currents. All voltages were measured as line-neutral
according to definitions in aforementioned sections. It
can be seen easily that the AC Voltages atin HV-side and
LV-side are in phase with the AC currents. The capacitor
voltage is also limited to 1 .23pu which is so close to
design value. Figure 14: Measured Capacitor voltage in steady state

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2016-MIC-0743 Page 8 of 8

0.0 0.0 0.0 500.0 ut. .�


prototype converter, which proves accuracy of the design
and correctness of the proposed methodology.
/ldC The control aspects of the proposed converter are
addressed in a companion paper.
\
. /VdC
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post-resonant case is recommended for achieving higher Oct 2009.


[14] D. Jovcic and L. Zhang,"Lei dc/dc converter for dc grids," Power
step ratios and for improving system stability. The main Delivery, IEEE Transactions on, vol. 28, no. 4, pp. 2071-2079,
advantages of the proposed design, as compared to the Oct 2013.
previous studies, are lower harmonics at the supply side,
improved system stability and ability to deliver maximum
power.
A 100-MW 600-kV/40-kV DC/DC converter was sim­
ulated in EMTP-RV software environment and analyzed
in detail. The proposed design procedure is verified by
simulation results during steady state operation. The
design is experimentally validated on a 200-W laboratory

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