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Lecture 2
Introduction to Microfabrication
1
Srikar Vengallatore, McGill University
Market need
Creativityy Evaluation
& experience C
Concept
t of competition
In-house
In house D t il
Detail Management
expertise decisions
Product Specification
2
1
Structural Embodiment Phase of Design
But,….
Structural Design is Severely Constrained
by Process Limitations
Micro Engine
MACRO Engine
2
Metallic vs. Ceramic Materials
Silicon Microengine 5
Kalpakjian and Schmid
Photolithography
Patterning
g E-beam lithography
g p y
Ion beam lithography
Subtractive Soft lithography
Processes Processes
Additive Evaporation
Wet etching
Sputtering
Dry etching Processes CVD
Plasma etching
Electrodeposition
DRIE
Wafer bonding
Polishing
Package Microdevice
3
Microfabrication differs from macro-machining in several ways:
Subtractive p
processes: Wet etching,
g, dryy etching,
g, ion milling,
g,
deep reactive ion etching,…
4
Starting Material: Substrate
•Typical characteristics:
•Shape:
p Circular p
plates ((also called wafers))
•Size: ~1 mm thickness
~10 cm diameter
•Pyrex
•Gallium arsenide
•SiC
•……
10
5
How are Silicon Wafers Specified?
Chemistry: Purity; Dopant concentration
Geometry: Diameter;
Thickness;
Total thickness variations;
Surface finish and polish;
B
Bow and
d warpage;
Crystallographic Orientation;
Primary & secondary flats
Specification of Chemistry
Typically, O 2: 5 – 25 ppm
C: 1 – 5 ppm
Metals: < 1 ppb
12
6
Crystallography of Substrates
Amorphous
Single Crystals
Grain boundary
Polycrystalline
13
[Ohring]
Simple Cubic
14
7
Directions of a Cubic Crystals
z [0,0,1]
[1,0,1]
Unit Distance
y [0,1,0]
[1,1,0]
x [1,0,0]
15
[0,0,1]
[0,1,0]
[1,0,0]
8
Examples of Low Index Planes
17
[Senturia]
[0,0,1] (1 1 0)
[0,1,0]
[1,0,0] [1 1 0]
9
Two Important Results for Cubic Crystals
Result 2. The angle (γ) between two planes with indices
(h1 k1 l1) and (h2 k2 l2) is given by
⎡1 + 0 + 0 ⎤ 1
γ = cos −1 ⎢ ⎥ = cos −1 = 54.7 0
⎣ 1 3 ⎦ 3
19
(111) Wafers
Look for the primary flat
(100) Wafers
20
[Maluf]
10
Representation of a Simple Process Flow
1 mm
10 cm
21
Thin-Film Deposition
1 mm
Thin Film
1 μm
22
11
Photolithographic Patterning
Photoresist
(~ 1 μm thick)
23
Opaque coating
Transparent
plate
12
Exposure to Ultraviolet Radiation 25
Exposed photoresist
is soluble
13
Etching: Selective Corrosion to Remove Material
27
28
14
Next: A Surface-Micromachining Process..
Silicon
Oxide
Silicon 29
[Maluf]
Silicon oxide
30
15
Mask
Photo
resist
polysilicon
Silicon
Oxide
31
[Maluf]
Sacrificial Oxide
32
[Maluf]
16
2-d Representation of Process Flows
33
34
Substrate Silicon Oxide Polysilicon
17
Interpretation of Floating Structures
35
BULK MICROMACHINING:
Selective Removal Material from Substrate
36
(Maluf)
18
Clarifies angle
of this surface
37
Photolithography
Pattern E-beam lithography
g p y
Formation Ion beam lithography
Subtractive Soft lithography
Processes Processes
Additive Evaporation
Wet etching
Sputtering
Dry etching Processes CVD
Plasma etching
Electrodeposition
DRIE
Wafer bonding
Polishing
Package Microdevice
38
19
Lithos: Stone graphy: to write
H d
Hardware: S
Source off UV radiation
di ti ((aligner)
li )
Photoresist (polymer)
Chemical solvents
39
Coat
Photoresist
Expose to
Ultraviolet radiation
Develop
mask
40
20
Spin Coating and the Importance of Low Viscosity
Centrifugal forces vs. Viscosity
photoresist
•To create small features (<1.0 μm), use thin resists (1.0 μm)
Rule of Thumb
Photoresist thickness scales with feature size
42
21
Two Types of Photoresists
Before Exposure
After Exposure
22
Examples of Positive & Negative Resists
45
[Madou]
Photolithographic Aligners
Source of Radiation
Focusing optics
46
[Senturia]
23
http://www.physics.mcgill.ca/nanotools/
ALIGNER
47
Photolithography
Pattern E-beam lithography
g p y
Formation Ion beam lithography
Subtractive Soft lithography
Processes Processes
Additive Evaporation
Wet etching
Sputtering
Dry etching Processes CVD
Plasma etching
Electrodeposition
DRIE
Wafer bonding
Polishing
Package Microdevice
48
24
THIN FILM USUALLY IMPLIES….
49
•Electrodeposition •Sputter-deposition
•Pulsed-laser
deposition
•Oxidation
50
25
GENERIC VAPOR-DEPOSITION PROCESS
Source of atoms (target)
Vapor of atoms
substrate
vacuum
52
26
GEOMETRIC PARAMETERS
No lateral uniformity
No thickness uniformity
53
CONFORMALITY OF COATING
•Ability to coat topographic features
i.e., ability to conform to surface features
Sidewall
Top surface
CONFORMAL NON-CONFORMAL
54
27
Material Addition Using Wafer Bonding
Wafer 1
Wafer 2
56
28
IR Image of Bond Formation
57
Photolithography
Pattern E-beam lithography
g p y
Formation Ion beam lithography
Subtractive Soft lithography
Processes Processes
Additive Evaporation
Wet etching
Sputtering
Dry etching Processes CVD
Plasma etching
Electrodeposition
DRIE
Wafer bonding
Polishing
Package Microdevice
58
29
Key Concept:
Material Removal by Chemical Corrosion
Exposed photoresist
is soluble
59
•How
H llong will
ill the
th process take
t k (i.e.,
(i KINETICS)?
•Is
I the
th etch
t h ISOTROPIC or ANISOTROPIC?
(i.e., what SHAPES can I make?)
30
Kinetics: Diffusion vs. Reaction Control
(Madou) 61
Diffusion-Limited Kinetics:
-Rate of arrival of reactants controls rate of reaction
Reaction-Limited Kinetics:
-Rate of interfacial reaction controls reaction rate
62
31
Selectivity of Etch
masking layer
Substrate to be
etched
63
Structural Material
Sacrificial Material
Substrate
REQUIREMENT:
Etch
Et h Sacrificial
S ifi i l M Material
t i l
without damaging Substrate
or Structural Materials
64
[Maluf]
32
Isotropic vs. Anisotropic Etches
Isotropic
Etch front
Anisotropic 65
-Ashing
-Reactive-Ion Etching
66
33
Overview of Microdevice Manufacture
Starting Material: Substrate (wafer)
Photolithography
Pattern E-beam lithography
g p y
Formation Ion beam lithography
Subtractive Soft lithography
Processes Processes
Additive Evaporation
Wet etching
Sputtering
Dry etching Processes CVD
Plasma etching
Electrodeposition
DRIE
Wafer bonding
Polishing
Package Microdevice
67
•Learn
Learn to find information.
information
68
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