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The 555 timer is a versatile and widely used device because it can be configured in
two different modes as either a monostable multivibrator (oneshot) or as an astable
multivibrator (oscillator). An astable multivibrator has no stable states and therefore
changes back and forth (oscillates) between two unstable states without any external
triggering.
+VCC
(8)
R 555
5 kW
(6) Comparator A
Threshold +
(5)
Control
voltage R (3)
R Q Output
5 kW S
Output
+ buffer
(2)
Trigger
Comparator B
(7)
Discharge
R
5 kW
Discharge
transistor Q1
(1) (4)
GND Reset
Figure 6.46 Internal functional diagram of a 555 timer (pin numbers are in parentheses).
Basic Operation
An external resistor and capacitor connected as shown in Figure 6.47 are used to
set up the 555 timer as a nonretriggerable oneshot. The pulse width of the output
is determined by the time constant of R1 and C1 according to the following formula:
w = 1.1 1 1 (6.24)
(4) (8)
RESET VCC
R1
(7)
DISCH (3)
555 OUT
(6) (5)
THRESH CONT
(2)
TRIG
C2
Figure 6.47 The 555 timer C1 GND
0.01 µF
connected as a oneshot. (1)
Before a trigger pulse is applied, the output is LOW and the discharge transistor
Q1 is ON, keeping C1 discharged as shown in Figure 6.48(a). When a
negativegoing trigger pulse is applied, the output goes HIGH and the discharge
transistor turns OFF, allowing capacitor C1 to begin charging through R1 as shown
in Figure 6.48(b). When C1 charges to 2 CC ⁄3, the output goes back LOW and Q1
turns ON immediately, discharging C1 as shown in Figure 6.48(c). As you can see,
the charging rate of C1 determines how long the output is HIGH.
+VCC
(8)
R 555
R1 5 kW
(6) A
+ LOW
(5)
R HIGH (3) LOW
R Q
5 kW Output
S
B
+
HIGH (2)
LOW
Trigger
(7)
Q1
R
0V 5 kW
C1
ON
(1) (4)
(a)
+VCC
(8)
R 555
R1 5 kW
(6) A
+ LOW
(5) to
R to
(3)
R Q Output
VC1 5 kW S
0 B
to +
(2)
(7)
Q1
R
Charging
Figure 6.48 5 kW
Oneshot operation of C1
the 555 timer: (a) Prior OFF
to trigger, and (b) When (1) (4)
triggered. (b)
+VCC
(8)
R 555
R1 5 kW
(6) A
+ t1
(5) 1.1R1C1
2 R t t
CC to t1 (3) o 1
3 R Q Output
VC1 5 kW S
0 to t1 B
+
(2)
HIGH LOW
(7)
Q1
R
Disharging
at t1 5 kW
C1
ON
(1) (4)
(c)
EXERCISE 6.9
For is the output pulse width for a 555 monostable circuit with R = 2.2 kW and
What 1
C1 = 0.01 µF?
Answer 24.2 µs
Astable Operation
(4) (8)
RESET VCC
R1
(7)
DISCH
555 (3)
R2 OUT
(6)
THRESH
(5)
(2) CONT
TRIG C2
GND 0.01 µF
C1
(1) (decoupling optional)
+VCC
(8)
R 555
(6) A
+
(5)
R (3)
R1 R Q Vout
S
B
+
(2) 2 1 2 1
(7)
Q1
R2 R 2 1 2 1
0V
2 2 2 2 on off on
CC
3 VC C1
1 (1) (4)
CC
1 1 +VCC
3
Initially, when the power is turned on, the capacitor C1 is uncharged and thus
the trigger voltage (pin 2) is at 0 V. This causes the output of comparator B to be
HIGH and the output of comparator A to be LOW, forcing the output of the latch,
and thus the base of Q1, LOW and keeping the transistor OFF. Now, C1 begins
charging through R1 and R2 as indicated in Figure 6.50. When the capacitor voltage
reaches CC ⁄3, comparator B switches to its LOW output state, and when the
capacitor voltage reaches 2 CC ⁄3, comparator A switches to its HIGH output state.
This RESETS the latch, causing the base of Q1 to go HIGH, and turns on the
transistor.
This sequence creates a discharge path for the capacitor through R2 and the
transistor, as indicated. The capacitor now begins to discharge, causing comparator
A to go LOW. At the point where the capacitor discharges down to CC ⁄3,
comparator B switches HIGH; this SETS the latch, which makes the base of Q1
LOW and turns off the transistor. Another charging cycle begins, and the entire
process repeats. The result is a rectangular wave output whose duty cycle depends
on the values of R1 and R2. The frequency of oscillation is given by the Equation
(6.25) as follows:
.
=( (6.25)
1 2) 1
By selecting R1 and R2, the duty cycle of the output can be adjusted. Since C1
charges through R1 + R2 and discharges only through R2, duty cycles approaching a
minimum of 50 percent can be achieved if R2 >> R1 so that the charging and
discharging times are approximately equal.
An expression for the duty cycle is developed as follows. The time that the
output is HIGH (tH) is how long it takes C1 to charge from CC ⁄3 to 2 CC ⁄3. It is
expressed as
tH = 0.7(R1 + R2)C1 (6.26)
The time that output is LOW (tL) is how long it takes C1 to discharge from 2 CC⁄3
to CC ⁄3. It is expressed as
tL = 0.7R2C1 (6.27)
The period, T, of the output waveform is the sum of tH and tL. Therefore,
T = tH + tL = 0.7(R1 + 2R2)C1
H 1 2
Duty cycle = = 100% (6.28)
1 2
To achieve duty cycles of less than 50 percent, the circuit in Figure 6.49 can be
modified so that C1 charges through only R1 and discharges through R2. This is
achieved with a diode placed as shown in Figure 6.51. The duty cycle can be made
less than 50 percent by making R1 less than R2. Under this condition, the expression
for the duty cycle is
1
Duty cycle = 100% (6.29)
1 2
+VCC
(4) (8)
RESET VCC
R1
(7)
DISCH
555 (3)
OUT
R2 (6)
D1 THRESH
(5)
(2) CONT
TRIG
GND C2
C1 (1) 0.01 µF
Figure 6.51 The addition of diode D1 allows the duty cycle of the output to
be adjusted to less than 50 percent by making R1 < R2.
1 2 . kW . kW
Duty cycle = 100% = . kW . kW
100% = 59.5%
1 2