Development of an Active Harmonic Filter using an Interleaved SiC Inverter

Dhrubo Rahman, Bryce Aberg, M A Awal, Yukun Luo, Li Yang, Dr. Wensong Yu, Dr. Iqbal Husain

Overview Method Results Future Work

Objective: Topology:  For same grid inductance and 1% (peak-  Design of passive components and
peak) current ripple injection, gate driver
 Develop a 150 A (50 kVAR) Active interleaved topology needs smaller
Harmonic Filter (AHF) using converter-side inductor (90% volume  Controller implementation
interleaved SiC-based inverter reduction and 50% power loss
reduction), and 87% reduction in DC  Cooling system design
 Peak system efficiency > 98% with 1.2 kV/25 mΩ Wolfspeed bus capacitance compared to non-
switching frequency > 50 kHz
Six-pack Power Module
interleaved counterpart  Final system assembly and testing
 Three-phase SiC inverter with LCL filter
 Four-quadrant operation capability
with up to 51th harmonic cancellation  Each phase consists of three Potential Impact
and THD < 5% interleaved sub-phases
 Improved efficiency and power density
and reduced cost compared to Si-based
 Power density > 1 kW/L  Switching frequency: 100 kHz
 The LCL filter self-resonance frequency solution.
Control Strategy: shifts higher (> 3 times) and the
 Prepare reference design document
effective switching frequency also  Utilization of SiC-based power devices
with all details and performance  Indirect Current Control with reduction
increases 3 times for system-level performance
in current sensor requirement and
improvement.
 Skilled WBG technology workforce decreased computational burden
 Upper limit of attainable control
development
bandwidth is increased significantly  Establish viability of SiC- based AHF by
 Dynamic current balancing of
providing a benchmark
 Provide platform to evaluate interleaved sub-phases
fundamental concepts proposed by fres > 3fres
graduate students  CPU +FPGA based controller (using
Xilinx Zynq 7000 System on Module)
-60 dB

1. Controller docking System Architecture:

1
board
2. Gate driver
 Development of busbar based on “plug- fs 3fs

3. Global busbar n-play” architecture

2 4. Local busbar Partners
3
5. Power module  Grid-side current has up to 51th
6. Coldplate  Low inductance local busbar harmonic cancellation with <2% THD
5 4 7. Turbulator incorporating customized high-current
8. Sensor board
6
9. Inductors
power connectors
7
8
 Global busbar for system level
9 interconnection

Interleaved SiC Inverter based Active Harmonic Filter  Modular voltage and shunt-based
current sensor board SiC Interleaved AHF Simulation under steady-state