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3084 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO.

11, NOVEMBER 2011

A Comprehensive Study of Neutral-Point


Self-Balancing Effect in Neutral-Point-Clamped
Three-Level Inverters
Jie Shen, Member, IEEE, Stefan Schröder, Senior Member, IEEE, Robert Rösner, and Said El-Barbari

Abstract—Neutral point (NP) balancing problems in neutral-


point-clamped (NPC) three-level inverters have been widely dis-
cussed in the past. Most of the previous researches have focused
on the active NP control algorithms based on the common-mode
duty cycle injection or the differential-mode harmonic current in-
jection. Various active control methods have been proven to work
well in real applications. On the other hand, it is well known that
sometimes the NP is self-balanced, even without any active NP
control. However, due to the uncertainty and lack of the theoreti-
cal explanations, active NP controllers are typically preferred for
real applications, and the self-balancing characteristic of the NPC
topology did not draw much attention in the past. Our paper cov-
ers this gap: the mechanisms of self-balancing characteristic are
explored systematically. With the help of a precise mathematical
model, readers can easily evaluate the self-balancing capability
of their own design. In addition, this paper discusses some meth- Fig. 1. NPC three-level inverter with differential-mode current control.
ods to enhance the self-balancing capability of an existing system.
It is shown here that the self-balancing effect depends strongly
on the switching frequency. Especially, for high-power insulated
gate bipolar transistor/integrated gate-commutated thyristor/gate depicted in Fig. 1. However, as a parasitic effect, NPC inverters
turn-OFF thyristors (IGBT/IGCT/GTO) applications, the effect may have neutral point (NP) balancing issues, which are caused
is so strong at all power factors that this “do-nothing” control is by the current that flows back to the NP inp . The dc component
sufficient and no other active NP controls are needed. in the NP current may be caused by nonideal components in
Index Terms—Neutral point (NP) control, neutral-point- the inverter and leads to a continuous unsymmetrical power
clamped (NPC) inverter, self-balancing. flow between the positive and negative dc-link. The two dc-link
voltages may deviate from each other continuously and may
finally destroy the components. In addition, a third-harmonic
I. INTRODUCTION component in the NP current exists as an inherent character of
OWADAYS, neutral-point-clamped (NPC) three-level in- the NPC topology, since the momentary NP current inp that
N verters [1] are an attractive topology for high-power elec-
tronics systems due to the high-power density, harmonic perfor-
flows back to the dc midpoint is not constant.
SEVERAL papers have referred to the NP dc balancing
mance, and cost saving for passive components [5]. [3]–[10] and third-harmonic suppression [11], [12] in the past.
Basically, the same control concept as known from two-level In this paper, we assume that sufficient capacitance has been
topologies [2] can be applied for three-level NPC inverters, as installed in the dc-link so that the third-harmonic voltage os-
cillation of the NP can be accepted. Hence, we only focus on
the dc unbalance in this paper. Previous study shows that all
space-vector modulations and the most carrier-based NP con-
Manuscript received June 14, 2010; revised November 17, 2010; accepted trol algorithms can be categorized as “common-mode duty cycle
March 19, 2011. Date of current version November 18, 2011. Recommended injection” [3]–[8]. In contrast, the concept proposed in [9] can be
for publication by Associate Editor F. Wang.
J. Shen is with the GE Global Research Europe, Munich 85748, Germany, categorized as “differential-mode harmonic current injection”.
and also with the RWTH Aachen University, Aachen 52062, Germany (e-mail: The various active NP controls have been proven to work well
jie.shen@research.ge.com). in real applications.
S. Schröder is with the GE Global Research Europe, Munich 85748,
Germany (e-mail: stefan.schroeder@research.ge.com). On the other hand, it is well known that the NP may be
R. Rösner was with the GE Global Research Europe, Munich 85748, “self-balanced,” even without any active controls, the NP po-
Germany. He is now with the Center of Excellence for Controls & Power tential sometimes does drift a little but is then stabilized at a
Electronics, Global Research Facility, Munich 85748, Germany (e-mail:
robert.roesner@ge.com). certain unbalance level, as shown in zones (1), (2), and (3)
S. El-Barbari is with the GE Global Research Europe, Munich 85748, of Fig. 2. This “self-balancing” effect can be observed at dif-
Germany (e-mail: said.el-barbari@research.ge.com). ferent power factors, including pure reactive power. This effect
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. seems to be strong in high power [e.g., gate turn-OFF thyristors/
Digital Object Identifier 10.1109/TPEL.2011.2138161 integrated gate-commutated thyristor/insulated gate bipolar
0885-8993/$26.00 © 2011 IEEE

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Fig. 2. One scenario of NP self-balancing effect at PF = 1, fsa /f0 = 40,


1 M = 1.

transistor (GTO/IGCT/IGBT)], low-to-medium switching fre-


quency (hundreds of hertz to several kilohertz) NPC systems [3].
Based on that, active NP controls may only need to be activated
when the dc unbalance exceeds a certain level, e.g., hysteresis-
type NP control [3], [5]. However, the NP potential may drift
dramatically (i.e., the self-balancing character lost), if the mea-
sured positive and negative dc-link voltages are used for the duty
cycle calculation, i.e., when using dc-link voltage compensation,
as shown in zone (4) of Fig. 2. Another paper [10] explored that
this self-balancing effect can be caused by the harmonic cur-
rent at the ac side, and also concluded that the effect should Fig. 3. Noise injection during the PWM modulation.
be very weak in high-power applications, which does not seem
always true. Due to the uncertainties and lack of theoretical
square signal. Later, this can be expressed as an infinite Fourier
explanations, this passive “self-balancing” effect appears less
series comprising only odd-order harmonics.
reliable than active NP controls and, therefore, is currently not
Fig. 3(c) depicts the pulsewidth modulation (PWM) signal
widely used. Active controls (at least a hysteresis-type control)
uPW M (t) at the ac terminal, which is the product of a∗ (t) and
are typically preferred.
udc,m o d (t). Comparing the reference [see Fig. 3(a)] and the ter-
To cover this gap, this paper explores the mechanism of the
minal signal [see Fig. 3(c)]), it can be observed that additional
inherent self-balancing characteristic of three-level NPC invert-
even-order harmonics (noise, marked with “N”) are generated
ers. A precise mathematical NP current model is derived. Based
at the ac terminal (e.g., vectors 2 U N , 4 U N ). Based on the equiv-
on these equations, several approaches are suggested that can
alent closed-loop impedances 2 Z N and 4 Z N , even-order current
enhance the self-balancing effect of a given system. The short-
components 2 I N and 4 I N are generated at the ac terminal with
comings of self-balancing methods are also discussed. The the-
their phase angles ϕ2 and ϕ4 , as depicted in Fig. 3(d).
oretically derived equations are validated by simulations. At the
These even-order current harmonics can contribute to the av-
end, conclusions are given.
erage value of the NP current inp (t) when modulated by the duty
cycle function. At certain operating points, this NP current is
II. MECHANISM OF SELF-BALANCING strong enough to compensate the initial dc unbalance injection,
i.e., I¯np = −IΔ in Fig. 1. Therefore, the NP potential is stabi-
Since the exploration of the self-balancing mechanism re- lized at this bias level, which is observed as “self-balancing”
quires a huge number of formula derivations, only the key effect.
equations are introduced in the main text. Detailed deductions The strength of this self-balancing effect depends on the am-
are presented in the Appendix. A brief summary of the self- plitudes and phase angles of the second and fourth current har-
balancing mechanism is shown in Fig. 3. monics, which are determined by the equivalent closed-loop
Fig. 3(a) depicts the waveform and the spectrum of the duty impedance Z N . The details of each step are derived in the fol-
cycle function a∗ (t), which contains only odd harmonics (fun- lowing sections. The derivations of Z N will be presented in
damental and third). After being multiplied by the unbalanced Section III.
dc-link voltages udc,m o d (t), additional even harmonics will oc-
cur at the ac side [see uPW M (t) in Fig. 3(c)].
A. Duty Cycle
Fig. 3(b) depicts the equivalent modulation signal udc,m o d (t)
for the duty cycle function a∗ (t). When a voltage offset exists To simplify the analysis, we start with open-loop control. The
in the NP due to a dc unbalance, udc,m o d (t) is a constant plus a reference (marked with “∗ ”) PWM voltage that is expected to

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3086 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

appear at the output of phase-leg at instant t is assumed to be determined by its fundamental component

u∗ (t) = u∗a (t) = ÛLN cos(ωt) − u∗C M (t) (1) ∗


udc,m o d (t) = Udc (1 + δsign (a∗ (t)))
where the common-mode injection signal u∗CM (t) is used to   
∗ 4δ cos (3ωt) cos (5ωt)
increase the ac-voltage capability of the inverter. In this paper, = Udc 1+ cos (ωt) − + +· · · .
π 3 5
we use the “min–max method”
(7)
∗ max (u∗a (t), u∗b (t), u∗c (t))+min (u∗a (t), u∗b (t), u∗c (t))
uC M (t) = .
2
(2) C. Even Harmonics at Phase-Leg Output
The spectrum of u∗cm (t) contains odd triple-order harmonics
(3rd, 9th, 15th, . . . ) with dramatically attenuated amplitudes at Compared to the desired ac voltage u∗ (t), even-order har-
higher orders. Practically, only the third harmonic (marked with monic noise uN (t) occurs in uPW M (t) after the PWM modula-
superscript “3”) needs to be considered tion. This can be derived by the multiplication of the duty cycle
(4) and the distorted modulation signal (7)
u∗ (t) ≈ ÛLN cos (ωt) − 3 mÛLN cos (3ωt). (3)
ūPW M (t) = a∗ (t)udc,m o d (t) = u∗ (t) + uN (t)
Using min–max method, the factor 3 m is about 0.205. If  

the common-mode injection is not used, 3 m is zero. If third- = 1M Udc cos (ωt) − 3 m cos (3ωt) + uN (t) (8)
harmonic sinusoidal waveform injection is used, 3 m is 1/6.
We assume that the duty cycle is calculated according to the where

reference dc-link voltage Udc (constant) instead of the measured
∗ ∗
udc,p (t) and udc,m (t), i.e., no dc-link voltage compensation is
uN (t) = 0 u(t) + 2 u(t) + 4 u(t) + · · ·
used
  = 0 ÛN + 2 ÛN cos (2ωt) + 4 ÛN cos (4ωt) + · · ·
∗ u∗ (t)  
a (t) = ∗ = 1M cos (ωt) − 3 m cos (3ωt) with ⎛ 1 ⎞
Udc 1 + · 3m +
√ ⎜ 3 ⎟
ÛLN 2ULL ⎜ ⎟
1
M= ∗ = √ ∗ . ⎜   ⎟
(4)
∗ 2δ ⎜
⎜ 2 6 3 ⎟
Udc 3Udc = 1M · Udc − · m cos (2ωt)− ⎟. (9)
π⎜⎜ 3 5 ⎟

Equation (4) indicates that the duty cycle function after ⎜  ⎟
⎝ 2 6 3 ⎠
“Hold” is dominated by the fundamental and third harmonics, + · m cos(4ωt) + · · ·
where the amplitude 1 M is determined by the fundamental- 15 7
frequency ac voltage and the dc-link voltage. Although other
order harmonics may exist in a∗ (t) at closed-loop control, their We see that uN (t) is a series of even-order harmonics, since
amplitudes are much lower than the fundamental and third com- a multiplication of two odd harmonics series (4) and (7) in
ponents and, therefore, are not considered in this paper. the time domain is equal to a convolution in the frequency
domain (i.e., frequency shift—derivation in the Section A of
B. Equivalent DC-link Modulation Signal Appendix). Their amplitudes are proportional to the modulation
index 1 M and the unbalance factor δ. Notice that the reference
If the NP is perfectly balanced, the expected (reference) ac u∗ (t) remains unchanged.
voltage u∗ (t) should appear at the ac terminal, i.e., no signal It should be noticed that the aforementioned analysis did not
distortion occurs during the PWM modulation. However, due to consider the third-harmonics ripple voltage in the NP. Other-
an existing dc voltage unbalance with factor δ, as defined in (5), wise, fifth and seventh harmonics (second and fourth convoluted
the equivalent dc-link modulation signal udc,m o d (t) contains a with third) will occur at the ac output (9). However, since all
sign function (6) odd-harmonic currents cannot contribute to the self-balancing
    effect (see Section II-D), the third-harmonic oscillation in the
Udc,p 1+δ ∗
= Udc (5) NP is not considered in this paper.
Udc,m − (1 − δ)
 ∗ Assuming the equivalent load impedance Z N for these voltage
a (t)Udc,p , for a∗ (t) ≥ 0 harmonics is known (see details in Section III), the current
ūPW M (t) =
−a∗ (t)Udc,m , for a∗ (t) < 0 harmonics at the ac terminal are determined
 ∗ ∗ k
a (t)Udc (1 + δ), for a∗ (t) ≥ 0 k U N ej0
UN
=
a∗ (t)Udc

(1 − δ), for a∗ (t) < 0
k
IN = k = k = k I N e−jϕ k , for k = 3n.
ZN | ZN | e jϕ k

= a∗ (t)udc,m o d (t). (6) (10)


The phases of all voltages are zero (ej0 ) according to (9).
Hence, udc,m o d (t) can be expressed as a Fourier series com- Therefore, −ϕk is defined as the phase angle between the volt-
prising only odd harmonics as long as the sign of a∗ (t) is purely age and the current at kth order.

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SHEN et al.: COMPREHENSIVE STUDY OF NP SELF-BALANCING EFFECT IN NPC THREE-LEVEL INVERTERS 3087

D. Contribution of Even Harmonics to NP Current


In the time domain, the current harmonic components in (10)
can be described as:



ia..c (t) = IL 1 cos (k(ωt − βa..c ) − ϕk )
k =1

2 4
where βa..c = 0, π, π, π k = 3n. (11)
3 3
Notice that only the fundamental current phase angle ϕ1 is
fully controllable and the others are determined by the equivalent
load Z N .
Before analyzing the “equivalent load” Z N , the relationship
between the harmonic currents and the NP current that flows
back to the midpoint is reviewed [9], [10].
inp (t) = ia (t) (|a∗a (t)| − 1) + ib (t) (|a∗b (t)| − 1)
+ ic (t) (|a∗c (t)| − 1) Fig. 4. Block diagram of closed-loop impedance.
= ia (t) |a∗a (t)| + ib (t) |a∗b (t)| + ic (t) |a∗c (t)|
since ia + ib + ic = 0. (12) order filter). Since the desired output voltage u∗ (t) does not
contain high-order components, the equivalent Z N at open loop
The contribution of the kth-harmonic current to the average is
NP current is
 2π
k
Z N(op en) = k Z L 1 = j · (kω0 )L1 , for k > 1. (15)
1  ∗
¯
Inp,k = |aa (θ)| · k ia (θ) + |a∗b (θ)| · k ib (θ) Apparently, the harmonic currents cannot contribute to the
2π 0
 NP current, because the phase angle ϕk in (10) is π/2, i.e.,
+ |a∗c (θ)| · k ic (θ) dθ cos(ϕk ) = 0. Therefore, we can conclude that the NPC inverter
 2π does not have self-balancing characteristic at open loop and pure
3
= |a∗ (θ)| · k IˆL 1 · cos(kθ − ϕk ) dθ, inductive load, which was the case described in [10].
2π 0
The closed-loop current control is composed of abc–dq,
where θ = ωt. (13) proportional–integral (PI), dq–abc (with feedforward angle),
Substituting the duty cycle (4) and harmonic currents (11) computational delay, and hold blocks (see Fig. 4).
into (13), the total average NP current can be summarized as Apparently, the transfer function at closed loop is changed,
(see the derivation in the Section B of Appendix) since the voltage across the load uPW M (t) is the sum of the
   terminal noise (2 U N , 4 U N ) and the reference output u∗ (t), where
31M 2 ˆ 2 6 3 u∗ (t) also contains second and fourth components, as illustrated
I¯np ≈ IL 1 − · m cos (ϕ2 )
π 3 5 in Fig. 4. The transfer function is, therefore,
      

− IL 1
2 6 3
+ · m cos(ϕ4 ) (14)
k
U N − F dq−ab c&FF F ab c−dq k I L 1,a..c Z PI,k k F D&H
15 7 kZ
L1
where only second and fourth harmonics are considered, since
= k I L 1,a..c . (16)
the derivation in the Section B of Appendix shows that the
impact of higher even orders are negligible, and all odd-order The individual transfer function of each subblock F dq−ab c ,
currents, including the fundamental, cannot contribute to the NP Z PI,k , F dq−ab c , F ab c−dq&FF , and k F D&H are derived as fol-
current. In addition, (14) also indicates that high 2 IˆL 1 and high lows.
cos(ϕ2 ) are desired to obtain a strong self-balancing ability
at a given modulation index 1 M. Both 2 IˆL 1 and cos(ϕ2 ) are B. abc–dq Transformation
determined by the load impedance Z N (see Section III). If the
The frequencies of the current spectrum are shifted after abc–
resultant I¯np in (14) has the same sign as the dc unbalance
dq transformation (17), as illustrated in Fig. 4
δ, the generated NP current contributes to the NP balancing. ⎧k +1
Otherwise, it increases the unbalance. ⎪ I L 1,dq , for k = 3n − 1
k  ⎨
F ab c−dq I L 1,a..c = 0, for k = 3n (17)
III. EQUIVALENT LOAD IMPEDANCE ⎪
⎩k −1
I L 1,dq , for k = 3n + 1.
A. Closed-Loop Block Diagram
The direction of the frequency shift is determined by the har-
We assume that the load in Fig. 3 is composed of a monic order k, e.g., both the second and the fourth harmonics in
fundamental-frequency voltage source and an inductor L1 (first- abc-coordinate are shifted to the third harmonic in dq-coordinate

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3088 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

with different rotation directions (see derivation in the section E. Computational Delay and Hold
C of Appendix). From (11), we know that the fourth harmonic
The computational “Delay” and “Hold” of the controller gen-
rotates in normal direction and the second rotates in the reverse erate totally one and a half sampling period delay
direction in abc-coordinate. Therefore, the third harmonic in  
dq-coordinate contains a positive (from fourth in abc) and a kω0
k
F D&H = si π e−j k D & H 2π (k ω 0 /ω s a ) , kD&H = 1.5.
negative (from second in abc) sequence signal. ωsa
Another interpretation of the result is that the second har- (23)
monic (11) can be defined at −2ω 0 because it rotates in the From (23), we see that the delay in the time domain always
reverse direction. Both (−)second and (+)fourth are shifted to leads to the phase delay in frequency domain (abc-coordinate).
the left by ω 0 after abc–dq transformation, i.e., to −3ω 0 (re- That is the reason why the feedforward angle (21) is set to
verse) and +3ω 0 (normal). compensate the D&H at the fundamental frequency, i.e.,
ω0
C. Transfer Function of PI Control θFF = 2πkFF , where kFF = kD&H = 1.5. (24)
ωsa
Due to the frequency shift after abc–dq transformation, the
transfer function of the digital PI control is F. Closed-Loop Impedance
KI Tsa Substituting (17), (18), (21), (22), (23), and (24) into (16), we
Z PI,k = KP +
1 − z −1 obtain the equivalent closed-loop impedance
 ⎧   
e−j(k +1)ω 0 T s a , for k = 3n − 1 ⎪ KI kω0
where z −1
= (18) ⎪
⎪ KP + si π
e−j(k −1)ω 0 T s a , ⎪
⎪ 1 − e−j (k +1)ω 0 T s a ωsa
for k = 3n + 1. ⎪



Notice that only triple-order harmonics may appear in dq- ⎪
⎪ ×e−j (1.5k +k F F )2π (ω 0 /ω s a ) + jkω0 L1 ,


coordinate ⎨ for k = 3n − 1
k
ZN =     (25)
KI Tsa ⎪
⎪ KI kω0
Z PI,3n −1 = Z PI,3n +1 = KP + ⎪
⎪ KP + si π
1 − z −1 ⎪
⎪ 1 − e−j (k −1)ω 0 T s a ωsa


where z −1 = e−j3n ω 0 T s a . ⎪

(19) ⎪
⎪ ×e−j (1.5k −k F F )2π (ω 0 /ω s a ) + jkω0 L1 ,


Therefore, the equivalent transfer function Z PI,2 and Z PI,4 for k = 3n + 1.
(respectively, referred to the second and fourth harmonics in
Obviously, the closed-loop impedance (25) differs from the
abc-coordinate) are equal.
open-loop (15). Especially, the real part KP is introduced in
k
Z N , and therefore, the phase angle ϕk in (14) can be signif-
D. dq–abc Transformation With Phase Compensation
icantly reduced from 90◦ under certain conditions. Details are
The frequency shift due to the abc–dq transformation is re- presented in Section IV.
stored after dq–abc inverse transformation (w/o phase angle
compensation) G. Design Example of PI Parameters
  
F dq−ab c F ab c−dq k X a..c = k X a..c . (20) To simplify the analysis, a first-order L-filter is assumed in-
However, to compensate the signal delay in the control loop stead of, e.g., LCL (L1 -C-L2 ) filter [13]. In real applications,
(see subsection E), the feedforward angle θFF is typically in- the filter inductor L1 will be chosen depending on voltage and
jected to the dq–abc block (see Figs. 1 and 4). Therefore, an power level of the load with a certain per-unit impedance L1 , pu
additional phase shift exists between input and output signals 2
L1,pu ULL
(see derivations in the Section D of Appendix) L1 = . (26)
Pnom ω0
  
F dq−ab c&FF F ab c−dq k X a..c The maximum PI gain is limited by the filter inductor L1
k
X a..c e−j θ F F , for k = 3n − 1 and the sampling frequency ω sa . Meanwhile, KP and KI can
= k (21) be tuned according to the design criteria, such as PI corner
X a..c ej θ F F , for k = 3n + 1.
frequency ω PI and phase margin Φm . As an example, we apply
Therefore, the impact of the phase compensation can be con- Φm = π/4 at the open-loop cross frequency ω c and ω PI = ω c /5
cluded as for our design
 −j θ F F
e , for k = 3n − 1
k
F FF = (22) ωc (π/(4kD&H Tsa )) ωsa
ej θF F
, for k = 3n + 1. ωPI = = = , for kD&H = 1.5
5 5 60
Equation (22) indicates that the direction of phase rotation (27)
is also determined by the harmonic order. The injected θFF in- ωsa
creases the phase delay of the kth-order vector in abc-coordinate KP ,nom = L1 (28)
24
after dq–abc inverse transformation, in case the kth harmonic is ωsa ωsa
a negative sequence (e.g., second harmonic). KI ,nom = ωPI KP = L1 . (29)
60 24

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SHEN et al.: COMPREHENSIVE STUDY OF NP SELF-BALANCING EFFECT IN NPC THREE-LEVEL INVERTERS 3089

TABLE I
EQUATIONS USED IN MATLAB EVALUATION MODEL

Fig. 5. MATLAB evaluation model of NP balancing.

As mentioned above, the PI gains can be further tuned to


modify the PI corner frequency ω PI and phase margin Φm . Fig. 6. Second-harmonic Impedance versus sampling frequency at L1 , pu =
    10%, kF F = 1.5.
KP KP,nom gP
= . (30)
KI KI,nom gI
Substituting (26), (28), (29), and (30) into (25), we obtain that
the amplitudes of even harmonics are proportional to the dc un-
balance δ, and inversely proportional to the per-unit impedance
L1,pu at the given sampling frequency ω sa
δ
k
IˆL 1 ∝ (31)
L1,pu
1

I¯np ∝ . (32)
L1,pu
Equations (31) and (32) also indicate that the strength of
the self-balancing effect is independent of the nominal power
or voltage level of the system by assuming certain per-unit
impedance and sampling frequency.

IV. EVALUATION OF SELF-BALANCING PERFORMANCE


Fig. 7. Second-harmonic current versus sampling frequency at L1 , pu = 10%,
A mathematical model for evaluating the NP current is kF F = 1.5.
generated (see Fig. 5 and Table I), where only second and
fourth harmonics are considered. The equations are taken from
Fig. 8) can be obtained by substituting the results of Fig. 6 into
Sections II and III.
(11) and (14). Comparing these figures, we see that a strong self-
balancing effect can only be obtained at medium frequencies.
A. Impact of Sampling Frequency
The performance of the k Z N at different sampling frequencies
The closed-loop impedance at the second harmonic, i.e., 2 Z N is illustrated in Fig. 9, which helps to explain the results in Fig. 6.
is illustrated in Fig. 6. We see that the amplitude and phase angle Extreme low frequencies (a): The low sampling frequencies
are sensitive to the sampling frequency ω sa . Furthermore, the causes a high phase delayk θD ,tot that rotates the PI components.
second harmonic current (see Fig. 7) and the NP current (see If the real part of k Z N appears negative (cos(ϕk ) < 0), a negative

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3090 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

Fig. 8. NP current versus sampling frequency at L1 , pu = 10%, kF F = 1.5. Fig. 10. Impact of feedforward angle on NP current at L1 , pu = 10%.

B. Impact of Third-Harmonic Injection


From Figs. 7 and 8, it can be observed that the second har-
monic as well as the NP current are reduced, if common-mode
third-harmonic voltage is injected into the reference (approxi-
mately 50% reduced at ω sa = 40 ω 0 ) because the amplitude of
the second harmonic (9) and its contribution to the NP current
(14) are significantly reduced.

C. Impact of Phase-Angle Compensation


The standard phase compensation for the control loop is
Fig. 9. Dominating factor in closed-loop impedance under different sampling
frequencies.
kFF = 1.5, where 1 is caused by the computational “Delay”
and 0.5 is caused by the “Hold.” If averaging sampling, e.g.,
voltage-controlled oscillators or delta–sigma modulators [14],
is used for the A/D conversion, the A/D converter behaves as
NP current will be generated when the dc unbalance δ is positive,
a short-time integrator and the equivalent cycle delay in the
i.e., the NP is unstable (see Fig. 8).
control loop is increased. In such cases, kD&H as well as kFF
Low frequencies (b): the bandwidth of the PI controller is lim-
should be increased accordingly.
ited at low sampling frequencies, which means that the equiva-
Fig. 10 illustrates the impact of phase compensation. Curves
lent load at second and fourth harmonics is already dominated
kD&H = kFF = 2.5 indicate that the integration window of the
by the filter (L1 ), i.e., cos(ϕk ) ≈ 0 as (15). Therefore, the gener-
A/D converter is two sampling periods, and its equivalent delay
ated harmonic currents can hardly contribute to the NP current
is one control cycle [14]. Notice that the PI gains may need to
(15).
be modified to meet the PI design criteria (27), but in Fig. 10,
High frequencies (d): In contrast, a “perfect” PI controller is
this is not considered.
expected at very high sampling frequencies. The PI gain is so
Comparing to the standard A/D conversion (kFF = 1.5), the
high that the harmonics are strongly suppressed, even with a dc
characteristic curves using averaging sampling (kFF = 2.5) are
offset in the NP. Hence, no harmonics are available to contribute
shifted to right. In other words, to gain the same self-balancing
to the NP current; even if there are harmonic currents generated,
effect, a higher sampling frequency is required to compensate
they cannot be converted to the NP current because the phase
the impact of the delay caused by the A/D conversion.
angle ϕk is close to −π/2 (k Z N dominated by KI ).
Medium frequencies (c) seem to be ideal to gain a strong self-
balancing effect of NPC inverters because the imaginary part D. Impact of PI Gain
(I-component and filter impedance) is almost compensated Figs. 7 and 8 are obtained under the condition that the PI
(leads to low ϕ2 ) and P-gain KP is in a proper range (leads corner frequency ω PI is 1/5 of the open-loop corner frequency
to harmonic current amplitude). In Fig. 8, the strongest NP cur- ω c , and the phase margin Φm is 45◦ . This PI setup appears to
rent appears at ω sa = 40 ω 0 . These sampling frequency ranges be optimal for high-power IGBT applications (ω sa = 40 ω 0 ).
are typical for high-power IGBT applications, assuming ω 0 is For systems using IGCT/GTOs, the typical sampling fre-
constant 50 Hz. quencies may be lower than 30ω 0 with ω 0 = 50 Hz. In such

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SHEN et al.: COMPREHENSIVE STUDY OF NP SELF-BALANCING EFFECT IN NPC THREE-LEVEL INVERTERS 3091

Fig. 13. Simulated NP current versus sampling frequency at δ = 0.1, 1 M =


Fig. 11. Tuning of PI gain for low-frequency applications at L1 , pu = 10%, 0.7, L1 , pu = 10 %, kF F = 1.5.
Φ m = 45◦ .

Fig. 14. Simulated NP current versus sampling frequency at δ = 0.1, 1 M =


0.7, L1 , pu = 10 %, kF F = 0.5.
Fig. 12. Tuning of PI gain for high-frequency applications at L1 , pu = 10%.

fect at extreme low frequencies. Hence, we can conclude that


applications, a mild PI controller can be helpful to obtain a strong the utilization of self-balancing at the low (frequency) end is
self-balancing ability. As depicted in Fig. 11, if ω PI is reduced limited by the total delay in the control loop.
from 0.2 ω c to 0.1 ω c , the optimal frequency is shifted from
ω sa = 40 ω 0 to 22 ω 0 , while the NP current is even doubled at V. SIMULATIONS
this point.
For high-frequency applications (e.g., MOSFET), the second A. Model Validation (Voltage Source)
and fourth harmonics are suppressed by the “prefect” PI con- The first runs of simulation are to validate the NP model in
troller. In such cases, we can increase the desired second and MATLAB, which has been discussed in Section IV. A three-
fourth harmonics by modifying the PI gain to enhance the self- level NPC inverter model with two voltage sources connected
balancing ability. As plotted in Fig. 12, the optimal frequency in the dc-link is generated in SABER, according to Fig. 1. The
can be shifted from ω sa = 40 ω 0 to more than 300 ω 0 with fundamental frequency ω 0 is 50 Hz. The current regulator is
proper tuning. However, it should be noticed that the PI gain re- enabled, where the d–q reference currents are set to zero so that
duction may sacrifice the dynamics and the THD performance the simulations present only the impact of second and fourth
of the system. harmonics.
From Figs. 11 and 12, it can be observed that the tun- The performance of the self-balancing is simulated in the time
ing of the PI gain cannot shift the NP corner frequency domain at different sampling frequencies, where the control
(where I¯np = 0) to the left to obtain the self-balancing ef- parameters are synchronized with the MATLAB model. The

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3092 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

Fig. 15. DC-link voltage unbalance versus sampling frequency at L1 , pu = Fig. 16. Second-harmonic current versus sampling frequency at L1 , pu =
10 %, 1 M = 1, kF F = 1.5. 10%, 1 M = 1, kF F = 1.5.

results are compared to the theory in Fig. 13. We see that the
mathematical model is very precise at different operating points. This is due to the interaction between the second component in
The results of the second harmonic current are also satisfactory, the duty cycle (2 m) and the fundamental current 1 iL 1 , which has
but are not plotted due to the limited space. weak contribution to the NP current. Therefore, the dc-voltage
To gauge the impact of the feedforward angle, we manually unbalance and second harmonic current are lower than expected.
reduce kFF from 1.5 to 0.5 without changing the PI parame- Due to the limited space, details of this additional self-balancing
ters. The simulation results are plotted in Fig. 14. Compared to mechanism are not presented in this paper.
Fig. 13, the NP cross frequency (where the NP current is zero) It can be concluded from this case study that this “do-nothing”
is shifted to the left as expected. control may have two main drawbacks compared to other active
NP controls at continuous unbalance injection: one is the voltage
B. Case Study (Current Source) stress on the devices due to the remaining voltage unbalance, as
illustrated in Fig. 2. The other one is the increase of the current
Now, we use two current sources instead of voltage sources as THD, where the second and fourth are caused by the dc unbal-
input of the dc link. The NP unbalance current is set manually to ance, and the fifth and seventh are caused by the third-harmonic
0.4 % of the nominal AC peak current, i.e., I¯np /1 Iˆnom ≈ 0.4%. oscillation in the NP. Especially for grid-tie applications, the
The (total) dc-link voltage regulator is enabled, which pro- THD standard at second harmonic could be so critical (1%) that
vides the reference d-current to the current regulator. Reference the sampling frequency should be at least 40 times of the grid fre-
q-current is set to zero, i.e., the power factor is 1. Min–max quency. In contrast, active NP controls (e.g., dc common-mode
common-mode injection is activated to enable a high- voltage injection) may allow the dc-link voltage compensation
modulation index, but no active NP control is used. to suppress these low-order harmonics. Detailed performance
The utilization of the self-balancing effect is limited by two comparisons between different NP controls are planned for a
factors: one is the increase of current THD (second and fourth separate paper.
harmonics), which may violate THD norms. For example, the
most critical second and fourth demand distortion (DD) limit
VI. CONCLUSION
according to IEEE-519 is 1%. The other factor is the dc-voltage
unbalance, which will increase the electrical stress on the com- The mechanism of self-balancing is concluded as follows:
ponents. As a rough estimate, the overvoltage (OV) should not when a dc unbalance is injected to the NP, even-order harmon-
exceed 10%. ics are generated at the ac-side after PWM modulation. These
The simulation results in Fig. 15 show the dc-link voltage harmonic currents (mainly second and fourth) can contribute to
unbalance and Fig. 16 shows the DD of second harmonic current. the NP current under the influence of a nonperfect PI current
The simulations fit quite well with the theory at low-to-medium controller, which appears as “self-balancing” effect. Therefore,
frequencies. The THD increase seems more critical than the this “differential-mode harmonic current injection” based effect
voltage increase: to stay, the DD at second harmonic below the is independent of the power factor of the load.
limit (<1%), at least ω sa = 40 ω 0 is required, where at this The strength of the self-balancing depends on the sampling
frequency, the voltage increase is only 1.1% (sufficient margin frequency, but is independent of the power rating of the system
to 10% OV limit). assuming the per-unit impedance of the load is constant. For
On the other hand, it can be observed that the error between systems with very low frequencies, the self-balancing is quite
the theory and simulations is enlarged at higher frequencies. weak, or the NP is even unstable due to the low PI gain and

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SHEN et al.: COMPREHENSIVE STUDY OF NP SELF-BALANCING EFFECT IN NPC THREE-LEVEL INVERTERS 3093

TABLE II 4
 
ÛN 2δ 2 6 3
INTERACTION OF HARMONIC COMPONENTS BETWEEN DUTY CYCLE AND
1M · U ∗
=− + · m . (33)
DC-LINK MODULATION SIGNALS dc π 15 7

B. Impact of Harmonics Currents on NP Current


The following can be deduced from (13):

3 2π 1
I¯np,2 = M cos (θ) − 3 m cos (θ) 2 IˆL 1
2π 0

× cos (2θ − ϕ2 )dθ


 π /2
3 · 2 IˆL 1
= 2 (1M cos (θ) − 3 m cos (θ) cos (2θ − ϕ2 )dθ
2π −π /2


 
3 · M · IL 1 2 6 3
1
= − · m cos (ϕ2 ). (34)
π 3 5

Similarly,

3 2π 1
I¯np,4 = M cos (θ) − 3 m cos (θ) 4 IˆL 1
high phase delay of the control loop. At high frequencies, the 2π 0
second and fourth harmonics are perfectly suppressed because × cos (4θ − ϕ4 )dθ
of the high PI gain and, therefore, the self-balancing effect is  
hard to observe. However, at low-to-medium frequencies, the 3 · 1M · 4 IˆL 1 2 6 3
=− + · m cos (ϕ4 ). (35)
harmonic current can effectively contribute to the NP, and a π 15 7
strong self-balancing effect can be observed. In such applica-
tions, the “do-nothing” control can be sufficient and other active
NP controls may not be needed or only need to be activated oc- C. abc–dq Transformation
casionally, e.g., operating in hysteresis-type mode. By tuning Assuming that the amplitude of the current is unity, the feed-
the PI setup of the current controller, this effect can be opti- back current in dq-coordinate is
mized for NPC systems with expanded frequency ranges like
 
GTO/IGCT/IGBT/MOSFET applications. id,k (θ)
Since the self-balancing effect is based on the harmonic cur- iq,k (θ)
rents at the ac side, i.e., relies on a distorted PWM modulation, ⎛    
the dc-link voltage compensation cannot be used. Otherwise, 2π 4π ⎞
cos (θ) cos θ − cos θ −
low-order harmonics, i.e., second, fourth, fifth, and seventh are 2⎜ 3 3 ⎟
= ⎜ ⎝    ⎟
all suppressed. This is good for reducing the THD, but the self- 3 2π 4π ⎠
balancing effect is lost. Therefore, active NP controls with con- − sin (θ) − sin θ − − sin θ −
3 3
tinuous operation (i.e., PI control, [4], [9]) are recommended, if ⎛ ⎞
the dc-link voltage compensation is desired. cos (kθ − ϕk )
⎜    ⎟
A complete mathematical NP model is introduced with ⎜ cos k θ − 2π − ϕ ⎟
⎜ k ⎟
proven precision. Readers can use this model to evaluate and ×⎜ 3 ⎟
optimize the self-balancing performance for their own design. ⎜    ⎟
⎝ 4π ⎠
Based on the comprehensive self-balancing study presented in cos k θ − − ϕk
this paper, various advanced active NP control algorithms by 3
⎧ 
utilizing the “differential-mode harmonic current injection” can ⎪ cos ((k + 1)θ − ϕk )

⎪ k = 3n − 1
be derived in the future. ⎪
⎪ − sin ((k + 1)θ − ϕk )




APPENDIX ⎨ 
0
= k = 3n (36)
A. Second and Fourth Harmonics in PWM Voltage ⎪ 0



⎪
⎪ 
From Table II we obtain the second and fourth harmonic ⎪
⎪ cos ((k − 1) θ − ϕk )

⎩ k = 3n + 1.
voltages sin ((k − 1) θ − ϕk )
2
 
ÛN 2δ 1 6 3 Comparing input and output, the harmonic order is shifted,
1M · U ∗
= · − · m
dc π 3 5 but the phase angle of the vector remains unchanged.

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3094 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

D. dq–abc Inverse Transformation With Feed-Forward REFERENCES


On being deduced from (18) and (36), the reference dq- [1] A. Nabae, T. Takahashi, and H. Akagi, “A new neutral-point-clamped
coordinate voltage in time domain can be expressed as PWM inverter,” in Proc. IAS Annu. Meet. Conf. Rec., Cincinnati, OH,
Sep. 28–Oct. 3, 1980, pp. 761–776.
[2] F. Blaabjerg, R. Teodorescu, M. Liserre, and A. V. Timbus, “Overview
of control and grid synchronization for distributed power generation sys-
  tems,” IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1398–1409, Oct.
u∗d,k 2006.
u∗q,k [3] J. Steinke, “Switching frequency optimal PWM control of a three-level
inverter,” IEEE Trans. Power Electron., vol. 7, no. 3, pp. 487–496, Jul.
⎧ 
⎪ cos ((k + 1)θ − ϕk + ϕPI,k ) 1992.

⎪ Z PI,k k = 3n − 1 [4] C. Newton and M. Summer, “Neutral point control for multi-level invert-
⎨ − sin ((k + 1)θ − ϕ + ϕ
k PI,k ) ers: Theory, design and operation limitations,” Proc. IEEE Ind. Appl. Soc.
=   Conf. Rec., 1997, pp. 1336–1343.

⎪ cos ((k − 1)θ − ϕk + ϕPI,k )

⎩ Z PI,k k = 3n + 1. [5] N. Celanovich and D. Boroyevich, “A comprehensive study of neutral
point voltage balancing problem in three-level neutral-point-clamped volt-
sin ((k − 1)θ − ϕk + ϕPI,k ) age source PWM inverters,” IEEE Trans. Power Electron., vol. 15, no.2,
(37) pp. 242–249, Mar. 2000.
[6] J. Pou, R. Pindado, D. Boroyevich, and P. Rodrı́guez, “Limits of the
neutral-point balance in back-to-back-connected three-level converters,”
IEEE Trans. Power Electron., vol. 19, no. 3, pp. 722–731, May 2004.
[7] H. Akagi and T. Hatada, “Voltage balancing control for a three-level
Compared to the input (dq current), there is a phase shift and diode-clamped converter in a medium-voltage transformerless hybrid ac-
amplitude change in the output (reference dq voltage). After tive filter,” IEEE Trans. Power Electron., vol. 24, no. 3, pp. 571–579,
Mar. 2009.
dq–abc transformation, the reference signals in abc-coordinate [8] K. Yamanaka, A. M. Hava, H. Kirino, Y. Tanaka, N. Koga, and T. Kume, “A
can be presented as novel neutral point potential stabilization technique using the information
of output current polarities and voltage vector,” IEEE Trans. Ind. Appl.,
vol. 38, no. 6, pp. 1572–1580, Jul. 2002.
[9] M. Marchesoni, P. Segarich, and E. Soressi, “A new control strategy
⎛k ⎞ for neutral-point-clamped active rectifiers,” IEEE Trans. Ind. Electron.,
u∗a (θ) vol. 52, no. 2, pp. 462–470, Apr. 2005.
⎝ k u∗b (θ) ⎠ [10] G. Scheuer and H. Stemmler, “Analysis of a 3-level-VSI neutral-point-
k ∗ control for fundamental frequency modulated SVC-applications,” in Proc.
uc (θ) 6th Int. Conf. AC and DC Power Transm. Conf., Apr. 29–May 3, 1996,
⎛ cos(θ + θFF ) − sin(θ + θFF ) ⎞ pp. 303–310.
[11] S. Ogasawara and H. Akagi, “Analysis of variation of neutral point po-
⎜    
⎜ 2π 2π ⎟ ⎟
tential in neutral-point-clamped voltage source PWM inverters,” in Proc.
⎜ cos θ + θ FF − − sin θ + θ FF − ⎟ IEEE Ind. Appl. Soc. Conf. Rec., 1993, pp. 965–970.
=⎜ 3 3 ⎟ [12] Qiang Song, Wenhua Liu, Qingguang Yu, Xiaorong Xie, and
⎜    ⎟
⎝ 4π 4π ⎠
Zhonghong Wang, “A neutral-point potential balancing algorithm for
three-level NPC inverters using analytically injected zero-sequence volt-
cos θ + θFF − − sin θ + θFF − age,” in Proc. IEEE APEC’03, Feb. 1993, vol. 1, pp. 228–233.
3 3
[13] K. H. Ahmed, S. J. Finney, and B. W. Williams, “Passive filter design
 ∗  for three-phase inverter interfacing in distributed generation,” in Proc.
ud,k (θ)
× Compat. Power Electron., , May 2007, pp. 1–9.
u∗q,k (θ) [14] M. Oljaca and T. Hendrick, “Combining the ads1202 with an FPGA
⎧ ⎛ ⎞ digital filter for current measurement in motor control applications,” Texas
⎪ cos (kθ − θFF + ϕPI,k − ϕk ) Instruments, Dallas, TX, Appl. Rep., SBAA094, Jun. 2003.

⎪ ⎜    ⎟

⎪ ⎜ ⎟

⎪ ⎜ 2π

⎪ ⎜ cos k θ − − θFF + ϕPI,k − ϕk ⎟ ⎟

⎪ ⎜ 3 ⎟

⎪ ⎜     ⎟

⎪ ⎜ ⎟

⎪ ⎝ 4π

⎪ cos k θ − − θFF + ϕPI,k − ϕk ⎠

⎪ 3



⎪ Z PI,k , for k = 3n − 1

= ⎛ ⎞ (38)

⎪ cos (kθ + θ + ϕ − ϕ )

⎪ FF PI,k k

⎪⎜

⎪ ⎜
 

 ⎟


⎪ ⎜ cos k θ − + θFF + ϕPI,k − ϕk ⎟

⎪ ⎜ ⎟

⎪ ⎜ 3 ⎟ Jie Shen (M’05) was born in Shanghai, China. He re-

⎪ ⎜     ⎟

⎪ ⎜ ⎟ ceived the B.S. degree in electrical engineering from

⎪ ⎝ −

− ⎠ Shanghai Jiaotong University, Shanghai, in 2003,

⎪ cos k θ + θ FF + ϕ PI,k ϕ k

⎪ 3 and the Dipl.-Ing. degree in electrical engineering

⎩ from RWTH Aachen University, Aachen, Germany,
Z PI,k , for k = 3n + 1. in 2008, where he is currently working toward the
Ph.D. degree.
From 2005 to 2007, he was a Research Stu-
dent at Philips Research Laboratories, Aachen. Since
2008, he has been with the GE Global Research Eu-
Equation (38) indicates that the sign of feedforward angle is rope, Munich, Germany. His research interests in-
negative at second order and is positive at fourth order. clude modeling and control design of high-power electronics systems.

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SHEN et al.: COMPREHENSIVE STUDY OF NP SELF-BALANCING EFFECT IN NPC THREE-LEVEL INVERTERS 3095

Stefan Schröder (S’98–M’03–SM’10) was born in Robert Rösner received the Dipl.-Ing. and the
Cologne, Germany. He received the Diploma and Dr.-Ing degrees, both in electrical engineering from
the Doctoral degrees both in electrical engineering Wuppertal University, Gaußstraße, Wuppertal, in
from RWTH Aachen University, Aachen, Germany, 1998, and 2002, respectively.
in 1997 and 2003, respectively. In September 2004, he joined the GE Global
In 1997, he joined the Institute for Power Elec- Research Europe, Munich, Germany. Since April
tronics and Electrical Drives (ISEA), RWTH Aachen 2010, he has been with the Center of Excellence
University as a Research Associate, where he was for Controls & Power Electronics, Global Research
involved in the research on power electronic circuits Facility, Munich. His research interests include
and devices, in particular, on high-power semicon- power electronics, in particular, for renewable power
ductors, where he became a Chief Engineer in July applications.
2002, and was responsible for the research in the fields of electrical drives,
power electronic circuits, and semiconductor devices. Since the beginning of
2005, he has been with the GE Global Research Europe, Munich, Germany,
Said El-Barbari received the Ph.D. degree from
where he is currently involved in the research on power electronic applications
the Chemnitz University of Technology, Germany,
with focus on high-power converters for medium-voltage drives and for renew-
in September 2004.
able energy systems. He has authored or coauthored more than 40 published
technical papers. Since June 2004, he has been a Research Scien-
tist with the High Power Electronics Laboratory, GE
Dr. Schröder is a member of the VDE.
Global Research Europe, Munich, Germany, where
he is involved in the research on electrical engineer-
ing, focusing on power electronics and control.

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