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20EC2L1-Circuits and Devices Laboratory

K.L.N COLLEGE OF ENGINEERING, POTTAPALAYAM.

DEPARTMENT OF ELECTRONICS & COMMUNICATION


ENGINEERING

(AN ISO 9001:2015 Certified Institution)

NBA Accredited, Autonomous Institution


20EC2L1-CIRCUITS AND DEVICES LABORATORY

(Regulation -2020)

YEAR/SEM: I/II BRANCH: ECE


Section A & B

Academic Year: 2023 – 2024

COMPILED BY

Mr. S. SELVAKUMAR, AP(Sr.Gr)/ECE Mrs.T.SUGUMARI, AP/ECE

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20EC2L1-Circuits and Devices Laboratory

20EC2L1 CIRCUITS AND DEVICES LABORATORY L T P C


0042
OBJECTIVES:
➢ To learn the characteristics of basic electronic devices such as Diode, BJT,FET, SCR
➢ To understand the working of RL,RC and RLC circuits
➢ To gain hand on experience in Thevinin & Norton theorem, KVL & KCL, and Super
Position Theorems

1. Verification of KVL & KCL


2. Verification of Super Position Theorem
3. Verification of Thevenin & Norton theorem
4. Verification of maximum power transfer & reciprocity theorem
5. Determination of Resonance Frequency of Series & Parallel RLC Circuits
6. Transient analysis of RL and RC circuits
7. Characteristics of PN Junction Diode and Zener diode
8. Common Emitter input-output Characteristics
9. Common Base input-output Characteristics
10. FET and UJT Characteristics
11. SCR Characteristics
12. Clipper, Clamper and Full Wave Rectifier circuits
13. UJT characteristics (Content beyond syllabus)

LABORATORY REQUIREMENTS
BC 107, BC 148,2N2646,BFW10 - 25 each 1N4007,
Zener diodes - 25 each Resistors, Capacitors, Inductors - sufficient quantities
Bread Boards - 15 Nos CRO (30MHz) – 10 Nos. Function Generators (3MHz) – 10 Nos. Dual
Regulated Power Supplies ( 0 – 30V) – 10 Nos.

TOTAL : 60 PERIODS

OUTCOMES: At the end of the course, the student should be able to:

➢ Analyze the characteristics of basic electronic devices


➢ Design RL and RC circuits
➢ Verify Thevinin & Norton theorem KVL & KCL, and Super Position Theorems

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20EC2L1-Circuits and Devices Laboratory

List of Experiments

CYCLE-I

1. Verifications of KVL & KCL


2. Verifications of Super Position Theorem
3. Verifications of Thevinin & Norton theorem
4. Verifications of maximum power transfer & reciprocity theorem
5. Determination Of Resonance Frequency of Series & Parallel RLC Circuits
6. Transient analysis of RL and RC circuits

CYCLE-II

1. Characteristics of PN Junction Diode & Zener diode Characteristics


2. Common Emitter input-output Characteristics
3. Common Base input-output Characteristics
4. FET & UJT Characteristics
5. SCR Characteristics
6. Clipper and Clamper & FWR circuits
7. UJT characteristics(Content beyond syllabus)

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20EC2L1-Circuits and Devices Laboratory

Ex.no: Verification of KCL & KVL (Kirchhoff’s laws)

AIM: To verify (i) Kirchhoff’s current law (KCL)


(ii) Kirchhoff’s voltage law (KCL)
EQUIPMENTS & COMPONENTS REQUIRED:
Sl. Equipments & Range Quantity
No. Components
1 RPS (0-30) V 1
2 Ammeter (0-5) mA, (0-10) mA, (0-30) mA 2, 2, 1 resp.
3 Voltmeter (0-10) V 3
4 Resistor 1 KΩ 5
5 Bread Board 1
6 Connecting wires As required
THEORY:
KIRCHHOFF’S CURRENT LAW (KCL):
KCL states that “the algebraic sum of all the currents at any node in a circuit equals
zero”.i.e., Sum of all currents entering a node = Sum of all currents leaving a node.
KIRCHHOFF’S VOLTAGE LAW (KVL):
KVL states that “the algebraic sum of all the voltages around any closed loop in a circuit
equals zero”.i.e., Sum of voltage drops = Sum of voltage rises.
CIRCUIT DIAGRAM:

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20EC2L1-Circuits and Devices Laboratory

PROCERURE:
KIRCHHOFF’S CURRENT LAW (KCL):
(1) Connect the components as shown in the circuit diagram.
(2) Switch on the DC power supply and note down the corresponding ammeter readings.
(3) Repeat the step 2 for different values in the voltage source.
(4) Verify KCL for every node present in the given network.

KIRCHHOFF’S VOLTAGE LAW (KVL):


(1) Connect the components as shown in the circuit diagram.
(2) Switch on the DC power supply and note down the corresponding voltmeter readings.
(3) Repeat the step 2 for different values in the voltage source.
(4) Verify KVL for the loop present in the given network.

TABULATION:
KVL:
Voltage V1 V2 V3 V=V1+V2+V3
(V) (V) (V) (V) (V)

KCL:
Voltage Current I1 I2 I=I1+I2
(V) (I) mA (mA) (mA) (mA)

CALCULATION:

Viva questions:
1. Define Ohm’s law.
2. State KVL.
3. State KCL.
4. Define node.
5. Define mesh.
6. Define loop.

RESULT:
Thus (i) Kirchhoff’s Current Law & (ii) Kirchhoff’s Voltage Law are verified.

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20EC2L1-Circuits and Devices Laboratory

Ex.No: Verification of Thevenin’s & Norton’s Theorem

AIM: To verify Thevenin’s & Norton’s theorem using experimental set up.
EQUIPMENTS & COMPONENTS REQUIRED:
Sl. No. Equipments & Range Quantity
Components
1 RPS (0-30) V 1
2 Voltmeter (0-10) V 1
3 Ammeter (0-1) mA 1
4 Resistor 1 KΩ, 560 Ω, 470 Ω, 1 Ω, 2, 1, 1, 1, 1, 3, 2, 1
829.10 Ω, 10 KΩ, 5.6 KΩ, respectively
5.1 KΩ
5 Bread Board 1
6 Connecting wires As required

THEORY:
THEVENIN’S THEOREM:
Thevenin’s theorem states that “any two terminal linear network having a number of
voltage, current sources and resistances can be replaced by a simple equivalent circuit consisting
of a single voltage source in series with a resistance”, where the value of the voltage source is
equal to the open circuit voltage across the two terminals of the network, and resistance is equal
to the equivalent resistance measured between the terminals with all the energy sources replaced
by their internal resistances.
NORTON’S THEOREM:
Norton’s theorem states that “any two terminal linear network having a number of
voltage, current sources and resistances can be replaced by an equivalent circuit consisting of a
single current source in parallel with a resistance”. The value of the current source is the short
circuit current between the two terminals of the network, and resistance is the equivalent
resistance measured between the terminals of the network with all the energy sources replaced
by their internal resistances.

PROCEDURE:
THEVENIN’S THEOREM:
General Circuit:
(1) Connect the components as shown in the circuit diagram 1.
(2) Measure the voltage across the load using a voltmeter or multimeter after switching
on the power supply. Let it be VL.
To find Thevenin’s Voltage: (VTH):
(1) Connect the components as shown in the circuit diagram 2.
(2) Remove the load resistance and measure the open circuited voltage V TH across the
output terminal.
To find Thevenin’s Resistance: (RTH):
(1) Connect the components as shown in the circuit diagram 3.
(2) Remove the voltage source and replace it with an internal resistance as shown.

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(3) Using multimeter in resistance mode, measure the resistance across the output
terminal.
Thevenin’s Circuit:
(1) Connect the power supply of VTH and resistance of RTH in series as shown in the
circuit diagram 4.
(2) Connect the load resistance RL and measure VL’ across the load resistance using a
voltmeter after switching on the power supply.
(3) Voltage measured with figure 1 should be equal to the voltage measured with this
circuit. (i.e., VL = VL’)
NORTON’S THEOREM:
General Circuit:
(1) Connect the components as shown in the circuit diagram 5.
(2) Measure the current through the load using an ammeter or multimeter after switching
on the power supply. Let it be IL.
To find Norton’s Current: (IN)
(1) Connect the components as shown in the circuit diagram 6.
(2) Remove the load resistance and short circuit the output terminal. Then measure the
current through the short circuited terminals.
To find Norton’s Resistance: (RN)
(1) Connect the components as shown in the circuit diagram 7.
(2) Remove the voltage source and replace it with an internal resistance as shown.
(3) Using multimeter in resistance mode, measure the resistance across the output
terminal.
Norton’s Circuit:
(1) Draw the short circuit current source IN in parallel with RN as shown in the circuit
diagram 8.
(2) Draw the equivalent circuit by replacing the current source IN in parallel with RN by
a voltage source such that Veq = IN . RN volts.
(3) Then connect the circuit as shown in figure 9 and measure the load current IL’ through
the load resistor RL. This must be equal to IL.
CIRCUIT DIAGRAM:
THEVENIN’S THEOREM:
(a) FIGURE 1

(b) FIGURE 2

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(c) FIGURE 3

(d) FIGURE 4

TABULAR COLUMN:

VS (volts) VL (volts) VTH (volts) RTH (ohms) VL’ (volts)

CIRCUIT DIAGRAM:
NORTON’S THEOREM:
(e) FIGURE 5

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f) FIGURE 6

g) FIGURE 7

(h) FIGURE 8

(i) FIGURE 9

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TABULAR COLUMN:
VS Veq = IN . RN
IL (mA) IN (mA) RN (KΩ) (volts) IL’ (mA)
(volts)

CALCULATION:

Viva questions:
1. State Thevinin’s theorem.
2. State Norton’s theorem.
3. What is ideal voltage and current source?
4. What is Voltage divider rule?
5. What is current divider rule?

RESULT :
Thus Thevenin’s theorem & Norton’s theorem are verified.

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20EC2L1-Circuits and Devices Laboratory

Ex.No : Verification of Superposition Theorem

AIM: To verify Superposition theorem for the given network

EQUIPMENTS & COMPONENTS REQUIRED:


Sl. No. Equipments & Components Range Quantity
1 RPS (0-30) V 2
2 Ammeter (0-1) mA, (0-10) mA 1 each
3 Resistor 10 KΩ, 50 Ω 3, 1 respectively
4 Bread Board 1
5 Connecting wires As required

THEORY:
SUPERPOSITION THEOREM:
Superposition theorem states that “in any linear network containing two or more sources,
the response in any element is equal to the algebraic sum of the responses caused by the
individual sources acting alone, while the other sources are non-operative”.
While considering the effect of individual sources, other ideal voltage and current sources
in the network are replaced by short circuit and open circuit across the terminal respectively.
CIRCUIT DIAGRAM:
SYMMETRICAL T- NETWORK:
(a) When both VS1 & VS2 are active

(b) When VS1 acts alone

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(c) When VS2 acts alone

PROCEDURE:
(1) Connect the components as shown in the circuit diagram.
(2) Switch on the DC power supplies VS1 & VS2 (e.g.: to 10 V & 5 V) and note down the
corresponding ammeter reading. Let this current be I.
(3) Replace the power supply VS2 (5 V) by its internal resistance and then switch on the
supply VS1 (10 V) and note down the corresponding ammeter reading. Let this current be I1.
(4) Now connect back the power supply VS2 (5 V) and replace the supply VS1 (10 V) by
its internal resistance.
(5) Switch on the supply VS2 (5 V) and note down the corresponding ammeter reading.
Let this current be I2.
(6) Repeat the steps 2 to 5 for different values of VS1 & VS2.
(7) Verify the theorem using the relation I = I1 + I2 (for T- Network) & I = I1 ~ I2 (for
Symmetrical π- Network)

TABULAR COLUMN:
VS1 VS2 I = I1 + I2
I (mA) I1 (mA) I2 (mA)
(volts) (volts) (mA)

CALCULATION:

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Viva questions:
1. State Superposition theorem.
2. What is bilateral and unilateral network?
3. What is linear and nonlinear network?
4. What is lumped and distributed network?
5. Define super mesh.
6. Define super node.
7. What is Symmetrical Network?

RESULT:
Thus the Superposition theorem is verified for the given Symmetrical network.

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Ex.No : Verification of Maximum Power Transfer & Reciprocity Theorem


AIM:
To verify Maximum Power Transfer & Reciprocity Theorem for the given circuit.

EQUIPMENTS & COMPONENTS REQUIRED:


Sl. No. Equipments & Range Quantity
Components
1 RPS (0-30) V 1
2 Voltmeter (0-10) V 1
3 Ammeter (0-10) mA 1
4 Resistor 1 KΩ, 330Ω, 220Ω, 470Ω 3, 1, 1,1
5 Capacitor 0.1 μF 1
6 Bread Board 1
7 Connecting wires As required

THEORY:
MAXIMUM POWER TRANSFER THEOREM:
Maximum Power Transfer Theorem states that “maximum power is delivered from a
source to a load when the load resistance is small compare to the source resistance”. (ie, R L =
RS). In terms of Thevenin equivalent resistance of a network, it is stated as “a network delivers
the maximum power to a load resistance RL where RL is equal to the Thevenin equivalent
resistance of the network”.
RECIPROCITY THEOREM:
Reciprocity Theorem states that “in any passive linear bilateral network, if the single
voltage source Vx in branch x produces the current response Iy in branch y, then the removal of
the voltage source from branch x and its insertion in branch y will produce the current Iy in
branch x.”
In simple terms, “interchange of an ideal voltage source and an ideal ammeter in any
passive, linear, bilateral circuit will not change the ammeter reading”.

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20EC2L1-Circuits and Devices Laboratory

CIRCUIT DIAGRAM:
MAXIMUM POWER TRANSFER THEOREM:

TABULAR COLUMN: MAXIMUM POWER TRANSFER THEOREM:

Sl. Load Resistance, RL Output Voltage, Output current Power,


No. (KΩ) V0 (volts) (mA) P=VI(mW)

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CIRCUIT DIAGRAM:
RECIPROCITY THEOREM:

TABULAR COLUMN:

VS (volts) I1 (mA) VS/I1 (Ω) I2 (mA) VS/I1 (Ω)

PROCEDURE:
MAXIMUM POWER TRANSFER THEOREM:
For DC Circuit:
(1) Connect the circuit as shown in figure 1.
(2) Set the power supply to say, 10 V.
(3) Vary the values of the load resistance and note the corresponding voltage reading
using a voltmeter.
(4) Tabulate the readings and calculate power using the relation V2/R or VI.
(5) Plot the graph between power and load resistance.

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RECIPROCITY THEOREM:
(1) Connect the circuit as shown in figure 3.
(2) Switch on the power supply VS and set it to some value, say 5 V.
(3) Note down the corresponding ammeter reading.
(4) Repeat steps 2 & 3 for different values of VS.
(5) Now interchange the position of the power supply & ammeter as shown in figure 4.
(6) Repeat steps 2 to 5. (Different values of VS to be maintained same for set 3& 4
(7) Compare the ratios VS/I1 and VS/I2. Both the ratios must be same.
CALCULATION:

Viva questions:
1. State Maximum power transfer theorem.
2. State Reciprocity theorem.
3. What is Source transformation?
4. Define Star network.
5. Define Delta network.

RESULT:
Thus the maximum power transfer theorem and reciprocity theorem are verified.

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20EC2L1-Circuits and Devices Laboratory

Ex.No: Determination of Resonance Frequency of Series & Parallel


RLC Circuits
AIM:
To plot the resonance curve and to determine the bandwidth & Q-factor of series and
parallel resonance circuit.
EQUIPMENTS & COMPONENTS REQUIRED:
Sl. No. Equipments & Range Quantity
Components
1 Function Generator (0-3) MHz 1
2 CRO with probes 20 MHz 1
3 Resistor 1 KΩ 1
4 Capacitor 0.1 μF 1
5 Decade Inductance Box 1
6 Bread Board 1
7 Connecting wires As required

DESIGN:
PARALLEL RESONANT CIRCUIT:
For a parallel resonant circuit, at resonance, XC = XL.
1
Resonant frequency is f r =
2 LC
Considering fr = 3 KHz & C = 0.1 μF i.e., 0.1 x 10-6 F
1
L=
4 f r2 C
2

1
L=
( )(
4 2 9*106 0.1*10−6 ) = 28.1 mH
fr
Quality factor is obtained by, Q − factor = where BW is bandwidth, which is the
BW
difference between the upper cutoff, (f2) and lower cutoff frequencies (f1) i.e., f2 - f1
SERIES RESONANT CIRCUIT:
For a series resonant circuit, resonant frequency is obtained as follows,
At resonance, XC = XL
1
XC = X L = 2 fr L
where
2 f r C ; Therefore,

1
fr =
2 LC
Considering fr = 3 KHz & C = 0.1 μF i.e., 0.1 x 10-6 F
1
L=
4 f r2 C
2

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20EC2L1-Circuits and Devices Laboratory

1
L= 2
(
4 9*10 6
)( 0.1*10 ) = 28.1 mH
−6

fr
Quality factor is obtained by, Q − factor = where BW is bandwidth, which is the
BW
difference between the upper cutoff, (f2) and lower cutoff frequencies (f1) i.e., f2 - f1
CIRCUIT DIAGRAM:
PARALLEL RESONANCE CIRCUIT:

MODEL GRAPH:

TABULAR COLUMN:

Frequency, F Output Voltage, V0 Gain=20logVo/ Output Current, I


Sl. No. (Hz) (volts) Vin(dB) (mA)

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CIRCUIT DIAGRAM:
SERIES RESONANCE CIRCUIT:

MODEL GRAPH:

TABULAR COLUMN:

Frequency, F Output Voltage, V0 Gain=20logVo/


Sl. No. (Hz) (volts) Vin(dB)

PROCEDURE:
(1) Connect the circuit as shown in figure.
(2) Set to amplitude of the sinusoidal signal to 5 V, say.
(3) Frequency of the input signal is varied from 100 Hz to 2 KHz. Note down the
corresponding voltages on CRO for different frequencies.
(4) Tabulate the readings and calculate the current using the formula I = V0/R (mA).
(5) Plot the graph between voltage measured and frequency.
(6) Draw a horizontal line exactly at √2 times the peak value, which intersects the curve
at two points. Draw a line from intersecting points to x-axis which meets at f1 and f2.
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(7) The bandwidth and Q-factor is obtained from the formula given above.

CALCULATION:

Viva questions:
1. What is resonance?
2. What is resonant frequency?
3. Define bandwidth.
4. Define Q-factor.
5. State the formula for gain.

RESULT:
Thus the resonance curve is plotted and bandwidth & Q-factor is determined for the
parallel and series resonance circuits.

Parallel Resonance Circuit Series Resonance Circuit


Bandwidth (BW in Hz)
Q-factor

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Ex.No. Transient analysis of RL and RC circuits

AIM:
To study the transient response of RL & RC circuits.
APPARATUS REQUIRED:

Sl.no Name of the component Range Quantity


1. AFO 2MHz 1
2. Resistor 1KΩ,4.7kΩ,100Ω 1
3. Capacitor 100µF(or)10nF 1
4. Decade Inductance box 33mH or 100mH 1
4. CRO 1
5. Breadboard 1
6. Connecting Wires As required

THEORY:

Electrical devices are controlled by switches which are closed to connect supply to the
device, or opened in order to disconnect the supply to the device. The switching operation will
change the current and voltage in the device. The purely resistive devices will allow
instantaneous change in current and voltage. An inductive device will not allow sudden change
in current and capacitance device will not allow sudden change in voltage. Hence when switching
operation is performed in inductive and capacitive devices, the current & voltage in device will
take a certain time to change from pre switching value to steady state value after switching. This
phenomenon is known as transient. The study of switching condition in the circuit is called
transient analysis. The state of the circuit from instant of switching to attainment of steady state
is called transient state. The time duration from the instant of switching till the steady state is
called transient period. The current & voltage of circuit elements during transient period is called
transient response.
Transient Response of Circuit Elements:
A. Resistors: As has been studied before, the application of a voltage V to a resistor
(with resistance R ohms), results in a current I, according to the formula:
I= V/R
The current response to voltage change is instantaneous; a resistor has no transient response.
B. Inductors: A change in voltage across an inductor (with inductance L Henrys) does
not result in an instantaneous change in the current through it.The i-v relationship is described
with the equation:
v=L di/dt
This relationship implies that the voltage across an inductor approaches zero as the current in the
circuit reaches a steady value. This means that in a DC circuit, an inductor will eventually act
like a short circuit.
C. Capacitors: The transient response of a capacitor is such that it resists instantaneous
change in the voltage across it. Its i-v relationship is described by:
i=C dv/dt

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FORMULA:
Time constant of RC circuit = RC

CIRCUIT DIAGRAM:
Series RC circuit:-

Series RL circuit:-

MODEL GRAPH:

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PROCEDURE:
• Connections are made as per the circuit diagram.
• Step input is given to first order RL /RC network and finds the output voltage
• The voltage is gradually increased when input frequency is varied for each time duration
in RC. In RL circuit measure the Ammeter reading.
• Tabulate the readings and draw the graph of V(t)vs. t.

TABULATION:
For RC :
S No. Voltage(v) across ‘C’ Frequency (Hz)

For RL :
S No. Voltage(v) across ‘L’ Frequency (Hz)

CALCULATION:

Viva questions:

1. What are active and passive elements?


2. What are ideal elements?
3. What is transient response?
4. What is transient analysis?
5. What is steady state time?

RESULT:
Thus the transient analysis of RL & RC network is verified.

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20EC2L1-Circuits and Devices Laboratory

Ex.No. Characteristics of PN Junction Diode

AIM:

• To study the Forward and Reverse bias V-I Characteristics of a P-N Junction diode.
• To calculate static and dynamic resistance in forward and reverse Bias conditions.

EQUIPMENTS & COMPONENTS REQUIRED:


S.no. Equipments & Components Range/Specification Quantity

1. RPS (0-30V) 1

2. P-N Diode 1N4001/1N4007 1

3. Ammeter (0-100mA)(0-500µA) Each 1

4. Voltmeter (0-1V),(0-15V) Each 1

5. Resistor 1KΩ 1

6. Bread Broad - 1

7. Connecting Wires - As required

THEORY:
A P-N junction diode conducts only in one direction. The V-I characteristics of the diode
are curve between voltage across the diode and current flowing through the diode. When
external voltage is zero, circuit is said to be open and the potential barrier does not allow the
current to flow. When P type (Anode) is connected to positive terminal and n- type (cathode) is
connected to negative terminal of the supply voltage is known as forward bias.

The potential barrier is reduced when diode is in the forward biased condition. At some
forward voltage, the potential barrier altogether eliminated and current starts flowing through
the diode and also in the circuit. Then diode is said to be in ON state. The current increases with
increasing forward voltage. When N-type (cathode) is connected to positive terminal and P-
type (Anode) is connected negative terminal of the supply voltage is known as reverse bias and
the potential barrier across the junction increases. Therefore, the junction resistance becomes
very high and a very small current (reverse saturation current) flows in the circuit. Then diode
is said to be in OFF state. The reverse bias current is due to minority charge carriers. The cut-in
voltage of diode for germanium is 0.3V & for silicon is 0.7V.

FORMULA USED:

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In forward bias condition:

Static Resistance , RS = VF/IF

Dynamic Resistance, RD = ΔVF/ ΔIF

In Reverse bias condition:

Static Resistance , RS = VR/IR

Dynamic Resistance, RD = ΔVR/ ΔIR

DESIGN SPECIFICATIONS:

Absolute –maximum values:

Peak Repetitive Reverse voltage=50V

Operating Junction Temperature= (-55to +175oC)

Storage temperature Range=(-55 to +175oC)

Electrical Characteristics:

Forward Voltage @1.0A=1.1V

Reverse current@ rated VR TA=25oC=5µA

TA=100oC=500 µA

CIRCUIT DIAGRAM:

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PROCEDURE:

FORWARD BIAS:

1. Connections are made as per the circuit diagram.

2. For forward bias, the RPS +ve is connected to the anode of the diode and RPS –ve is connected
to the cathode of the diode

3. Switch on the power supply and increase the input voltage (supply voltage) in steps of 0.1V

4. Note down the corresponding current flowing through the diode and voltage across the
diode for each and every step of the input voltage.

5. The reading of voltage and current are tabulated.

6. Graph is plotted between voltage (VF) on X-axis and current (IF) on Y-axis.

REVERSE BIAS:

1. Connections are made as per the circuit diagram

2. For reverse bias, the RPS +ve is connected to the cathode of the diode and RPS –ve is
connected to the anode of the diode.

3. Switch on the power supply and increase the input voltage (supply voltage) in steps of 1V.

4. Note down the corresponding current flowing through the diode voltage across the diode for
each and every step of the input voltage.

5. The readings of voltage and current are tabulated.

6. Graph is plotted between voltage (VR) on X-axis and current (IR) on Y-axis.

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MODEL GRAPH:

TABULATION :

Forward Bias Reverse Bias

Vin(V) VF (V) IF(mA) Vin(V) VR (V) IR (µA)

CALCULATION:

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Viva questions:

1. Define PN junction.
2. Define diode.
3. List the applications of Diode.
4. What are Biasing and its types?
5. Define static and dynamic resistance.
6. What is the barrier voltage for Ge and Si?
7. Define Cut-in voltage.

RESULT:

Thus, the forward and reverse bias V-I Characteristics are studied and graph is plotted.
From graph static and dynamic resistances of the PN Junction Diode are calculated.

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Ex .No Zener Diode characteristics & Regulator using Zener diode

AIM:

• To study the Forward and Reverse bias V-I Characteristics of a P-N Junction diode.
• To study zener diode as voltage regulator and to calculate % line regulation and %
load regulation

EQUIPMENTS & COMPONENTS REQUIRED:

S.no. Equipments & Components Range/Specification Quantity

1. RPS (0-30V) 1

2. Zener Diode FZ9.1 1

3. Ammeter (0-100mA)(0-1mA) Each 1

4. Voltmeter (0-1V),(0-15V) Each 1

5. Resistor,DRB 1KΩ,100Ω Each 1

6. Bread Broad - 1

7. Connecting Wires - As required

THEORY:

A Zener diode is fabricated by sandwiching a P-type material with N- type material. It


is a P-N junction diode specially designed to operate in the reverse biased mode. The diode is
basically referred to as reference/regulator diode, as it is used to regulate DC signal. The diode
works in the reverse breakdown region in a different way that is based on geometry of doping
.the diode conducts in both forward and reverse mode.This diode is primarily used in the
reverse direction only.The voltage at which the diode breaks is known as zener breakdown.It
is due to the applied voltage reverse potential, an electric field exists near the junction,this field
exist a strong field on the covalent bond and this breaks the band, leading to zener breakdown.

When a high reverse voltage is applied across the junction, there will be very strong
electric field at the junction. And the electron hole pair generation takes place. Thus heavy
current flows. This is known as Zener break down.So a Zener diode, in a forward biased
condition acts as a normal diode. In reverse biased mode,after the breakdown of junction

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20EC2L1-Circuits and Devices Laboratory

current through diode increases sharply. But the voltage across it remains constant. This
principle is used in voltage regulator using Zener diodes The figure shows the zener voltage
regulator, it consists of a current limiting resistor RS connected in series with the input voltage
Vs and zener diode is connected in parallel with the load RL in reverse biased condition. The
output voltage is always selected with a breakdown voltage of the diode.

DESIGN SPECIFICATIONS:

Absolute –maximum values

Electrical Characteristics:

CIRCUIT DIAGRAM:
a) FOR V-I:
FORWARD BIAS:

REVERSE BIAS:

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20EC2L1-Circuits and Devices Laboratory

FORMULA USED :
In forward bias condition:

Static Resistance , RS = VF/IF

Dynamic Resistance, RD = ΔVF/ ΔIF

In Reverse bias condition:

Static Resistance , RS = VR/IR

Dynamic Resistance, RD = ΔVR/ ΔIR

PROCEDURE:
Forward bias:
1. The circuit connections are made as per the circuit diagram
2. Keep the RPS connected in a minimum value and switch ON the power
supply
gradually increase voltage in step of 0.1V
3. Note down the corresponding ammeter and voltmeter readings.
4. Plot the forward V-I curve .
5. Calculate forward resistance Rf= (V/I)

Reverse bias:
1. Connect the circuit as per the circuit diagram.
2. Keep the RPS connected in a minimum value and switch ON the power
supply.
3. Gradually increase voltage in step of .1V.
4. Vary the power supply in step by 1 V.
5. Note down corresponding reverse voltage and current.
6. Plot the graph Current vs. Voltage.
7. Plot the reverse V-I curve.
MODEL GRAPH FOR V-I CHARACTERISTICS:

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TABULATION:

Forward Bias Reverse Bias

Vin(V) VF (V) IF(mA) Vin(V) VR (V) IR (mA)

b) CIRCUIT DIAGRAM FOR ZENER AS VOLTAGE REGULATOR:

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FORMULA USED:

The input source current, IS = IZ + IL …….. (1)

The drop across the series resistance, Rs = Vin – Vz …….. (2)

and current flowing through it, Is = (Vin – VZ) / RS …….. (3)

from equation (1) and (2),

we get, (Vin - Vz )/Rs = Iz +IL …… (4)

Regulation with a varying input voltage (line regulation):

• It is defined as the change in regulated voltage with respect to variation in line voltage.
• It is denoted by ‘LR’. In this, input voltage varies but load resistance remains constant
hence, the load current remains constant. As the input voltage increases, form equation
(3) is also varies accordingly.
• Therefore,zener current Iz will increase. The extra voltage is dropped across the Rs.
Since, increased Iz will still have a constant Vz and Vz is equal to Vout.
• The output voltage will remain constant. If there is decrease in Vin, Iz decreases as load
current remains constant and voltage drop across Rs is reduced. But even though Iz may
change, Vz remains constant hence, output voltage remains constant.
Regulation with the varying load (load regulation):

• It is defined as change in load voltage with respect to variations in load current.


• To calculate this regulation, input voltage is constant and output voltage varies due to
change in the load resistance value.
• Consider output voltage is increased due to increasing in the load current. The left side
of the equation (4) is constant as input voltage Vin, IS and Rs is constant.
• Then as load current changes,the zener current Iz will also change but in opposite way
such that the sum of Iz and IL will remain constant.
• Thus, the load current increases, the zener current decreases and sum remain constant.
Form reverse bias characteristics even Iz changes, Vz remains same hence, and output
voltage remains fairly constant.
PROCEDURE:-

a) Line Regulation:

1. Make the connections as shown in figure below.

2. Keep load resistance fixed value; vary DC input voltage from 5V to 15V.

3. Note down output voltage as a load voltage with high line voltage ‘VHL’ and as a
load voltage with low line voltage ‘VLL’.

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20EC2L1-Circuits and Devices Laboratory

4. Using formula, % Line Regulation = (VHL-VLL)/ VNOM x100, where VNOM = the
nominal load voltage under the typical operating conditions. For ex. VNOM = 9.5 ± 4.5 V

b) Load Regulation:

1. For finding load regulation, make connections as shown in figure below.

2. Keep input voltage constant say 10V, vary load resistance value.

3. Note down no load voltage ‘VNL’ for maximum load resistance value and full load
voltage ‘VFL’ for minimum load resistance value.

4. Calculate load regulation using, % load regulation = (VNL-VFL)/ VFL x100

TABULATION:

LINE REGULATION: At constant resistance =

Input Voltage Vin(V) Output Voltage Vo(V)

LOAD REGULATION: At constant input voltage=

Resistance( Ω) Output Voltage Vo(V)

CALCULATION:
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20EC2L1-Circuits and Devices Laboratory

Viva questions:

1. Define Zener breakdown.


2. Define Avalanche breakdown.
3. List the Applications of Zener diode.
4. What is Voltage Regulation?
5. What are types of regulation?

RESULT:

Thus, the characteristic of Zener diode was studied and their characteristic was drawn
and zener as voltage regulator was verified.

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20EC2L1-Circuits and Devices Laboratory

Ex.No. Common Emitter Input-Output Characteristics

AIM:

To draw input and output characteristics of BJT in CE configuration and to determine


its h-parameters.

EQUIPMENTS & COMPONENTS REQUIRED:

S.no. Equipments & Components Range/Specification Quantity

1. RPS (0-30V) 1

2. Transistor BC 107 1

3. Ammeter (0-150µA)(0-30mA) Each 1

4. Voltmeter (0-1V),(0-30V) Each 1

5. Resistor,DRB 1KΩ,100Ω Each 1

6. Bread Broad - 1

7. Connecting Wires - As required

THEORY:

A transistor is a three terminal device. The terminals are emitter, base, collector. In
common emitter configuration, input voltage is applied between base and emitter terminals
and output is taken across the collector and emitter terminals.Therefore the emitter terminal is
common to both input and output. The input characteristics resemble that of a forward biased
diode curve. This is expected since the Base-Emitter junction of the transistor is forward biased.
As compared to CB arrangement IB increases less rapidly with VBE . Therefore input resistance
of CE circuit is higher than that of CB circuit.

The output characteristics are drawn between Ic and VCE at constant IB. the collector
current varies with VCE unto few volts only. After this the collector current becomes almost
constant, and independent of VCE. The value of VCE up to which the collector current changes
with VCE is known as Knee voltage. The transistor always operated in the region above Knee
voltage, IC is always constant and is approximately equal to IB.

The current amplification factor of CE configuration is given by B= ΔIC/ΔIB.

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20EC2L1-Circuits and Devices Laboratory

FORMULA USED:

1. Input impedance (hie) =ΔVBE/ΔIB at VCE constant


2. Forward current gain (hfe) = ΔIC/ΔIB at VCE constant

3. Output conductance (hoe) = ΔIC/ΔVCE at IB constant

4. Reverse voltage gain (hre) = ΔVBE/ΔVCE at IB constant

DESIGN SPECIFICATIONS:

Electrical Characteristics:

Collector-Base leakage current

For VCB=45V; 15nA

Collector-Emitter Leakage Current@Tamb=125oC

For VCB=45V; 4µA

Emitter Cut-off Current

For VEB=4V, IC=0; 1µA

Base-Emitter Breakdown

For VCE=5V, IC=2mA; 0.7V

Common Emitter Input Impedance

For VCE=5V, IC=2mA,f=1kHz; Min=1.6kΩ

Max=4.5kΩ

Thermal Resistance=500oC/W

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20EC2L1-Circuits and Devices Laboratory

CIRCUIT DIAGRAM:

PROCEDURE:

INPUT CHARACTERSTICS:

1. Connect the circuit as per the circuit diagram.

2. For plotting the input characteristics the output voltage VCE is kept constant at 2V, and for
different values of VBE. Note down the values of IB &Ic.

3. Tabulate all the readings.

4. Plot the graph between VBE and IB for constant VCE.

OUTPUT CHARACTERSTICS:

1. Connect the circuit as per the circuit diagram

2. For plotting the output characteristics the input current IB is kept constant at 20μA and for
different values of VCE note down the values of IC and VBE.

3. Tabulate the all the readings.

4. Plot the graph between VCE and IC for constant IB.

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TABULATION:

INPUT CHARACTERISTICS:

VCE=_____ volts VCE=_____volts

VBE(volts) IB(µA) Ic(mA) VBE(volts) IB(µA) Ic(mA)

OUTPUT CHARACTERISTICS:

IB=_______(µA) IB=_______(µA)

VCE(volts) IC(mA) VBE(volts) VCE(volts) IC(mA) VBE(volts)

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MODEL GRAPH:

INPUT CHARACTERISTICS:

OUTPUT CHARACTERISTICS:

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CALCULATION:

Viva questions:

1. What is BJT & its terminals?


2. What are configurations of BJT?
3. Define early effect.
4. What are three regions of BJT?
5. Define input impedance (hie) and Output conductance (hoe).
6. Define Forward current gain(hfe) and Reverse voltage gain (hre).
7. How amplification and switching are achieved by BJT?
8. List of applications of BJT.
9. Draw the symbol for BJT.
10. How to determine the input and output characteristics of CE-BJT ?

RESULT:

Thus, the characteristics of CE mode configuration are drawn and from the output graph
the h - parameter are determined.

Input impedance (hie) =_____(ohms) Output conductance(hoe) = ___ (mhos)

Forward current gain (hfe) = _____(no unit) Reverse voltage gain(hre) =___(no unit).
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Ex No. Common Base Input- Output Characteristics

AIM: To draw input and output characteristics of BJT in CB configuration and to determine its
h-parameter.

EQUIPMENTS & COMPONENTS REQUIRED:

S.no. Equipments & Components Range/Specification Quantity

1. RPS (0-30V) 1

2. Transistor BC 107 1

3. Ammeter (0-10mA) 2

4. Voltmeter (0-1V),(0-30V) Each 1

5. Resistor,DRB 1KΩ 2

6. Bread Broad - 1

7. Connecting Wires - As required

THEORY:

A transistor is a three terminal active device. The terminals are emitter, base, collector. In CB
configuration, the base is common to both input (emitter) and output (collector). For normal
operation, the E-B junction is forward biased and C-B junction is reverse biased. In CB
configuration, IE is +ve, IC is –ve and IB is –ve. So,

VEB = F1 (VCB, IE) and

IC = F2 (VEB,IB)

With an increasing the reverse collector voltage, the space-charge width at the output junction
increases and the effective base width „W‟ decreases. This phenomenon is known as “Early
effect”. Then, there will be less chance for recombination within the base region. With increase
of charge gradient with in the base region, the current of minority carriers injected across the
emitter junction increases. The current amplification factor of CB configuration is given by,
α = ΔIC/ ΔIE.

FORMULA USED:

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20EC2L1-Circuits and Devices Laboratory

1. Input impedance (hie) =ΔVBE/ΔIE at VCB constant


2. Forward current gain (hfe) = ΔIC/ΔIE at VCB constant
3. Output conductance (hoe) = ΔIC/ΔVCB at IE constant
4. Reverse voltage gain (hre) = ΔVBE/ΔVCB at IE constant

DESIGN SPECIFICATIONS:

Electrical Characteristics:
Collector-Base leakage current
For VCB=45V; 15nA
Collector-Emitter Leakage Current@Tamb=125oC
For VCB=45V; 4µA
Emitter Cut-off Current
For VEB=4V, IC=0; 1µA
Base-Emitter Breakdown
For VCE=5V, IC=2mA; 0.7V
Common Emitter Input Impedance
For VCE=5V, IC=2mA,f=1kHz; Min=1.6kΩ
Max=4.5kΩ
Thermal Resistance=500oC/W
CIRCUIT DIAGRAM:

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20EC2L1-Circuits and Devices Laboratory

PROCEDURE:

INPUT CHARACTERISTICS:

1. Connections are made as per the circuit diagram.

2. For plotting the input characteristics, the output voltage VCE is kept constant at

0V and for different values of VEE, note down the values of IE and VBE

3. Repeat the above step keeping VCB at 2V, 4V, and 6V and all the readings are

tabulated.

4. A graph is drawn between VEB and IE for constant VC.

OUTPUT CHARACTERISTICS:

1. Connections are made as per the circuit diagram.

2. For plotting the output characteristics, the input IE is kept constant at 0.5mA

and for different values of VCC, note down the values of IC and VCB.

3. Repeat the above step for the values of IE at 1mA, 5mA and all the readings are

tabulated.

4. A graph is drawn between VCB and Ic for constant IE.

TABULATION:

INPUT CHARACTERISTICS:

VCB=_____ volts VCB=_____volts

VBE(volts) IE(mA) IC(mA) VBE(volts) IE(mA) IC(mA)

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OUTPUT CHARACTERISTICS:

IE=_______(mA) IE=_______(mA)

VCB(volts) IC(mA) VBE(volts) VCB(volts) IC(mA) VBE(volts)

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MODEL GRAPH:

INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS:

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CALCULATION:

Viva questions:

1. Define input impedance (hib) and Output conductance (hob).


2. Define Forward current gain(hfb) and Reverse voltage gain (hrb).
3. How to determine the input and output characteristics of CB-BJT?
4. Compare CE,CB and CC configurations.
5. Define α, β, γ.

RESULT:

Thus, the characteristics of CB mode configuration are drawn and from the output graph
the h - parameter are determined.

Input impedance (hib) =_____(ohms) Output conductance(hob) = ___ (mhos)

Forward current gain (hfb) = _____(no unit) Reverse voltage gain(hrb) =___(no unit).

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20EC2L1-Circuits and Devices Laboratory

Ex.No. FET Characteristics

AIM:

To determine the Drain & Transfer characteristics of given JFET & to find its parameters.

EQUIPMENTS & COMPONENTS REQUIRED:

S.no. Equipments & Components Range/Specification Quantity

1. RPS (0-30V) 1

2. JFET BFW10 1

3. Ammeter (0-30mA) 1

4. Voltmeter (0-10V),(0-30V) Each 1

5. Resistors 1KΩ 2

6. Bread Broad - 1

7. Connecting Wires - As required

THEORY:

JFET is a three dimensional device that in which current conduction is by one type of
carriers in electrons & holes. It’s a voltage control constant control device in which variations
in input voltage controls the output current. it has 3 terminals that is source, drain and gate.

It has high input impedance & a low noise level. It consists of a P type on N type silicon
base containing 2 PN Junctions at the sides. Its base forms the conducting channel for the charge
carriers. If the base is through holes its called P-channel JFET.

The 2 PN junction at side form 2 depletion layers of the current conduction by charge
carriers through the channel between the 2 layers & out of drain width & hence the resistance
of this channel can be controlled by change in input voltage VGS.

FORMULA USED:

Drain resistance,rd = ΔVDS/ΔID

Transconductance,gm=ΔID/ΔVGS

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Amplification factor (μ) = dynamic resistance * Transconductance

μ = ΔVDS/ΔVGS

DESIGN SPECIFICATIONS:

Maximum Ratings:

Drain-Source Voltage VDS=30Vdc

Drain-Gate Voltage VDG=30Vdc

Reverse Gate-Source Voltage VGSR=-30Vdc

Forward Gate Current IGF=10mAdc

Electrical Characteristics:

Off characteristics

Gate-Source Cutoff Voltage VGS(off)=8Vdc

Gate-Source Breakdown Voltage V(BR)GSS=30Vdc

Gate Reverse Current IGSS=.01nAdc

On characteristics

Zero-Gate Voltage Drain Current IDSS=8-20mAdc

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CIRCUIT DIAGRAM:

Transfer characteristics:

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PROCEDURE:
DRAIN CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. Set gate voltage VGS=-1, vary the drain voltage VDS instep of 1V & note down the
corresponding drain current ID.
3. Repeat the above procedure for VGS=0V,-2V. 4. Plot the graph for a constant VDS Vs ID 5. Find
the drain resistance (rd) = ΔVDS/ΔID

TRANSFER CHARACTERISTICS:

1. Connections are made as per the circuit diagram.


2. Set gate voltage VDS=1V, vary the gate voltage VGS in step of 1V and note down the
corresponding drain current ID
3. Repeat the above procedure for VDS=5V, 10V.
4. Plot the graph for VGS Vs ID.
5. Find the Trans conductance (gm) gm = ΔID/ΔVGS
Amplification factor (μ) = dynamic drain resistance * Tran conductance
μ = ΔVDS/ΔVGS.
TABULATION:
Drain characteristics:

VGS VGS

VDS(V) ID(mA) VDS(V) ID(mA)

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Transfer characteristics:

VDS (V) VDS (V)

VGS(V) ID(mA) VGS(V) ID(mA)

CALCULATION:

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Viva questions:

1. What is FET?

2. Difference between BJT and FET.

3. What are different types of FET?

4. What is JFET and draw its symbol.

5. What are feature of JFET?

6. How to determine Drain and transfer characteristics.

7. Define Pinch-off voltage.

8. What is Shockley equation?

9. List the applications of JFET.

10. Define the parameters of JFET.

11. Differentiate JFET and MOSFET.

12. Relationship between various FET parameters.

13. FET is voltage controlled or current controlled?

RESULT: Thus the drain and transfer characteristics of JFET is drawn and the parameters
were determined.

1. Drain resistance (rd) =…………

2. Trans conductance (gm) =…………

3. Amplification factor (μ) =………...

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Ex No. SCR Characteristics

Aim:

Study of Characteristics of SCR and plotting V-I Characteristics

Equipments Required:

S.no. Equipments & Components Range/Specification Quantity

1. DC power supplies(RPS) +15 V, +35 V. 1

2. SCR kit Pe03 1

3. Ammeter (0-20mA),(0-5mA) 1,1

4. Voltmeter (0-10V),(0-30V) Each 1

5. Patch cords. 2mm As required

6. Multimeter - 2

THEORY:

SCR is four layer, three terminal device in which the end P layer acts as a anode, the end N
layer acts as a cathode and P layer nearest to cathode acts as a gate. As leakage current in silicon
is very small compared to the germanium. SCR are made of silicon and not germanium. When
the gate is kept open that is IG=0, the operation of SCR is similar to PNPN diode. When IG is
less than zero the amount of reverse bias applied to I2 is increased. So breakdown voltage VBO
is increased. When IG > 0, the amount of reverse bias applied to I2 is decreased thereby decreased
breakdown voltage.

SCR Symbol

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CIRCUIT DIAGRAM:

PROCEDURE :

To plot the V -I characteristics proceed as follows:

1. Connect + 15 V & +35 V DC power supplies at their indicated position from external source.

2. Rotate both the potentiometer P1 and P2 fully in counter clockwise direction connect
voltmeter to point ‘6’ & ground to read Vg and at point ‘3’ & ground to read Vak

3. Connect ammeter at point ‘1’ & ‘2’ to indicate the current Ia and at point 4 & 5 to indicates
the gate current Ig.

4. Switch ‘On’ the power supply.

5. Vary potentiometer P2 to set the gate current Ig to a lower value (6mA, 6.1mA,6.2mA
……………).

6. Increase anode voltage Va gradually by varying potentiometer P1.

7. Observe the current Ia in the anode circuit, It shows almost zero current at the initial stage

8. At certain point of positive anode voltage current Ia shows sudden rise in reading &
voltmeter reading falls down to almost zero. This action indicates the firing of SCR.

9. If this not happens, repeat the procedure from step 5 for slightly higher value of gate
current Ig.

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10. Try the various value of gate current to get the firing of SCR.

11. Keeping gate current constant observe precisely the firing voltage of SCR and record it in
the observation table.

12. Also record the anode voltage Va & anode current after firing of the SCR.

13. Plot the graph of Va versus Ia.

Tabulation:

Gate current, Ig=____mA

S.No Anode Anode Current,

Voltage,Va Ia (mA)

Model graph:

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Viva questions:

1. Define Thyristors.
2. What is SCR and its symbol?
3. Define Holding current and Latching current.
4. State the importance of gate voltage and current.
5. In which state SCR turns of conducting state to blocking state?
6. What is dynamic resistance of SCR?
7. How to turn off SCR?
8. What is gate trigger current
9. List the applications of SCR.

RESULT: Thus the characteristics of SCR is obtained and plotted.

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Exp.No. CLIPPER, CLAMPER AND FULL WAVE RECTIFIER

AIM:
To study the characteristics of clipper, clamper and full wave rectifier.

APPARATUS REQUIRED:

S No. COMPONENTS SPECIFICATION QUANTITY

1. Step down Transformer 230Vto 9V 1

2. Diode 1N4001 2

3. Resistor 1kΩ 1

4. Capacitor 1000 µF,0.1 µF Each 1

5. CRO 1

6. AFO 1

7. Bread board 1

8. Connecting wires As required

9. Probes 2

THEORY:
The process of converting AC voltage and current to Direct current is called rectification.
An electronic device that offers a low resistance to current in one direction and a high resistance
in the other direction is capable of converting a sinusoidal waveform into a unidirectional
waveform. Diodes have this characteristic, which makes it a useful component in the design of
rectifiers. In order to achieve a constant/pure DC voltage at the output, filtering should be done
to the pulsating DC output of the rectifier. The output varies with the variation in AC mains.
Hence a voltage regulator is used to maintain the output voltage at the same value.
Clipper:
The circuit with which the waveform is shaped by removing or clipping a portion of the
input signal without distorting the remaining part of the a.c waveform.
Clamper:
The circuits which shifts (clamps) a signal to a different d.c level,i.e introduces a d.c level
to an a.c signal. Hence the clamping network is called as d.c restorer.
Full Wave Rectifier:
Full Wave Rectifier converts both the positive and negative cycle of the input waveform
to DC.In a circuit, center tapped transformer is used to provide supply to two diode

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20EC2L1-Circuits and Devices Laboratory

simultaneously. Diode conducts at both the half cycles.The capacitor helps to remove ripple and
provides constant DC output.
Ripple factor:
Ripple is the small unwanted residual periodic variation of direct current output of power
supply which has been derived from an alternating current source.Ripple factor is defined as the
ratio of root mean square value of ripple voltage to the absolute value of dc component of the
output voltage.
FORMULA USED:
i) Full Wave Rectifier:
Without Filter:
Irms = Vm/√2R
Idc =2Vm/πR
Ripple factor=√(( Irms / Idc)2 -1)
With Filter:
Vrms = (Vmax- Vmin)/ 2√3
Vdc = (Vmax+ Vmin)/ 2
Ripple factor= Vrms / Vdc
PROCEDURE:
• Connection are done as per the circuit diagram.
• The AC input is step down as 9V and fed into diode for rectification.
• The rectified output waveform is observed and Voltages, Time are noted.
• The capacitor act as filter and produces DC output.
• The Voltage Vs.Time graph is plotted for clipper, clamper & FWR.
CIRCUIT DIAGRAM:

Positive Clipper:
1K

+
+ A CRO Vo
Vin AFO 1N4001
-
- K

Negative Clipper:

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1N4001
A K

+
+ CRO Vo
Vin AFO
1K -
-

Positive Clamper:

+ -

+
K
+ CRO Vo
Vin AFO 1N4001 -
1K
- A

Negative Clamper

0.1uF
+ -

+
+ A
CRO Vo
Vin AFO 1N4001 -
1K
- K

Full Wave Rectifier(Without filter)::

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1N4001
230V 9V A K
+
1K CRO Vo
Single Phase
AC Supply
0V -
230V

0V 9V A K
1N4001

Full
wave Rectifier (With filter):

1N4001
230V 9V A K
+ +
1K 1000uF
CRO Vo
Single Phase
0V -
AC Supply -
230V

0V 9V A K
1N4001

MODEL GRAPH:

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Input signal for FWR

Output waveform for FWR


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TABULATION:

Type of circuit Input Waveform Output Waveform


Amplitude (V) Time (mS) Amplitude (V) Time (mS)
Positive Clipper

Negative Clipper

Positive Clamper

Negative Clamper

FULL WAVE RECTIFIER

AC input DC output without Filter DC output with Filter


Vin Time Vout Time Vout Time
(V) (mS) (V) (mS) (V) (mS)
Vmax Vmin TON TOFF Vmax Vmin TON TOFF

CALCULATION:

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Viva questions:
1. Define Clipper and its types.
2. Define clamper and its types.
3. What is rectifier and its types?
4. Define rectification.
5. What is ripple factor?
6. State the formula to calculate ripple factor for FWR with and without filter.
7. What is step down and step up transformer?
8. What is centered tap transformer?
9. List out the applications of Clipper and Clamper.
10. Name the component which acts as a filter in rectification.

RESULT:
Thus, the clipper, clamper and full wave rectifier (with and without filter) are verified.

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Ex.No. UJT CHARACTERISTICS


(Content beyond syllabus)
AIM: To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off
Ratio (η).
APPARATUS REQUIRED:

Sl.no Name of the component Range Quantity


1. Regulated power supply 0-30V 2
2. Resistors 1KΩ,470Ω 2,1
3. Voltmeter 0-20V (DMM) 2
4. Ammeter 0-20mA (DMM) 1
5. Breadboard 1
6. Connecting Wires As required
THEORY:
A Unijunction Transistor (UJT) is an electronic semiconductor device that has only one
junction. The UJT Unijunction Transistor (UJT) has three terminals an emitter (E) and two bases
(B1 and B2). The base is formed by lightly doped n-type bar of silicon. Two ohmic contacts B1
and B2 are attached at its ends. The emitter is of ptype and it is heavily doped. The resistance
between B1 and B2, when the emitter is open-circuit is called interbase resistance. The original
Unijunction transistor, or UJT, is a simple device that is essentially a bar of N type semiconductor
material into which P type material has been diffused somewhere along its length. The 2N2646
is the most commonly used version of the UJT.
Circuit symbol:
The UJT is biased with a positive voltage between the two bases. This causes a potential drop
along the length of the device. When the emitter voltage is driven approximately one diode
voltage above the voltage at the point where the P diffusion (emitter) is, current will begin to
flow from the emitter into the base region. Because the base region is very lightly doped, the
additional current (actually charges in the base region) causes (conductivity modulation) which
reduces the resistance of the portion of the base between the emitter junction and the B2 terminal.

UJT symbol
This reduction in resistance means that the emitter junction is more forward biased, and so even
more current is injected. Overall, the effect is a negative resistance at the emitter terminal. This
is what makes the UJT useful, especially in simple oscillator circuits. when the emitter voltage
reaches Vp, the current starts o increase and the emitter voltage starts to decrease. This is
represented by negative slope of the characteristics which is referred to as the negative resistance
region, beyond the valley point, RB1 reaches minimum value and this region,V EB proportional
to IE.
DESIGN SPECIFICATIONS:
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20EC2L1-Circuits and Devices Laboratory

Absolute –maximum values:


Emitter reverse voltage=30V
RMS Emitter current =50mA
Power dissipation=300mW
Operating Temperature= (-65to +125.C)
Storage temperature=(-65 to +150C)
Electrical Characteristics:
Intrinsic standoff ratio (VBB=10V):-Min=0.56, typ=0.69, Max=0.75.
Interbase Resistance (VBB=3V,IE=0):- Min=0.56, typ=0.69, Max=0.75.
Emitter saturation voltage(VBB=10V):-typ=2V.
Peak Point emitter current(VBB=25V):-typ=0.8mA
Valley Point Current(VBB=20V):-Min=4,typ=5mA

FORMULA USED:
VP = ηVBB + VD
η = (VP-VD) / VBB
η = ( η1 + η2 + η3 ) / 3
CIRCUIT DIAGRAM:

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20EC2L1-Circuits and Devices Laboratory

V-I characteristics:

PROCEDURE:
1. Connection is made as per circuit diagram.
2. Output voltage is fixed at a constant level and by varying input voltage
corresponding emitter current values are noted down.
3. This procedure is repeated for different values of output voltages.
4. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using
η = (Vp-VD) / VBB
5. A graph is plotted between VEE and IE for different values of VBE.

TABULATION:
VB1B2= volts VB1B2= volts VB1B2= volts
VEB1(V) IE(mA) VEB1(V) IE(mA) VEB1(V) IE(mA)

CALCULATION:

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20EC2L1-Circuits and Devices Laboratory

Viva questions:
1. What is the symbol of UJT?
2. Draw the equivalent circuit of UJT?
3. What are the applications of UJT?
4. Formula for the intrinsic standoff ratio?
5. What does it indicates the direction of arrow in the UJT?
6. What is the difference between FET and UJT?
7. Is UJT is used an oscillator? Why?
8. What is the Resistance between B1 and B2 is called as?
9. What is its value of resistance between B1 and B2?
10. Draw the characteristics of UJT?

RESULT: The Intrinsic Stand-Off Ratio (η) of the UJT is _____.

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