Multilevel Gates:

AND-OR  SOP : To increase levels, factor

OR-AND  POS : To increase levels, multiply out

NAND gates: Two ways to convert circuit to NAND-only

1- Steps:
a. Simplify the expression
b. Design a multilevel circuit
c. The last gate must be an OR gate
d. Number the levels starting from the output as 1
e. Change all the gates to NAND, leaving the connections unchanged
f. Invert literals as inputs to odd-numbered gates
2- Steps:
a. Add bubbles to inputs of OR gates
b. Add bubbles to outputs of AND gates
c. Add inverters for every bubble
d. Cancel redundant inverters

Multiplexers:

 Combinational circuit
n
 2 -to-1 where n is the number of selectors
 Characteristic equation for 2-to-1: Y=S’ I 0 +S I 1
 Enables:
o controls multiplexing function
o can be used in an 8-to-1 MUX implemented by 4-to-1 MUX only
 Applications:
o 2-to-1 & 4-to-1 can be used to construct 8-to-1
o 2-to-1 or 8-to-1 can be used to construct 4-to-1
o 2-to-1 can be used to construct 3-to-1
o Functions can be constructed using a MUX…

Decoders:

 Combinational
 n-to-2n
 May be active high or active low
Priority Encoders:

 Combinational
n
 2 -to-n

PLD-s
ROM: Fixed AND & programmable OR
PAL: Programmable AND & OR
PLA: Fixed OR & programmable AND

SR Latch

S R Q Q’
0 0 Q Q’
0 1 0 1
1 0 1 0
1 1 Not used Not used

S R Q Q’
0 0 Q Q’
0 1 0 1
1 0 1 0
1 1 Not used Not used

S R Q Q’
0 0 Not used Not used
0 1 1 0
1 0 0 1
1 1 Q Q’

S R Q Q’
0 0 Q Q’
0 1 0 1
1 0 1 0
1 1 Not used Not used