Multiplex | Electrical Engineering | Physics & Mathematics

Example of a Combinatorial Circuit: A Multiplexer (MUX

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Consider an integer ‘m’, which is constrained by the following relation: m = 2n, where m and n are both integers.  A m-to-1 Multiplexer has  m Inputs: I0, I1, I2, ................ I(m-1)  one Output: Y  n Control inputs: S0, S1, S2, ...... S(n-1)  One (or more) Enable input(s) such that Y may be equal to one of the inputs, depending upon the control inputs.
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Example: A 4-to-1 Multiplexer A 4-to-1 Multiplexer: I0 2n inputs I1 I2 I3 Y 1 output Enable (G) S0 S1 n control inputs 2 .

S’1. S’0 + G.Characteristic Table of a Multiplexer  If the MUX is enabled. I2. s0 s1 0 0 Y=I0 0 1 1 1 0 1 Y=I1 Y=I2 Y=I3 Putting the above information in the form of a Boolean equation. S0 + G. Y =G. S’0 + G. S1. S’1. I3. S0 3 . S1. I1. I0.

10.6 and 15 MAY BE 0 CONNECTED to either 0 or 1 S3 S2 S1 S0 4 .3.13.Implementing Digital Functions: by using a Multiplexer: Example 1 Implementation of F(A.6. d(4.14).8.12.B.D)=∑ (m(1.7.15)) By using a 16-to-1 multiplexer: 0 1 0 1 0 1 0 1 1 0 1 0 1 1 1 I0 I1 I2 I3 I4 I5 I6 I7 I8 I9 I10 I11 I12 I13 I14 I15 F NOTE: 4.5.C.

Implementing Digital Functions: by using a Multiplexer: Example 2 In this example to design a 3 variable logical function. F(x. 7) 5 . 2. we try to use a 4-to-1 MUX rather than a 8-to-1 MUX. y. 4. z)=∑ (m(1.

F =S’1.z’ +x. y = S0 .Implementing Digital Functions: by using a Multiplexer: Example 2 …. S0.z …… (1) One Possible Solution: Assume that x = S1 . I3 …. I0 + S’1. I1 + S1.z+ x’.y’.2 In a canonic form: F = x’.y. I0 = I3 =Z I1 = I2 =Z’ 6 . I2 + S1. S’0. S0. If F is to be obtained from the output of a 4-to-1 MUX.z’+x. S’0.y.y’.(2) From (1) and (2).

3 Z X Y 7 .Implementing Digital Functions: by using a Multiplexer: Example 2 ….

F = S’0 . I0 = y’ = I2 I1 = y = I 3 8 .I1 . S1 ………… (3) From (1) and (2). x = S0 .I3 . If F is to be obtained from the output of a 4-to-1 MUX.I0 . S’1 + S0 .4 Another Possible Solution: Assume that z = S1 .I2 .Implementing Digital Functions: by using a Multiplexer: Example 2 …. S1 + S’0 . S’1 + S0 .

5 9 .Implementing Digital Functions: by using a Multiplexer: Example 2 ….

I0 I1 4 to 1 MUX 1 to 4 DEMUX Y0 Y out Input Y1 I2 Y2 I3 Y4 S1 S0 S1 S0 10 .The diagram below shows the relation between a multiplexer and a Demultiplexer.

..... ................. S2...Demultiplexer (DMUX)/ Decoder A 1-to-m DMUX. S(m-1) 11 ...... …………….... .. with ACTIVE HIGH Outputs. has  1 Input: I ( also called as the Enable input when the device is called a Decoder)  m ACTIVE HIGH Outputs: Y0..... Y2... Y1... S1.Y(m-1)  n Control inputs: S0..

Characteristic table of the 1-to-4 DMUX with ACTIVE HIGH Outputs: Table 2 12 .

with ACTIVE LOW Outputs: Table 3 13 .Characteristic Table of a 1-to-4 DMUX.

A Decoder is a Demultiplexer with a change in the name of the inputs : Y0 2 to 4 Decoder ENABLE INPUT Y1 Y2 Y4 S1 S0 When the IC is used as a Decoder. the input I is called an Enable input 14 .

all the Outputs remain ‘unexcited’. when Enable is 0.  15 . The ‘unexcited’ state of an Output is 0 for an IC with ACTIVE HIGH Outputs.DECODER: In Tables 2 and 3. Enable Input: In a Decoder.e.  The ‘unexcited’ state of an Output is 1 for an IC with ACTIVE LOW Outputs. when the IC is Disabled. i. the Enable Input can be ACTIVE LOW or ACTIVE HIGH.

Characteristic Table of a 2-to-4 DECODER. with ACTIVE LOW Outputs and with ACTIVE LOW Enable Input: Table 4 Logic expressions for the outputs of the Decoder of Table 4: Y0 = E + S1 + S0 Y1 = E + S1+ S0‘ Y2 = E + S1‘ + S0 Y3 = E + S1‘ + S0‘ 16 .

A cross-coupled set of NAND gates Characteristic table: X Y Q1 Q2 0 0 1 1 0 1 0 1 1 1 0 1 0 1 For this case. 17 . which exist before the inputs of X = 1 and Y =1 are applied. the outputs can be obtained by using the following procedure: (i) Assume a set of values for Q1 and Q2. (ii) Obtain the new set of values for Q1 and Q2 (iii) Verify whether the procedure yields valid results.

A cross-coupled set of NAND gates OLD Outputs NEW Outputs X 0 Y 0 Q1 ----Q2 ---Q1 1 Q2 1 …2 0 1 1 1 0 1 ------1 0 ------0 1 1 0 1 0 0 1 0 1 18 .

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