Lecture No.

14
Computer Logic Design
Functions of Combinational Logic

1
 Combinational Functional Devices

• Basic Subtractors
– Half Subtractor
– Full Subtractor

2
 Half & Full Subtractors

A D A D

Output Bits

Output Bits
Input Bits

Input Bits
B B

Bout Bin Bout

Half-Subtractor Full-Subtractor

3
 Half- Subtractor
• Function Table
• Expression
• Logic Circuit

4
Half- Subtractor Function Table

Input Output
X Y D B
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

D  XY  X Y  X  Y Borrow  X.Y
5
Half-Subtractor Circuit

X
D
Y

6
 Full-Subtractor
• Function Table
• Expression
• Logic Circuit

7
Full- Subtractor Function Table
Input Output
X Y Z (Borrow in) B D
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 1 0
1 0 0 0 1
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

8
 Difference Expression
D  X YZ  XY Z  X Y Z  XYZ
D  X(YZ  Y Z)  X(Y Z  YZ)

D  X(Y  Z)  X(Y  Z)
D  XYZ

9
 Borrow Expression
Using K-Map

B  XY  XZ  YZ

10
 Full-Subtractor Circuit
Compare with Full Adder

S XYZ
C  XY  XZ  YZ

D  XYZ
B  XY  XZ  YZ

11
 Full-Subtractor Circuit w/
2’s Complement
Subtraction
9 1001
- 5 1011
4 1 0100
1001 1010

A (0-3) B (0-3)
C o ut 4-bit Parallel C in =1
Adder
Su m (0-3)
12
4-Bit Adder Subtractor Unit
B3 B2 B1 B0

Add = 0
Subtract = 1

U C U C U C U C

A3 A2 A1 A0

COut CIn
4-bit Parallel Adder

13
S3 S2 S1 S0
 8-Bit Adder Subtractor Unit
B7 B6 B5 B4 B3 B2 B1 B0

Add = 0
Subtract = 1

U C U C U C U C U C U C U C U C

A7 A6 A5 A4 A 3 A2 A 1 A0

nd
CIn st CIn
2 4-bit Parallel Adder 1 4-bit Parallel Adder
COut

S7 S6 S5 S4 S3 S2 S1 S0 14
 8-Bit Adder Subtractor Unit
• Example

Adding 103 and 67

Carry MS Adder LS Adder
A4-7 0110 A0-3 0111
B4-7 0100 B0-3 0011
Cin 0 Cin 0
0 S4-7 1010 S0-3 1010
15
 8-Bit Adder Subtractor Unit
• Example

Subtracting 67 from 103

Carry MS Adder LS Adder
A4-7 0110 A0-3 0111
B4-7 1011 B0-3 1100
Cin 1 Cin 1
1 S4-7 0010 S0-3 0100
16
 Combinational Functional Devices

• Comparators
– Parallel
– Iterative

17
 2-Bit Comparators – Case A > B
Inputs Output Inputs Output
A1 A0 B1 B0 F A1 A0 B1 B0 F
0 0 0 0 0 1 0 0 0 1
0 0 0 1 0 1 0 0 1 1
0 0 1 0 0 1 0 1 0 0
0 0 1 1 0 1 0 1 1 0
0 1 0 0 1 1 1 0 0 1
0 1 0 1 0 1 1 0 1 1
0 1 1 0 0 1 1 1 0 1
0 1 1 1 0 1 1 1 1 180
2-Bit Comparators – Case A > B
• K-map simplification
A1A0\B1B0 00 01 11 10

00 0 0 0 0
01 1 0 0 0
11 1 1 0 1
10 1 1 0 0

(A  B)  A1B1  A0 B1B0  A1A0 B0

19
2-Bit Comparators – Case A > B
A1

B1
A0 A>B
B0

(A  B)  A1B1  A0 B1B0  A1A0 B0

20
2-Bit Comparators – Case A = B
A1
A0
B1
B0

A=B

(A  B)  A1 A0 B1B0  A1A0 B1B0  A1A0B1B0  A1 A0B1B0

21
2-Bit Comparators – Case A < B
A1
B1

A0 A<B
B0

(A  B)  A1B1  A1 A0B0  A0B1B0

22
 4-Bit Comparator
A3
A>B
A2 A>B
2-bit
A=B
Comparator
B3 M
A<B
A<B
B2

A1
A>B
A0 2-bit
A=B A=B
Comparator
B1 L
A<B
B0

23
 4-Bit Comparator
A B Comparator Comparator
M L
1101 0111 A>B
0110 1011 A<B
0011 0010 A=B A>B
0100 0101 A=B A<B
1001 1001 A=B A=B

24
 12-Bit Comparator
0 A<B in A<B o ut A<B in A<B o ut A<B in A<B o u t

+5v A=B in A=B o ut A=B in A=B o ut A=B in A=B o u t

74X85 74X85 74X85
0 A>B in A>B o ut A>B in A>B o ut A>B in A>B o u t

A0 A4 A8
A0 A0 A0
B0 B4 B8
B0 B0 B0
A1 A5 A9
A1 A1 A1
B1 B5 B9
B1 B1 B1
A2 A6 A10
A2 A2 A2
B2 B6 B10
B2 B2 B2
C o m p a ra to r1 C o m p a ra to r2 C o m p a ra to r3
A3 A7 A11
A3 A3 A3
B3 B7 B11
B3 B3 B3

A(0-11)

B(0-11)
25