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Mansoor Shaukat 1

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Mansoor Shaukat

8. Differential & Multistage Amplifiers


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Differential Amplifiers
• Move to more complex analogue circuits and systems.
• Differential Amplifiers
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– Most widely used building block
– Input stage of nearly every op-amp
• These are well-suited for IC fabrication because:
– Performance depends on matching the two sides of the pair
– These utilize more components than single-ended circuits and are
economical in IC fabrication
• Why differential amplifiers?
• Less sensitive to noise and interference
– If there is interference on the two input wires, the difference
only is sensed (interference cancels out)
• Direct coupling is possible thus large capacitances can be avoided
• So ideally suited for IC fabrication because large capacitors are
difficult to fabricate economically in IC process

• …contd!

Difference / Differential Amplifiers 4

• What is a difference amplifier?


– A difference amplifier is one that responds to the difference between the two
signals applied at its inputs.
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• It ideally rejects signals that are common to both inputs.

• Consider the input signals as v1 and v2 :


– The difference / differential input signal is:
vid = v2 – v1
– The common-mode input signal is the average of the two input signals:
vicm = (v2 + v1 )/2
• By adding and subtracting to get v1 and v2 :
– v1 = vicm - (vid)/2 and
– v2 = vicm + (vid)/2

• Example : Determine the differential and common-mode input signals when


the two inputs are v1 = 1.002 V and v2 = 0.998 V.
• Solution: vicm = 1 V and vid = - 4 mV

• Output of a Difference/Differential Amplifier!



Output of a Difference Amplifier 5

• Ideally the difference amplifier will amplify only the


differential input signal vid.
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• It will completely reject common-mode input signal vicm.
• However, non ideal or practical circuits will have an output
voltage :
vo = Advid + Acmvicm
where Ad denotes amplifier differential gain and Acm
denotes common-mode gain
• A parameter that determines efficacy of a differential
amplifier is defined as Common-Mode Rejection Ratio:
CMRR = 20 log {Ad / Acm}

– Ideally CMRR is infinite because Acm = 0


• Where does the common-mode signal come from?

• The MOS Differential Pair!



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MOS Differential Amplifier


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The MOS Differential Pair
• The circuit for basic MOS differential pair is :

• Two matched MOS transistors Q1 and


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Q2 with sources joined together by a VDD
constant current source I.
• Operation is such that MOSFET does RD RD
not enter in triode region of
operation. VD1 iD1 iD2 VD2

• Generally active loads are employed


instead of RD. Q1 Q2
• Various modes of operation are iD1 iD2
+
vG1 +
- vG2
possible: -

• Operation with a common-mode I

input voltage -V SS
• Operation with a differential input
voltage
• Large signal operation
• Small-signal operation

• Operation with a common-mode input voltage!



Operation with a Common-Mode Input Voltage 8

• The circuit:
• The two gates are joined together and
connected to a voltage VCM called the common- VDD
Mansoor Shaukat
mode voltage
• So VG1 = VG2 = VCM RD RD

• And VS = VCM - VGS


VD1 VD2
• Since Q1 & Q2 are matched iD1 = iD2 = I/2
• VGS is gate to source voltage corresponding to
Q1 Q2
a drain current of I/2 I/2 VS I/2
+
• Neglecting channel length modulation, the vCM - VGS VGS

drain current is: I 1  W 


I D1  I D 2 
2

2
2

k n   VGS  Vt 
L
• Or: I
I 1 W 
 k n   VGS  Vt
2 2 L
 2

1 W 
k n   Vov 
2 L
2
-V SS

• And: I
Vov 
W 
k n  
L

• Operation with a common-mode input voltage…contd! 


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Operation with a Common-Mode Input Voltage…contd

• The voltage at each drain: VDD


Mansoor Shaukat
VD1 = VD2 = VDD – I/2RD
RD RD
• The difference in voltage of two drains
is zero. VD1 VD2
• The differential pair does not respond
to (it rejects) common-mode i/p voltage. Q1 Q2

• Varying the value of vCM current I I/2 VS I/2


+
vCM VGS VGS
-
continues to divide equally between Q1
and Q2 as long as the transistors
I
remain in saturation.
• The voltages at the drain will not -V SS

change.

• Input Common – mode Range!



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Input Common-Mode Range

• The highest value of VCM is limited by the requirement that


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both transistors remain in saturation ie
VDS > (VGS – Vt)
or VGS < (VDS + Vt)
so VG < (VD + Vt)
hence VCM,max = VG = VD + Vt
or VCM,max = Vt + VDD - I/2RD
• The lowest value is determined by the need to allow for
sufficient voltage (say VCS) across the current source for it
to operate properly
so VCM,min = VGS + VCS – VSS

• Example!

Operation with a Differential Input Voltage 11

• The circuit:
• We apply a difference or differential VDD
input voltage: Vid = VGS1 – VGS2
Mansoor Shaukat
• If Vid is positive, VGS1 will be greater RD RD

than VGS2 and hence iD1 > iD2 VD1 VD2


• The difference output voltage VD2 – VD1
will be positive and vice versa when Vid Q1 Q2
iD1 VS iD2
is negative. vid +
- VGS1 VGS2
• So the differential pair responds to
difference-mode or differential input
signals. I

• At some value of vid, the entire bias -V SS

current will flow in one of the two


transistors.
– For example; when vGS1 reaches the1
value that corresponds to:
iD1  I 
W 

k n   VGS 1  Vt
2 L
 2

• …contd!

Operation with a Differential Input Voltage…contd 12

VDD
k n   VGS 1  Vt 
1 W  2
iD1  I 
2 L
RD RD

Mansoor Shaukat
So:
2I VD1 VD2
VGS 1  Vt 
W 
k n  
• Or: L
Q1 Q2
VGS 1  Vt  2 Vov iD1 VS iD2
+
vid VGS1 VGS2
-
where vov is the overdrive voltage
corresponding to a drain current of I/2.

I
• The value of vid at which the entire bias current is
-V
steered into Q1 is vidmax = vGS1 + vS = vt + /2 vov + vS SS

• Now vs = -vt for cutting off Q2.


• Hence vidmax = /2 vov
• And in the negative direction vidmax =- /2 vov
• Therefore the range is?
• Differential Amplifier as a linear amplifier!

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Operation as a Linear Amplifier

• Use of differential amplifier as a linear amplifier?


Mansoor Shaukat
• Keep input signal small.
• This small signal increases current in one
transistor and decreases proportional current in
the other transistor by an amount ΔI.
• So current becomes I/2 + ΔI and I/2 - ΔI
• A voltage signal – ΔI RD and + ΔI RD develops at the
other transistor.
• The output voltage taken between the two drains
will be 2 ΔI RD which is proportional to differential
input signal vid.

• Large –signal operation!



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Mansoor Shaukat

Reminder!

He who asks a question


is a fool for five minutes; he
who does not ask a question
remains a fool forever.
(Chinese proverb)
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Mansoor Shaukat

MOS : Large Signal Operation and


Handling Non-Linearity


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The MOS Differential Pair : Large Signal Operation
• We now determine the transfer characteristics i D1, iD2 vs vid which is = vG1 – vG2 :

• The drain currents can be described as:


Mansoor Shaukat
VDD
iD1
1
 k n
2
W 

  VGS 1  Vt  2

L
And: RD RD
iD 2
1
 k n
2
W 

  VGS 2  Vt 
2

L
• Taking square root:

iD1 
1
2
k n
W 

  VGS 1  Vt  Q1 Q2
L iD1 iD2
vG1 + +
And: - - vG2
1 W 
iD 2  k n   V GS 2  Vt  I
2 L

-V SS
Subtracting:

iD1  iD 2 
1
2
k n
W 

  VGS 1  VGS 2  where V  VGS 2   Vid
L GS 1

• So:
1 W 
iD1  iD 2  k n   Vid
2 L

• Large Signal Operation…contd!



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The MOS Differential Pair : Large Signal Operation…contd
• We have: 1 W 
iD1  iD 2  k n   Vid VDD
2 L
• The constraint equation is:
Mansoor Shaukat
RD RD
iD1  iD 2  I
• Finally: Squaring 1st equation and
substituting either value from 2nd equation,
2
 vid 
 2  Q1 Q2
I W   v   
iD1   k n   I  id  1 iD1 iD2
2 L  2    + +
  vG1 vG2
 I  - -
  W 
 k n    I
• And:   L 
2
-V SS
 vid 
 2 
I W   v   
iD 2   k n   I  id  1
2 L  2   
 
 I 
  W 
 k n   
  L 

I
• At the bias point vid = 0 so: iD1  iD 2  And: vGS 1  vGS 2  vGS
2
• …contd.


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The MOS Differential Pair : Large Signal Operation…contd

• …to arrive at the result


2
 Vid 
Mansoor Shaukat
I  I  Vid   
iD1      1   2 
2  Vov  2   Vov 
 
 

2
 Vid 
 
I  I  Vid 
iD 2      1  2 
2  Vov  2   Vov 
 
 

• The plots!

ELECTRONICS II 
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Mansoor Shaukat The Plots

• …contd
Copyright  2004 by Oxford University Press, Inc.


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Mansoor Shaukat The Plots

• End of presentation
Copyright  2004 by Oxford University Press, Inc.


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Believe in yourself; who else is


better qualified.
(Anonymous)
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Mansoor Shaukat

The BJT Differential Pair


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The BJT Differential Pair : Basic Operation


Mansoor Shaukat
The circuit: VCC

RC RC

• The two transistors are matched vC 1 vC 2


and the collector circuits are such
that they never enter saturation Q1 Q2

vB1 + +
_ _ vB 2

- VEE

• Case 1


The BJT Differential Pair… case 1 24

• Case 1: When two bases are joined together & connected to a common voltage
VB1 = VB2 = VCM (called the common-mode
voltage)
Mansoor Shaukat
VCC
• Since the transistors are matched, so it
follows from symmetry that bias current I
will divide equally between the two devices RC αI/2 αI/2 RC

• vC 1 vC 2
Thus iE1 = iE2 = I/2
• And vE1 = vE2 = vCM - vBE = vCM - 0.7 Q1 Q2
• The voltage at each collector will be:
vCM +
vC1 = vC2 = VCC – ½ α IRC _

• Varying the value of vCM does not change


collector voltages I
• Conclusion:
– Differential-pair rejects common-mode input
- VEE
voltages.

• Case 2


The BJT Differential Pair… case 2 25

• Case 2: When a large signal is applied as shown.


• Let V1 = 1 V
VCC
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RC αI RC
VC1 VC2
v1 Q1 Q2

- VEE
• With vE1 at 0.3 V, EBJ of Q2 is reverse biased so Q1 is on but Q2 is off.
• Entire bias current I flows through Q1 hence iC1 = αI
• VC2 = VCC and VC1 = VCC – αIRC
• Case 3!


The BJT Differential Pair… case 3 26

• Case 3: Let V1 = - 1 V
VCC
Mansoor Shaukat
RC αI RC
VC1 VC2
v1 Q1 Q2

- VEE

• With vE2 at - 0.7 V, EBJ of Q2 is forward biased so Q2 is on but Q1 is off.


• Entire bias current I flows through Q2 hence iC2 = αI
• VC1 = VCC and VC2 = VCC – αIRC
• Case 4!


The BJT Differential Pair… case 4 27

• Case 4: Response of differential-pair to small signals (difference mode on


differential signals)
VCC
Mansoor Shaukat
RC αI/2 RC

vC 1 = (VCC – ½ α IRC) - α Δ IRC vC 2 = (VCC – ½ α IRC) + α Δ IRC

vi Q1 Q2

I/2 + ΔI I/2 - ΔI

• With relatively small difference voltages, the entire bias current is steered from
one side of the pair to the other


ΔI is proportional to differential input signals vi
• Differential pair as a linear amplifier is used on application of small differential signal


The BJT Differential Pair : Example 28

• Find all node voltages? (Make suitable assumptions)

5V


Mansoor Shaukat
Solution:
– For Q1 to conduct vE1 = 0.5 + 0.7 = 1.2 V
I
1 kΩ
– For Q2 to conduct vE2 = 0.0 + 0.7 = 0.7 V
– So when vE2 reaches 0.7 V, Q2 comes on
and holds the voltage at 0.7 V thus
0.5 V Q1 Q2
preventing Q1 from being switched on.
vC 1 vC 2
• With Q2 on vE1 = vE2 = vE = + 0.7 V
• 1 kΩ 1 kΩ
So I = 4.3 mA
• vC1 = - 5 V
-5V
• vC2 = - 0.7 V

• QED


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Mansoor Shaukat

I never make the mistake of arguing


with people for whose opinions I have
no respect.

(G D Langlands)


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Mansoor Shaukat

Multistage Amplifiers


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Multistage Amplifiers
• Practical transistor amplifier consists of number of stages
connected in cascade.
Mansoor Shaukat
• First stage, in addition to providing gain, also provides high input
resistance when an amplifier is fed from a high resistance source.
– In differential amplifiers, the input stage must also provide large
common mode rejection.
• The function of middle stages is to provide the bulk of voltage gain.
In addition, functions such as:-
– Conversion of differential to single-ended if required.
– Shifting of dc level in order to allow signal swing both positive and
negative.
• The last or output stage is to provide low output resistance in order
to avoid loss of gain when low valued load is connected to the
amplifier.
• Current capacity
• Power efficiency


A 4-stage Bipolar Op Amp 32

• The circuit consists of four stages.


• The input stage is differential in differential out.
Mansoor Shaukat
• The second stage is differential in but its output is taken single-
endedly.
• The third stage is the dc level shifter.
• The output stage of the op-amp consists of emitter follower.

• Note : Emitter-follower because the signal voltage at the emitter follows that at the base.


Multistage Amplifiers
+ 15 V

2.3 k
Mansoor Shaukat
20 k 20 k
3k VE7 = 12.7 V
Vc5 = 12 V
VC1 = 10 V VB5 = 10 V Q7

Q4 Q5 IE7 = 1 mA

Q1 Q2
vid Q8
VE5 = 9.3 V VB8 = 0.7 V
VE1 = -0.7 V
Vo
IC5 = 1 mA
28.6 k VE8 = 0 V
IE1 = 0.25 mA
15.7 k 3k
IC3 = 0.5 mA IE8 = 5 mA
VC9 = - 14.3 V Q6
Q3
Q9 X4
IC9 = 0.5 mA
VB9 = - 14.3 V
IC6= 4X0.5 mA = 2 mA
- 15 V

(……the dc analysis)
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Mansoor Shaukat

Voltage gain of a Multistage Amplifier


Multistage Amplifiers
Ri3
Mansoor Shaukat

2.3 k
20 k 20 k
3k

Q7

Q4
Q1 Q2 Q5 ic7
vid

Vo

15.7 k 3k

Rid

Ri2 Ri4
(Determining voltage gain)
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Mansoor Shaukat

Voltage gain of a Multistage Amplifier


Using Current Gains Method


Mansoor Shaukat Multistage Amplifiers

2.3 k
20 k 20 k
ib5 3 k ib7

Q7
ii ic2 ic5
Q4
ic1 Q5 ic7
Q1 Q2 ib5
vid Q8
ie8
ib8
ii Vo
15.7 k 3k

(Determining voltage gain using current gains method)


Mansoor Shaukat

A smooth sea never made a


skilled sailor.
(English Proverb)

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