ALGORITHMS FOR VLSI DESIGN & AUTOMATION

(18EC3062)
Professional Elective-3
III/IV year Odd semester
AY:2020-21
Department of Electronics & Communication
 SESSION-1

COURSE TEAM:-

Mr. SANATH KUMAR TULASI

Mrs. MARIYA PRIYADHARSHINI
Mr. BOTTULA MURALI KRISHNA

Sravan Kumar Saradhi 2

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 Course Evaluation Plan

Sravan Kumar Saradhi 3

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 Why we Need to Study AVLSIDA
 A modern VLSI chip has a zillion parts -- logic, control, memory, interconnect, etc. ...
 A sequence of computer aided design (CAD) tools takes an abstract description of the chip, and
refines it step-wise to a final design.

Why CAD is So Important in VLSI Design ?

 E-CAD allows for the easier development of products and product management integration.

 It also allows for greater modeling and even provides a basis for virtual networking, In the
engineering world.

 CAD is extremely important and widely used to design and develop products to be used by
consumers

Sravan Kumar Saradhi 4

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 CO-1
 Introduction to VLSI Design & Algorithms: Complexity Issues and NP-
hardness, Basic Algorithms, Basic Data Structures, Graph Algorithms for
Physical design.

 Partitioning: Classification of Partitioning Algorithms, Group Migration

Algorithms, Simulated Annealing and Evolution, Other Partitioning Algorithms.

 Computational complexity, Design automation tools.

5
K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 Gajski -Y Chart

Structural Behavior

Processors, memories Sequential programs

Registers, FUs, MUXs Register transfers

Gates, flip-flops Logic equations/FSM

Transistors Transfer functions

Cell Layout

Modules

Chips

Boards

Physical

Sravan Kumar Saradhi 6

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 Gajski -Y Chart

Spiral design model Waterfall design model

Structural Behavioral
Behavioral

Structural

Physical Physical

Sravan Kumar Saradhi 7

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 Structural Behavior

Processors, memories Sequential programs

1 IC 1 hour
Registers, FUs, MUXs Register transfers 10 FPGA 1 day

Gates, flip-flops Logic equations/FSM 100 4 days

hardware emulation
Transistors Transfer functions 1000 throughput model 1.4 months

10000 instruction-set simulation 1.2 years

Cell Layout
100,000 cycle-accurate simulation 12 years
Modules
1,000,000 register-transfer-level HDL simulation >1 lifetime
Chips
10,000,000 gate-level HDL simulation 1
Boards millennium

Physical

Sravan Kumar Saradhi 8

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION
 Algorithmic Graph theory

Sravan Kumar Saradhi 9

K L UNIVERSITY DEPARTMENT OF ELECTRONICS & COMMUNICATION