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Model Name:Bbr20 La-1512: Brookdale MCH
Model Name:Bbr20 La-1512: Brookdale MCH
Pentium4/Northwood ICS950805
MODEL NAME :BBR20 LA-1512 mPGA478 CPU PAGE 11
PSB
ATI Brookdale DDR DIMM*2
M6P MCH POWER
AGP BUS MEMORY BUS
16MB DDR SDRAM Host-AGP Bridge INTERFACE
PAGE 7,8 PAGE 35
PIRQA# PAGE 14,15,16,17 DRAM controller
Hub interface PAGE 4,5,6
Direct CD HUB Link
Play
PAGE 24
PCI BUS
IDSEL: AD26 IDSEL: AD16 IDSEL: AD27
INTERNAL IDE MASTER 2 MASTER 3 MASTER 0
IDE/CD PIRQC# PIRQA#, PIRQB# PIRQA#,
SIRQ PIRQD#
/FDD
PAGE 25
ICH2 1394 Controller CARDBUS LAN Controller Mini PCI
FUNC 0: LAN, HUB-TO-PCI , TAB43AB22 OZ6933 INTEL PHY Connector
PCI-TO-LPC BRIDGE
FUNC 1: IDE Controller PAGE 19 PAGE 20 PAGE 22 PAGE 23
FUNC 2: USB Controller #1
FUNC 3: SM BUS Controller
FUNC 4: USB Controller #2 AC LINK
FUNC 5: AC97 Audio Controller
FUNC 5: AC97 Modem Controller
PAGE 10,11,12
MDC PCMCIA
Connector SOCKET
LPC
LPC
PAGE 25 PAGE 20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 1 of 44
A B C D E
+5VS
CPU_VCC
1
1 2 CPURST# HA#[3..31] HD#[0..63]
4 HA#[3..31] U23A HD#[0..63] 4
R274 51_1% R38
1
HA#3 K2 B21 HD #0
HA#4 A3# D0# HD #1 C71 200
K4 B22
1 2 FER R# HA#5 L6
A4# Northwood D1#
A23 HD #2 . 1UF
2
R91 56 HA#6 A5# D2# HD #3
K1 A6# D3# A25
HA#7 L3 C21 HD #4 1617VCC
A7# D4#
1 2 CP U_PW RGD HA#8 M6 A8# D5# D22 HD #5
R280 300_1% HA#9 HD #6 U5
L2 A9# D6# B24
1
1 2 BREQ0# HA#10 M3 C23 HD #7 C104 1 16
R290 51_1% HA#11 A10# D7# HD #8 NC NC
4 M4 A11# D8# C24 2 VCC STBY 15 4
HA#12 N1 B25 HD #9 2200PF THERMDA 3 14 EC_SMC2 24,31
2
HA#13 A12# D9# H D#10 THERMDC DXP SMBCLK
M1 A13# D10# G22 4 DXN NC 13
HA#14 N2 H21 H D#11 5 12
A14# D11# NC SMBDATA EC_SMD2 24,31
HA#15 N4 C26 H D#12 1 2 6 11 ATF#
A15# D12# +5VS ADD1 ALERT
RP5 HA#16 N5 D23 H D#13 R67 1K 7 10
A16# D13# GND ADD0
1
1 8 ITP_TMS HA#17 T1 J21 H D#14 8 9
ITP_TRST# HA#18 A17# D14# H D#15 GND NC R39
2 7 R2 A18# D15# D25
3 6 ITP_TCK HA#19 P3 H22 H D#16 MAX1617/MAX6654 1K
ITP_TDI HA#20 A19# D16# H D#17
4 5 P4 A20# D17# E24
HA#21 R3 G23 H D#18
2
8P4R-1K HA#22 A21# D18# H D#19
T2 A22# D19# F23
HA#23 U1 F24 H D#20
HA#24 A23# D20# H D#21 +5VS
P6 A24# D21# E25
HA#25 U3 F26 H D#22
HA#26 A25# D22# H D#23
T4 A26# D23# D26
HA#27 V2 ADDR GROUP DATA GROUP L21 H D#24
HA#28 A27# D24# H D#25
R6 A28# D25# G26
HA#29 W1 H24 H D#26
HA#30 A29# D26# H D#27
T5 A30# D27# M21
HA#31 U4 L22 H D#28
A31# D28# CPU_VCC
V3 J24 H D#29
A32# D29#
8
7
6
5
W2 K23 H D#30 +3VS
A33# D30# H D#31 RP7
Y1 A34# D31# H25
H D#32 SB_A20M# A20M# C96
AB1 A35# D32# M23 1 2 @8P4R_1K
N22 H D#33 R95 1 2
D33# H D#34 0 U7
4 HREQ#0 J1 P21
1
2
3
4
REQ0# D34# H D#35 S B_IGNNE# 1 IGNN E# @.1UF
4 HREQ#1 K5 REQ1# D35# M24 2 2 IOA VCC 16
J4 N23 H D#36 R97 SB_A20M# 3
4 HREQ#2 REQ2# D36# 10 SB_A20M# IOA
3 J3 M26 H D#37 0 4 A20M# 3
CPU_VCC 4 HREQ#3 REQ3# D37# YA
H3 N26 H D#38 S B_INTR 1 2 INTR 5
4 HREQ#4 REQ4# D38# IOB
N25 H D#39 R66 S B_IGNNE# 6
BPM0# D39# H D#40 0 10 SB_IGNNE# IOB IGNN E#
1 2 4 ADSTB0# L5 ADSTB0# D40# R21 YB 7
R250 51_1% R5 P24 H D#41 SB_NMI 1 2 NMI 11
4 ADSTB1# ADSTB1# D41# I1C
1 2 BPM1# R25 H D#42 R65 S B_INTR 10
D42# 10 SB_INTR I1C
R251 51_1% R24 H D#43 0 9 INTR
BPM2# D43# H D#44 YC
1 2 4 ADS# G1 ADS# D44# T26 14 I1D
R262 51_1% AC1 T25 H D#45 SB_NMI 13
AP0# D45# 10 SB_NMI I1D
1 2 BPM3# V5 T22 H D#46 12 NMI
AP1# D46# YD
1
1
1
1
R253 51_1% AA3 T23 H D#47
BPM4# BINIT# D47# H D#48 R92 R93
1 2 4 BNR# G2 BNR# D48# U26 4 CPURST# 1 2 1 S GND 8
R254 51_1% AC3 U24 H D#49 15 1 2
IERR# D49# E#
2
1 2 BPM5# J26 U23 H D#50 @0 @0 R497
R263 51_1% DP0# D50# H D#51 @1K C604 R61 @1K
K25 V25 @QS3257
2
2
2
2
DP1# D51# H D#52 R96 R94 @0.22UF
K26 U21
1
DP2# D52# H D#53 @0 @0
L25 DP3# D53# V22
BREQ0# H6 V24 H D#54
4 BREQ0# BREQ0# D54#
D2 CONTROL GROUP W26 H D#55 A20M# 5 4
4 BPRI# BPRI# D55#
G4 Y26 H D#56 IGNN E# 6 3
4 HLOCK# LOCK# D56#
F3 W25 H D#57 INTR 7 2
4 HIT# HIT# D57#
E3 Y23 H D#58 NMI 8 1
4 HITM# HITM# D58# CPU_VCC
E2 Y24 H D#59
4 DEFER# DEFER# D59# H D#60 RP6
4 D R D Y# H2 DRDY# D60# Y21
V6 AA25 H D#61 @8P4R_330
CPURST# AB25 MCERR# D61# H D#62
4 CPURST# RESET# D62# AA22
J6 AA24 H D#63
4 H T RDY# TRDY# D63#
4 RS#0 F1 RS0# SW1 RATIO SELECT
4 RS#1 G5 RS1# DBI0# E21 DBI0# 4
2 2
4 RS#2 F4 RS2# DBI1# G25 DBI1# 4 RATIO NMI A 20M# IGNNE# INTR
AB2 RSP# DBI2# P26 DBI2# 4
DBI3# V21 DBI3# 4 15X H L L L
BPM0# AC6
BPM1# BPM0#
AB5 BPM1# DSTBN0# E22 DSTBN0# 4 16X L H H H
BPM2# AC4 K22
BPM2# DSTBN1# DSTBN1# 4
BPM3# Y6 R22 17X L H H L
BPM3# DSTBN2# DSTBN2# 4
BPM4# AA5 W22
BPM4# DSTBN3# DSTBN3# 4
BPM5# AB4 F21 18X L H L H
BPM5# DSTBP0# DSTBP0# 4
DSTBP1# J23 DSTBP1# 4
AF26 SKTOCC# DSTBP2# P23 DSTBP2# 4 19X L H L L
TD0 D5 W23
TDO DSTBP3# DSTBP3# 4
ITP_TDI C1 MISC 20X L L H H
ITP_TMS TDI
F7 TMS BCLK0 AF22 HCLK_CPU 13
ITP_TRST# E6 AF23 21X L L H L
TRST# BCLK1 HCLK_CPU# 13
ITP_TCK D4 HOST CLK
TCK
CPU_VCC 1 2 C3 PROCHOT# ITPCLK0 AC26 22X L L L H
R82 @62_1% AD26 +3V
BSEL0 ITPCLK1
13 BSEL0 AD6 BSEL0 23X H H H L
BSEL1 AD5
13 BSEL1 BSEL1
2
H5 C6 A20M# 24X L L L L
4 D BSY# DBSY# A20M#
DB R# AE25 B6 FER R#
DBR# FERR# FERR# 10
B2 IGNN E# R144
CP U_PW RGD AB23 IGNNE# INTR 1K
10 CPU_PW RGD PWRGOOD INTR/LINT0 D1
CPUSLP# AB26 LEGACY CPU E5 NMI
10 CPUSLP# THERTRIP# 31
1
SLP# NMI/LINT1
THERMDA B3 W5 1 2
THERMDA INIT# CPUINIT# 10 VR_ON 31,41
THERMDC C4 THERMAL DIODE Y4 R145
THERMDC STPCLK# STPCLK# 10
1
THERMTRIP# A2 B5 C @0
1 THERMTRIP# SMI# SMI# 10 1
1 2 2 Q8
mPGA478 CPU_VCC R142 56 B 2SC2411K
E
3
SELPSB[1:0] STSEM BUS FREQUENCY
1 2 THERMTRIP#
00 100MHZ CPU_VCC R98 56 Compal Electronics, Inc.
01 RESERVED Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
10 RESERVED
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
11 RESERVED DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 2 of 44
A B C D E
A B C D E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
VC CA USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CPU_VCC 1 2
L6
4.7UH_0805
1
C368 C365 U23B CPU_VCC
+ + 150U_D D10
C28 1 UF VSS U23C
AD20 A11
2
150U_D VSSA VCCA PLL ANALOG VOLTAGE VSS
AD22 VSSA VSS A13 CPU_VCC AF9 VCC VSS D6
1
A15 C70 C66 C73 C77 C84 C87 C97 C106 C103 C41 B11 D8
VC CIOPLL VSS VCC VSS
1 2 AE23 VCCIOPLL VSS A17 B13 VCC VSS E1
L7 A5 A19 . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF B15 E11
2
4.7UH_0805 VCCSENSE VSS VCC VSS
4 A4 VSSSENSE VSS A21 B17 VCC VSS E13 4
VSS A24 B19 VCC VSS E15
A26 CPU_VCC B7 E17
VSS VCC VSS
A10 VCC VSS A3 B9 VCC VSS E19
A12 A9 C10 E23
A14
VCC
VCC
Northwood VSS
VSS AA1 C12
VCC
VCC
VSS
VSS E26
1
A16 AA11 C107 C98 C88 C85 C78 C74 C67 C14 E4
VCC VSS VCC VSS
A18 VCC VSS AA13 C16 VCC VSS E7
A20 AA15 1 UF 1 UF 1 UF 1 UF 1 UF 1 UF 1 UF C18 E9
Northwood
2
VCC VSS VCC VSS
A8 VCC VSS AA17 C20 VCC VSS F10
AA10 VCC VSS AA19 C8 VCC VSS F12
AA12 VCC VSS AA23 D11 VCC VSS F14
AA14 VCC VSS AA26 D13 VCC VSS F16
AA16 VCC VSS AA4 D15 VCC VSS F18
AA18 VCC VSS AA7 D17 VCC VSS F2
AA8 VCC VSS AA9 D19 VCC VSS F22
AB11 VCC VSS AB10 D7 VCC VSS F25
AB13 VCC VSS AB12 D9 VCC VSS F5
AB15 POW ER, AB14 E10 F8
VCC G ROUND, VSS CPU_VCC VCC POW ER, GROUND AND NC VSS
CPU_VCC AB17 VCC VSS AB16 E12 VCC VSS G21
AB19 RESERVED AB18 E14 G24
VCC VSS VCC VSS
AB7 SIGNALS AB20 E16 G3
VCC VSS VCC VSS
1
AB9 AB21 C35 C34 C33 E18 G6
VCC VSS VCC VSS
AC10 VCC VSS AB24 E20 VCC VSS H1
AC12 AB3 10UF_1206 10UF_1206 10UF_1206 E8 H23
2
VCC VSS VCC VSS
AC14 VCC VSS AB6 F11 VCC VSS H26
AC16 VCC VSS AB8 F13 VCC VSS H4
AC18 AC11 CPU_VCC F15 J2
VCC VSS VCC VSS
AC8 VCC VSS AC13 F17 VCC VSS J22
3 AD11 AC15 F19 J25 3
VCC VSS VCC VSS
1
AD13 AC17 C32 C31 C30 C29 C366 C370 C371 F9 J5
VCC VSS VCC VSS
AD15 VCC VSS AC19 VSS K21
AD17 AC2 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 K24
2
VCC VSS VSS
AD19 VCC VSS AC22 VSS K3
RP25 AD7 AC25 CPU_ VID0 AE5 K6
TESTHI0 VCC VSS CPU_VCC CPU_ VID1 VID0 VSS
1 10 CPU_VCC AD9 VCC VSS AC5 AE4 VID1 VSS L1
TESTHI1 2 9 TESTHI7 AE10 AC7 CPU_ VID2 AE3 L23
TESTHI2 TESTHI6 VCC VSS CPU_ VID3 VID2 VSS
3 8 AE12 VCC VSS AC9 AE2 VID3 VSS L26
1
TESTHI3 4 7 TESTHI5 AE14 AD1 C372 C373 C374 C367 C442 C443 C444 CPU_ VID4 AE1 L4
TESTHI4 VCC VSS VID4 VSS
CPU_VCC 5 6 AE16 VCC VSS AD10 VSS M2
AE18 AD12 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 M22
2
10P8R-4.7K VCC VSS C PUVID VSS
AE20 VCC VSS AD14 41 C PUVID AF4 VCCVID VSS M25
AE6 VCC VSS AD16 VSS M5
1
RP4 AE8 AD18 CPU_VCC C40 N21
TESTHI8 VCC VSS VSS
1 10 CPU_VCC AF11 VCC VSS AD21 Y5 VSS VSS N24
TESTHI9 2 9 AF13 AD23 1 UF Y25 N3
2
VCC VSS VSS VSS
1
TESTHI10 3 8 AF15 AD4 C445 C369 C413 C446 C447 C448 C449 Y22 N6
TESTHI11 VCC VSS VSS VSS
4 7 AF17 VCC VSS AD8 Y2 VSS VSS P2
5 6 TESTHI12 AF19 AE11 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 W6 P22
2
CPU_VCC VCC VSS VSS VSS
AF2 VCC VSS AE13 W3 VSS VSS P25
10P8R-4.7K AF21 AE15 W24 P5
VCC VSS CPU_VCC VSS VSS
AF5 VCC VSS AE17 W21 VSS VSS R1
AF7 VCC VSS AE19 V4 VSS VSS R23
VSS AE22 V26 VSS VSS R26
1
AE24 C450 C451 C452 C423 C148 C147 C146 V23 R4
CPU_VCC VSS VSS VSS
VSS AE26 V1 VSS VSS T21
AE7 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 10UF_1206 U5 T24
2
2
VSS VSS VSS
VSS AE9 U25 VSS VSS T3
2
2 2
VSS AF1 U22 VSS VSS T6
R291 AF10 CPU_VCC U2
TESTHI0 VSS VSS
49.9_1% AD24 TESTHI0 VSS AF12
TESTHI1 AA2 AF14
TESTHI1 VSS
1
1
TESTHI2 AC21 AF16 C145 C135 C130 C118 C428 C418 C410
1
2
TESTHI4 VSS
2
C13 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V CPU_ VID23 6
R62 VSS CPU_ VID34
VSS C15 5
@49.9_1% C17
COMP0 VSS CPU_VCC 8P4R-1K
L24 COMP0 VSS C19
COMP1 P1 C2 CPU_ VID42 1
1
C25 R17
VSS
2
R294 R59 C5 1K
VSS
1
1 C76 C72 C65 51.1_1% 51.1_1% A22 C7 + C163 + C166 + C160 + C18 + C105 + C468
1
R60 RSVD VSS 470U_E 470U_E
A7 RSVD VSS C9 470U_E 470U_E 470U_E 330U_E
@100_1% @1UF @220PF
@220PF AD2 D12 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V
2
RSVD VSS
AD3 D14
1
RSVD VSS
AE21 RSVD VSS D16
C PUVID 2 1 AF3 D18
AF24
RSVD VSS
D20
Compal Electronics, Inc.
R492 RSVD VSS
AF25 RSVD VSS D21
@0 D24 Title
VSS
VSS D3 SCHEMATIC, M/B LA-1512
mPGA478 Size Document Number R ev
B 401225 1B
MC-1/3(GTL+,AGP,HUB)
HD#[0..63] H A#[3..31]
2 HD#[0..63] HA#[3..31] 2 GAD[0..31]
14 GAD[0..31]
U22A U22C
AGP
HD#30 AF8 GAD30 AC22 AE29
HD#31 HD#30 HREQ#0 GAD31 G_AD30 GND
AH5 HD#31 HREQ#0 U6 AD24 G_AD31
HD#32 AC11 T7 HREQ#1 HR EQ#[0..4]
HD#33 HD#32 HREQ#1 HREQ#2 HREQ#[0..4] 2
AC12 HD#33 HREQ#2 R7 14 GC/BE#0 V25 G_C/BE#0
HD#34 AE9 U5 HREQ#3 V23
HD#34 HREQ#3 14 GC/BE#1 G_C/BE#1
HD#35 AC9 U2 HREQ#4 Y25 P25 HL0
HD#36 HD#35 HREQ#4 14 GC/BE#2 G_C/BE#2 HI0 HL1
AE10 HD#36 14 GC/BE#3 AA23 G_C/BE#3 HI1 P24
HD#37 AD9 W2 RS#0 RS#[0..2] N27 HL2
2 HD#38 HD#37 RS#0 RS#1 RS#[0..2] 2 GFRAME# HI2 HL3 2
AG9 HD#38 RS#1 W7 14 GFRAME# Y24 G_FRAME# HI3 P23
HD#39 AC10 W6 RS#2 GDEVSEL# W28 M26 HL4
HD#40 HD#39 RS#2 14 GDEVSEL# G IRDY# G_DEVSEL# HI4 HL5
AE12 HD#40 14 G IRDY# W27 G_IRDY# HI5 M25
HD#41 AF10 R5 GTRDY# W24 L28 HL6
HD#42 AG11
HD#41
HD#42
ADSTB0#
ADSTB1# N6
ADSTB0# 2
ADSTB1# 2
14 GTRDY#
14 GSTOP#
GSTOP# W23
G_TRDY#
G_STOP#
HUB HI6
HI7 L27 HL7
HD#43 AG10 GPAR W25 M27 HL8
HD#43 14 GPAR G_PAR HI8
HD#44 AH11 K8 GREQ# AG24 N28 HL9
HD#44 BCLK# CLK_HMCH# 13 14 GREQ# G_REQ# HI9
HD#45 AG12 J8 GGNT# AH25 M24 HL10
HD#46 HD#45 BCLK CLK_HMCH 13 14 GGNT# PIPE# G_GNT# HI10 HUBREF
AE13 AF22 P26 HUBREF 10
HD#47 HD#46 PIPE# HIREF HL_STB
AF12 AE17 CPURST# 2 N25 HL_STB 10
HD#48 HD#47 CPURST# AD_STB0 HISTB HL_STB#
AG13 W5 HLOCK# 2 14 AD_STB0 R24 N24 HL_STB# 10
HD#49 HD#48 HLOCK# AD_STB0# AD_STB0 HISTB# +GMCH_HLCOMP
AH13 Y4 DEFER# 2 14 AD_STB0# R23 P27 1 2 +1_8VS
HD#50 HD#49 DEFER# AD_STB1 AD_STB#0 HLRCOMP R304
AC14 V3 ADS# 2 14 AD_STB1 AC27
HD#51 HD#50 ADS# AD_STB1# AD_STB1 40.2_1%
AF14 W3 BNR# 2 14 AD_STB1# AC28
HD#52 HD#51 BNR# SBSTB AD_STB#1
AG14 Y7 BPRI# 2 14 SBSTB AF27
HD#53 HD#52 BPRI# SBSTB# SB_STB SBA0
AE14 V5 DBSY# 2 14 SBSTB# AF26 AH28
HD#54 HD#53 DBSY# SB_STB# SBA0 SBA1 SBA[0..7]
AG15 V4 D R DY# 2 AH27 SBA[0..7] 14
HD#55 HD#54 DRDY# SBA1 SBA2
AG16 Y5 HIT# 2 AG28
HD#56 HD#55 HIT# RBF# SBA2 SBA3 HL[0..10]
AG17 Y3 HITM# 2 14 RBF# AE22 AG27 HL[0..10] 10
HD#57 HD#56 HITM# WBF# RBF# SBA3 SBA4
AH15 U7 HTRDY# 2 AE23 AE28
HD#58 HD#57 HTRDY# WBF# SBA4 SBA5
AC17 V7 BREQ0# 2 AE27
HD#59 HD#58 BR0# AGPREF SBA5 SBA6
AF16 14 AGPREF AA21 AE24
HD#60 HD#59 AGPREF SBA6
AE15 1 2 GRCOMPAD25 AE25 SBA7
HD#61 HD#60 RCOMP0 R270 1 GRCOMP SBA7
AH17 AC2 2 22 R273 40.2_1% AD26
HD#62 HD#61 RCOMP0 RCOMP1 R20 1 NC ST0
AD17 AC13 2 22 AD27 AG25 ST0 14
HD#63 HD#62 RCOMP1 NC ST0 ST1
AE16 AA7 SWNG AF24 ST1 14
HD#63 SWNG0 CLK_66M_MCH ST1 ST2
AD13 13 CLK_66M_MCH P22 AG26 ST2 14
SWNG1 66IN ST2
J27 1 2 PCIRST# 10,14,19,20,21,23,25,27,31,34
RSTIN# R315
2 DSTBN0# AD4
DSTBN0# 0 +1_5VS
2 DSTBN1# AE6
DSTBN1#
AE11
2 DSTBN2# DSTBN2# GTRDY# 2
AC15 1
3 2 DSTBN3# DSTBN3# R289 6.8K 3
AD3 M7 MCH_GTLREF
2 DSTBP0# DSTBP0# HVREF G IRDY# 2
AE7 R8 1
2 DSTBP1# DSTBP1# HVREF R281 6.8K
AD11 Y8
2 DSTBP2# DSTBP2# HVREF +1_5VS GDEVSEL#2
AC16 AB11 1
2 DSTBP3# DSTBP3# HVREF ST0 R279 6.8K
AD5 AB17 2 1
2 DBI0# DBI0# HVREF BROOKDALE R523 2K GSTOP# 2
AG4 1
2 DBI1# DBI1# CLK_66M_MCH ST1 R292 6.8K
AH9 2 1
DBI2#
1
1
2 DBI3# GPAR 2 1 R278 6.8K
R57 R285 100K GREQ# 2 1
1K R347 AD_STB0# 2 1 R269 6.8K
10 R299 6.8K GGNT# 2 1
2
1 2
AGPREF R277 6.8K SBSTB 2 1
C473 SBSTB# 2 1 R272 @6.8K
+1_8VS R275 6.8K RBF# 2 1
1
2
PIPE# 2 1
R58 R21 6.8K
1K C83 WBF# 2 1
1
0.1UF R73 R23 6.8K
2
2
AD_STB0 2 1
150_1% C117 R297 @6.8K
CPU_VCC AD_STB1 2 1
1
0.01UF R276 @6.8K
2
CPU_VCC HUBREF SBSTB 2 1
R271 @6.8K
1
1
R69 ST1 2 1
1
2
C116 C109 C110 R24 @10K
R63 R18
49.9_1% 300_1% 0.1UF 0.1UF 0.1UF 150_1%
1
C43
2
4 0.01UF 2 4
2
SWNG
MCH_GTLREF
1
R56
100_1% C81 C82 R19
150_1%
.1UF .1UF Compal Electronics, Inc.
2
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 4 of 44
A B C D E
A B C D E
MCH-2/3(SDRAM)
U22B
1 DDR_SMA[0..12] DD R_SDQ[0..63] 1
7 DDR_SMA[0..12] DDR_SMA0 DDR_SDQ0 DDR_SDQ[0..63] 7
E12 G28
DDR_SMA1 SMAA0 SMD0 DDR_SDQ1
F17 F27
DDR_SMA2 SMAA1 SMD1 DDR_SDQ2
E16 C28
DDR_SMA3 SMAA2 SMD2 DDR_SDQ3
G18 E28
DDR_SMA4 SMAA3 SMD3 DDR_SDQ4
G19 H25
DDR_SMA5 SMAA4 SMD4 DDR_SDQ5
E18 G27
DDR_SMA6 SMAA5 SMD5 DDR_SDQ6
F19 F25
DDR_SMA7 SMAA6 SMD6 DDR_SDQ7
G21 B28
DDR_SMA8 SMAA7 SMD7 DDR_SDQ8 +2.5V
G20 E27
DDR_SMA9 SMAA8 SMD8 DDR_SDQ9
F21 C27
DDR_SMA10 SMAA9 SMD9 DDR_SDQ10
F13 SMAA10 SMD10 B25
DDR_SMA11 E20 C25 DDR_SDQ11
DDR_SMA12 SMAA11 SMD11 DDR_SDQ12
G22 SMAA12 SMD12 B27
D27 DDR_SDQ13
DDR_SBS0 SMD13 DDR_SDQ14
7 DDR_SBS0 G12 SBS0 SMD14 D26
DDR_SBS1 G13 E25 DDR_SDQ15
7 DDR_SBS1 SBS1 SMD15 DDR_SDQ16 VS
SMD16 D24
DDR-MEMORY
1
E14 E23 DDR_SDQ17 15mil
7 DDR_CLK0 SCK0 SMD17 DDR_SDQ18
F15 C22 R560
7 DDR_CLK0# SCK#0 SMD18
0.1UF_16V
J24 E21 DDR_SDQ19 100K_0.5%
7 DDR_CLK1 SCK1 SMD19 DDR_SDQ20
7 DDR_CLK1# G25 SCK#1 SMD20 C24
1
G6 B23 DDR_SDQ21
C731
2
7 DDR_CLK2 SCK2 SMD21 DDR_SDQ22
7 DDR_CLK2# G7 SCK#2 SMD22 D22
G15 B21 DDR_SDQ23
2
8 DDR_CLK3 SCK3 SMD23 DDR_SDQ24
8 DDR_CLK3# G14 SCK#3 SMD24 C21
E24 D20 DDR_SDQ25 SDREF
8 DDR_CLK4 SCK4 SMD25 DDR_SDQ26
8 DDR_CLK4# G24 SCK#4 SMD26 C19
8
H5 D18 DDR_SDQ27
8 DDR_CLK5 SCK5 SMD27
F5 C20 DDR_SDQ28 5
8 DDR_CLK5# SCK#5 SMD28 +
E19 DDR_SDQ29 7
DDR_SRAS# SMD29 DDR_SDQ30
7 DDR_SRAS# F11 SRAS# SMD30 C18 - 6
2 DDR_SCAS# DDR_SDQ31 2
7 DDR_SCAS# G8 SCAS# SMD31 E17
DDR_SWE# G11 E13 DDR_SDQ32 C735 LM358
4
7 DDR_SWE# SWE# SMD32 DDR_SDQ33
C12 U60B
DDR_CKE0 SMD33 DDR_SDQ34 10UF_1206_6.3V
7 DDR_CKE0 G23 SCKE0 SMD34 B11
1
DDR_CKE1 E22 C10 DDR_SDQ35
7 DDR_CKE1 DDR_CKE2 SCKE1 SMD35 DDR_SDQ36
H23 B13 R561 C732
8 DDR_CKE2 SCKE2 SMD36
DDR_CKE3 F23 C13 DDR_SDQ37 100K_0.5% 0.01UF
8 DDR_CKE3 SCKE3 SMD37
C11 DDR_SDQ38
SMD38 DDR_SDQ39
D10
2
DDR_SCS#0 SMD39 DDR_SDQ40
7 DDR_SCS#0 E9 E10
DDR_SCS#1 SCS#0 SMD40 DDR_SDQ41
7 DDR_SCS#1 F7 C9
DDR_SCS#2 SCS#1 SMD41 DDR_SDQ42
8 DDR_SCS#2 F9 D8
DDR_SCS#3 SCS#2 SMD42 DDR_SDQ43
8 DDR_SCS#3 E7 E8
SCS#3 SMD43 DDR_SDQ44
E11
DDR_SDQS0 SMD44 DDR_SDQ45
7 DDR_SDQS0 F26 B9
DDR_SDQS1 SDQS0 SMD45 DDR_SDQ46
7 DDR_SDQS1 C26 B7
DDR_SDQS2 SDQS1 SMD46 DDR_SDQ47
7 DDR_SDQS2 C23 C7
DDR_SDQS3 SDQS2 SMD47 DDR_SDQ48
7 DDR_SDQS3 B19 C6
DDR_SDQS4 SDQS3 SMD48 DDR_SDQ49 R562
7 DDR_SDQS4 D12 D6
SDQS4 SMD49
8
DDR_SDQS5 C8 D4 DDR_SDQ50 0
7 DDR_SDQS5 DDR_SDQS6 SDQS5 SMD50 DDR_SDQ51
7 DDR_SDQS6 C5 B3 + 3 2 1
DDR_SDQS7 SDQS6 SMD51 DDR_SDQ52
7 DDR_SDQS7 E3 E6 1
DDR_SDQS8 SDQS7 SMD52 DDR_SDQ53
7 DDR_SDQS8 E15 B5 - 2 2 1
SDQS8 SMD53 DDR_SDQ54
C4
DDR_CB0 SMD54 DDR_SDQ55 LM358 R563
C16 E5
4
DDR_CB1 SCB0 SMD55 DDR_SDQ56 U60A 0
D16 C3
DDR_CB2 SCB1 SMD56 DDR_SDQ57
B15 D3
DDR_CB3 SCB2 SMD57 DDR_SDQ58
C14 F4
DDR_CB4 SCB3 SMD58 DDR_SDQ59
B17 F3
DDR_CB5 SCB4 SMD59 DDR_SDQ60
C17 B2
DDR_CB6 SCB5 SMD60 DDR_SDQ61
C15 C2
DDR_CB7 SCB6 SMD61 DDR_SDQ62
D14 E2
3 DDR_CB[0..7] SCB7 SMD62 DDR_SDQ63 3
7 DDR_CB[0..7] G5
SMD63
RDCLK G3 12mil
RCVENIN# SRCOMP
Length H3 J28 1 2 +1.25VS
RCVENOUT# SRCOMP R524 30_0603_1%
must equal C630
1.0" J9
SDREF
2
C631 J21 1 2 1 2
SDREF SDREF
R525 0_0603
1
@10P_0402 0.1U_0402_X7R
15mil
BROOKDALE
1
0.1U_0402_X7R C722
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 5 of 44
A B C D E
A B C D E
MCH-3/3(Power)
VCCA0 1 2 +1_5VS
U22D L31 4.7UH_0805
R22 T13 VCCA0
+1_5VS VCC1_5 VCC1_5 VCCA1 C391 +
R29 VCC1_5 VCC1_5 T17
U22 VCC1_5
U26 U13 VSSA0 33U_D
VCC1_5 VSS VSSA1 VSSA0
W22 U17
VCC1_5 VSS
W29
1 VCC1_5 1
AA22 A3
VCC1_5 GND VCCA1 +1_8VS
AA26 A7 1 2 +1_5VS
VCC1_5 GND L26 4.7UH_0805
AB21 A11
VCC1_5 GND
AC29 A15
VCC1_5 GND C378 +
AD21 A19
VCC1_5 GND
AD23 A23
VCC1_5 GND 33U_D + C94 C120 C114 C113 C121 C115
AE26 A27
VCC1_5 GND VSSA1
AF23 D5
VCC1_5 GND 22UF_10V_1206 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
AG29 D9
VCC1_5 GND
AJ25 D13
VCC1_5 GND
N14 D17
VCC1_5 GND
N16 VCC1_5 GND D21
P13 VCC1_5 GND E1
P15 VCC1_5 GND E4
P17 VCC1_5 GND E26
R14 VCC1_5 GND E29
R16 VCC1_5 GND F8
T15 VCC1_5 GND F12
U14 F16 CPU_VCC
VCC1_5 GND
U16 VCC1_5 GND F20
GND F24
GND G26
L25 H9 C42
+1_8VS VCC1_8 GND + C47 C46 C48 C68 C57 C56 C59 C69
L29 VCC1_8 GND H11
M22 VCC1_8 GND H13
N23 H15 22UF_10V_1206 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
VCC1_8 GND
N26 VCC1_8 GND H17
GND H19
GND H21
A5 VCCSM GND J1
+2.5V
A9 VCCSM GND J4
A13 VCCSM GND J6
2
A17 J22 +2.5V 2
VCCSM GND
A21 VCCSM GND J26
A25 VCCSM GND J29
C1 VCCSM GND K5
1
C29 VCCSM GND K7
D7 K27 + C425 C123 C153 C152 C126 C149 C125 C151 C154 C122 C124 C127 C150 C134 C144
VCCSM GND
D11 VCCSM GND L1
150UF_E 4.7UF_0805 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
D15 L4
2
VCCSM GND 6.3V
D19 L6
VCCSM GND
D23 L8
VCCSM GND
D25 L22
VCCSM GND
F6 L24
VCCSM GND
F10 L26
VCCSM GND
F14 M23
VCCSM GND +1_5VS
F18 N1
VCCSM GND
F22 N4
VCCSM GND
G1 N8
VCCSM GND
G4 N13
VCCSM GND
1
G29 N15 C86 C92
VCCSM GND + C101 C95 C108 C91 C112 C111 C100 C90
H8 N17 +
VCCSM GND
H10 N22
VCCSM GND 150UF_E 22UF_10V_1206 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
H12 N29
2
VCCSM GND 6.3V
H14 P6
VCCSM GND
H16 P8
VCCSM GND
H18 P14
POWER/GND
VCCSM GND
H20 P16
VCCSM GND
H22 R1
VCCSM GND
H24 R4
VCCSM GND
J5 R13
VCCSM GND
J7 R15
VCCSM GND
K6 R17
VCCSM GND
K22 R26
3 VCCSM GND 3
K24 T6
VCCSM GND
K26 T8
VCCSM GND
L23 T14
VCCSM GND
T16
GND
M8 T22
CPU_VCC VTT GND
U8 U1
VTT GND
AA9 U4
VTT GND
AB8 U15
VTT GND
AB18 U29
VTT GND
AB20 V6
VTT GND
AC19 V8
VTT GND
AD18 V22
VTT GND
AD20 W1
VTT GND
AE19 W4
VTT GND
AE21 W8
VTT GND
AF18 W26
VTT GND
AF20 Y6
VTT GND
AG19 Y22
VTT GND
AG21 AA1
VTT GND
AG23 AA4
VTT GND
AJ19 AA8
VTT GND
AJ21 AA29
VTT GND
AJ23 AB6
VTT GND
AB9
GND
AB19 AB10
GND GND
AB22 AB12
GND GND
AC1 AB13
GND GND
AC4 AB14
GND GND
AF21 AB15
GND GND
AF25 AB16
GND GND
AG1 AF5
GND GND
AG18 GND GND AF7
4 4
AG20 GND GND AF9
AG22 GND GND AF11
AH19 GND GND AF13
AH21 GND GND AF15
AH23 GND GND AF17
AJ3 GND GND AF19
AJ5 GND GND AJ9
AJ7 AJ11
AJ27
GND GND
AJ13
Compal Electronics, Inc.
GND GND Title
AJ17 GND GND AJ15
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
BROOKDALE DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 6 of 44
A B C D E
A B C D E F G H
1
DDR_DQ4 5 6 DDR_DQ0 C632
RP55 4P2R_33 RP56 4P2R_33 DDR_DQ5 DQ0 DQ4 DDR_DQ1
7 DQ1 DQ5 8
DDR_SDQ5 1 4 DDR_DQ5 DDR_SDQ30 1 4 DDR_DQ30 9 10 .1UF_0402
2
DDR_SDQ1 DDR_DQ1 DDR_SDQ31 DDR_DQ31 DDR_DQS0 VDD VDD
2 3 2 3 11 DQS0 DM0 12
DDR_DQ3 13 14 DDR_DQ6
DQ2 DQ6 DDR_SMA[0..12] 5
15 VSS VSS 16
RP57 4P2R_33 RP58 4P2R_33 DDR_DQ7 17 18 DDR_DQ2
DDR_SDQS0 DDR_DQS0 DDR_CB5 DDR_F_CB5 DDR_DQ12 DQ3 DQ7 DDR_DQ8 RP59 4P2R_0
1 4 1 4 19
DQ8 DQ12
20
DDR_SDQ6 2 3 DDR_DQ6 DDR_CB4 2 3 DDR_F_CB4 21 22 DDR_SMA12 1 4 DDR_F_SMA12
1 DDR_DQ15 VDD VDD DDR_DQ13 DDR_SMA9 2 1
Layout note 23 24 3 DDR_F_SMA9
DDR_DQS1 DQ9 DQ13
25 26
RP60 4P2R_33 RP61 4P2R_33 DQS1 DM1
27 28
DDR_SDQ3 DDR_DQ3 DDR_CB0 DDR_F_CB0 DDR_DQ11 VSS VSS DDR_DQ9 RP62 4P2R_0
Place these resistor 1 4 1 4 29
DQ10 DQ14
30
DDR_SDQ2 2 3 DDR_DQ2 DDR_CB2 2 3 DDR_F_CB2 DDR_DQ10 31 32 DDR_DQ14 DDR_SMA8 1 4 DDR_F_SMA8
closely DIMM0, DQ11 DQ15 DDR_SMA11 2
33
VDD VDD
34 3 DDR_F_SMA11
all trace length<750mil 35 36
5 DDR_CLK1 CK0 VDD
RP63 4P2R_33 RP64 4P2R_33 37 38
DDR_SDQ7 DDR_DQ7 DDR_SDQS8 DDR_DQS8 5 DDR_CLK1# CK0# VSS
1 4 1 4 39 40 RP65 4P2R_0
DDR_SDQ8 DDR_DQ8 DDR_CB6 DDR_F_CB6 VSS VSS DDR_SMA7 1
2 3 2 3 4 DDR_F_SMA7
DDR_SMA5 2 3 DDR_F_SMA5
DDR_DQ20 41 42 DDR_DQ16
RP66 4P2R_33 RP67 4P2R_33 DDR_DQ17 DQ16 DQ20 DDR_DQ21
43 DQ17 DQ21 44
DDR_SDQ13 1 4 DDR_DQ13 DDR_CB1 1 4 DDR_F_CB1 45 46 RP68 4P2R_0
DDR_SDQ12 DDR_DQ12 DDR_CB7 DDR_F_CB7 DDR_DQS2 VDD VDD DDR_SMA4 1
2 3 2 3 47 DQS2 DM2 48 4 DDR_F_SMA4
DDR_DQ22 49 50 DDR_DQ18 DDR_SMA6 2 3 DDR_F_SMA6
DQ18 DQ22
51 VSS VSS 52
RP69 4P2R_33 RP70 4P2R_33 DDR_DQ19 53 54 DDR_DQ23
DDR_SDQ15 DDR_DQ15 DDR_DQ25 DQ19 DQ23 DDR_DQ24 RP71 4P2R_0
1 4 1 4 55 DQ24 DQ28 56
DDR_SDQS1 2 3 DDR_DQS1 DDR_CB3 2 3 DDR_F_CB3 57 58 DDR_SMA3 1 4 DDR_F_SMA3
DDR_DQ28 VDD VDD DDR_DQ29 DDR_SMA1 2
59 DQ25 DQ29 60 3 DDR_F_SMA1
DDR_DQS3 61 62
RP72 4P2R_33 RP73 4P2R_33 DQS3 DM3
63 VSS VSS 64
DDR_SDQ9 1 4 DDR_DQ9 DDR_SDQ32 1 4 DDR_DQ32 DDR_DQ27 65 66 DDR_DQ26 RP74 4P2R_0
DDR_SDQ11 DDR_DQ11 DDR_SDQ36 DDR_DQ36 DDR_DQ31 DQ26 DQ30 DDR_DQ30 DDR_SMA0 1
2 3 2 3 67 68 4 DDR_F_SMA0
DQ27 DQ31 DDR_SMA2 2
69 VDD VDD 70 3 DDR_F_SMA2
DDR_F_CB4 71 72 DDR_F_CB5
RP75 4P2R_33 RP76 4P2R_33 DDR_F_CB2 CB0 CB4 DDR_F_CB0
73 CB1 CB5 74
DDR_SDQ14 1 4 DDR_DQ14 DDR_SDQ37 1 4 DDR_DQ37 75 76 R527 0_0402
DDR_SDQ10 DDR_DQ10 DDR_SDQ33 DDR_DQ33 DDR_DQS8 VSS VSS DDR_SMA10 1
2 3 2 3 77 DQS8 DM8 78 2 DDR_F_SMA10
DDR_F_CB7 79 80 DDR_F_CB6
CB2 CB6
81 VDD VDD 82
2 RP77 4P2R_33 RP78 4P2R_33 DDR_F_CB3 DDR_F_CB1 2
83 CB3 CB7 84 8 DDR_F_SMA[0..12]
DDR_SDQ16 1 4 DDR_DQ16 DDR_SDQS4 1 4 DDR_DQS4 85 86
DDR_SDQ20 DDR_DQ20 DDR_SDQ39 DDR_DQ39 DU DU/RESET#
2 3 2 3 87 VSS VSS 88
5 DDR_CLK0 89 CK2 VSS 90 Layout note
5 DDR_CLK0# 91 CK2# VDD 92
RP79 4P2R_33 RP80 4P2R_33 93 94 Place these resistor
DDR_SDQ21 DDR_DQ21 DDR_SDQ38 DDR_DQ38 DDR_CKE1 VDD VDD DDR_CKE0
1 4 1 4 5 DDR_CKE1 95 CKE1 CKE0 96 DDR_CKE0 5 closely DIMM0,
DDR_SDQ17 2 3 DDR_DQ17 DDR_SDQ34 2 3 DDR_DQ34 97 98
DDR_F_SMA12 DU/A13 DU/BA2 DDR_F_SMA11 all trace length<=750mil
99 100
DDR_F_SMA9 A12 A11 DDR_F_SMA8
101 102
RP81 4P2R_33 RP82 4P2R_33 A9 A8
103 104
DDR_SDQS2 DDR_DQS2 DDR_SDQ44 DDR_DQ44 DDR_F_SMA7 VSS VSS DDR_F_SMA6
1 4 1 4 105 106
DDR_SDQ18 DDR_DQ18 DDR_SDQ35 DDR_DQ35 DDR_F_SMA5 A7 A6 DDR_F_SMA4
2 3 2 3 107
A5 A4
108
DDR_F_SMA3 109 110 DDR_F_SMA2
DDR_F_SMA1 A3 A2 DDR_F_SMA0
111
A1 A0
112 Layout note
RP83 4P2R_33 RP84 4P2R_33 113 114
DDR_SDQ23 DDR_DQ23 DDR_SDQ40 DDR_DQ40 DDR_F_SMA10 VDD VDD DDR_F_SBS1
1 4 1 4 115
A10/AP BA1
116 Place these resistor
DDR_SDQ22 2 3 DDR_DQ22 DDR_SDQ41 2 3 DDR_DQ41 DDR_F_SBS0 117 118 DDR_F_SRAS#
DDR_F_SWE# BA0 RAS# DDR_F_SCAS# closely DIMM0,
119 120
DDR_SCS#0 WE# CAS# DDR_SCS#1 all trace length Max=1.3"
5 DDR_SCS#0 121 122 DDR_SCS#1 5
RP85 4P2R_33 RP86 4P2R_33 S0# S1#
123 124
DDR_SDQ19 DDR_DQ19 DDR_SDQ45 DDR_DQ45 DU DU +1.25VS
1 4 1 4 125 126
DDR_SDQ24 DDR_DQ24 DDR_SDQS5 DDR_DQS5 DDR_DQ36 VSS VSS DDR_DQ32
2 3 2 3 127 128
DDR_DQ33 DQ32 DQ36 DDR_DQ37
129 130
DQ33 DQ37
131 132
RP87 4P2R_33 RP88 4P2R_33 DDR_DQS4 VDD VDD RP89 4P2R_47
133 134
DDR_SDQ29 DDR_DQ29 DDR_SDQ42 DDR_DQ42 DDR_DQ39 DQS4 DM4 DDR_DQ34 DDR_CKE1 1
1 4 1 4 135
DQ34 DQ38
136 4
DDR_SDQ25 2 3 DDR_DQ25 DDR_SDQ43 2 3 DDR_DQ43 137 138 DDR_CKE0 2 3
DDR_DQ38 VSS VSS DDR_DQ35
139 140
DDR_DQ44 DQ35 DQ39 DDR_DQ41
141 142
RP90 4P2R_33 RP91 4P2R_33 DQ40 DQ44 RP92 4P2R_47
143 144
DDR_SDQ28 DDR_DQ28 DDR_SDQ47 DDR_DQ47 DDR_DQ40 VDD VDD DDR_DQ45 DDR_SCS#0 1
1 4 1 4 145 146 4
3 DDR_SDQS3 DDR_DQS3 DDR_SDQ46 DDR_DQ46 DDR_DQS5 DQ41 DQ45 DDR_SCS#1 2 3
2 3 2 3 147
DQS5 DM5
148 3
149 150
DDR_DQ43 VSS VSS DDR_DQ42
151 152
DDR_DQ47 DQ42 DQ46 DDR_DQ46
153 154
DQ43 DQ47
155 156
DD R_SDQ[0..63] VDD VDD
5 DDR_SDQ[0..63] 157 158 DDR_CLK2# 5
DDR_CB[0..7] VDD CK1#
5 DDR_CB[0..7] 159 160 DDR_CLK2 5
DD R_SDQS[0..8] RP93 4P2R_33 VSS CK1
5 DDR_SDQS[0..8] 161
VSS VSS
162 Layout note
DDR_SDQ52 1 4 DDR_DQ52 DDR_DQ52 163 164 DDR_DQ49
DDR_SDQ49 DDR_DQ49 DDR_DQ48 DQ48 DQ52 DDR_DQ53
2 3 165
DQ49 DQ53
166 Place these resistor
167 168 closely DIMM0,
DDR_DQS6 VDD VDD
169 170
RP94 4P2R_33 DDR_DQ55 DQS6 DM6 DDR_DQ54 all trace
171 172
DDR_SDQ48 DDR_DQ48 DQ50 DQ54
1 4 173 174 length<=750mil
DDR_SDQ53 DDR_DQ53 DDR_DQ50 VSS VSS DDR_DQ51
2 3 175
DQ51 DQ55
176
DDR_DQ59 177 178 DDR_DQ58
RP95 4P2R_33 DQ56 DQ60
179 180
DDR_SDQ51 DDR_DQ51 RP96 4P2R_33 DDR_DQ63 VDD VDD DDR_DQ62
1 4 181 182
DDR_SDQ59 DDR_DQ59 DDR_SDQS6 DDR_DQS6 DDR_DQS7 DQ57 DQ61
2 3 1 4 183 184
DDR_SDQ55 DDR_DQ55 DQS7 DM7
2 3 185
VSS VSS
186
DDR_DQ57 187 188 DDR_DQ61
RP97 4P2R_33 DDR_DQ60 DQ58 DQ62 DDR_DQ56
189 190
DDR_SDQ63 DDR_DQ63 RP98 4P2R_33 DQ59 DQ63
1 4 191 192
DDR_SDQ58 DDR_DQ58 DDR_SDQ50 DDR_DQ50 VDD VDD
2 3 1 4 8,13 DIMM_SMDATA 193
SDA SA0
194
DDR_SDQ54 2 3 DDR_DQ54 195 196
8,13 DIMM_SMCLK SCL SA1
197 198 R528 0_0402
+3VS VDD_SPD SA2 DDR_SBS1
199
VDD_ID DU
200 5 DDR_SBS1 1 2 DDR_F_SBS1 DDR_F_SBS1 8
RP99 4P2R_33
DDR_SDQ62 1 4 DDR_DQ62 RP100 4P2R_0
DDR_SDQS7 2 3 DDR_DQS7 DDR_SBS0 1 4 DDR_F_SBS0
DDR-SODIMM_200_Normal 5 DDR_SBS0 DDR_F_SBS0 8
DDR_SWE# 2 3 DDR_F_SWE#
5 DDR_SWE# DDR_F_SWE# 8
4 4
RP101 4P2R_33 DIMM0(STD) RP102 4P2R_0
DDR_SDQ57 1 4 DDR_DQ57 DDR_SCAS# 1 4 DDR_F_SCAS#
5 DDR_SCAS# DDR_F_SCAS# 8
DDR_SDQ61 2 3 DDR_DQ61 Top side DDR_SRAS# 2 3 DDR_F_SRAS#
5 DDR_SRAS# DDR_F_SRAS# 8
RP103 4P2R_33
DDR_SDQ60 1 4 DDR_DQ60 Compal Electronics, Inc.
DDR_SDQ56 2 3 DDR_DQ56 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 7 of 44
A B C D E F G H
A B C D E
+2.5V +2.5V
+1.25VS +1.25VS
SDREF_DIMM
DDR_F_CB[0..7] 7
JP30
RP104 4P2R_47 RP105 4P2R_47 RP106 4P2R_47
DDR_DQS[0..8] 7 1 VREF VREF 2
DDR_DQ4 1 4 4 1 DDR_DQ27 4 1 DDR_DQ49 3 4
VSS VSS
1
DDR_DQ0 2 3 3 2 DDR_DQ26 3 2 DDR_DQ52 DDR _DQ[0..63] DDR_DQ0 5 6 DDR_DQ4
DDR_DQ[0..63] 7 DDR_DQ1 DQ0 DQ4 DDR_DQ5
7 8 C633
DQ1 DQ5 .1UF_0402
9 10
2
RP108 4P2R_47 RP109 4P2R_47 DDR_F_SMA[0..12] 7 VDD VDD
RP107 4P2R_47 DDR_DQS0 11 12
DDR_DQ5 DQS0 DM0
1 4 4 1 DDR_DQ31 4 1 DDR_DQ53 DDR_DQ6 13 DQ2 DQ6 14 DDR_DQ3
DDR_DQ1 2 3 3 2 DDR_DQ30 3 2 DDR_DQ48 15 16
DDR_DQ2 VSS VSS DDR_DQ7
17 18
DDR_DQ8 DQ3 DQ7 DDR_DQ12 +1.25VS
19 20
RP110 4P2R_47 RP111 4P2R_47 RP112 4P2R_47 DQ8 DQ12
21 22
1 DDR_DQS0 1 VDD VDD RP113 4P2R_56 1
4 4 1 DDR_F_CB4 4 1 DDR_DQ55 DDR_DQ13 23 24 DDR_DQ15
DDR_DQ6 2 DQ9 DQ13
3 3 2 DDR_F_CB5 3 2 DDR_DQS6 DDR_DQS1 25
DQS1 DM1
26 4 1 DDR_F_SMA9
27 28 3 2 DDR_F_SMA12
DDR_DQ9 VSS VSS DDR_DQ11
29 30
RP114 4P2R_47 RP115 4P2R_47 RP116 4P2R_47 DDR_DQ14 DQ10 DQ14 DDR_DQ10
31 32
DDR_DQ3 DDR_F_CB2 DDR_DQ54 DQ11 DQ15 RP117 4P2R_56
1 4 4 1 4 1 33
VDD VDD
34
DDR_DQ2 2 3 3 2 DDR_F_CB0 3 2 DDR_DQ50 35 36 4 1 DDR_F_SMA8
5 DDR_CLK4 CK0 VDD
5 DDR_CLK4# 37
CK0# VSS
38 3 2 DDR_F_SMA11
39 40
RP118 4P2R_47 RP119 4P2R_47 VSS VSS
DDR_DQ7 RP120 4P2R_47 RP121 4P2R_56
1 4 4 1 DDR_F_CB6
DDR_DQ8 2 3 3 2 DDR_DQS8 4 1 DDR_DQ51 DDR_DQ16 41 42 DDR_DQ20 4 1 DDR_F_SMA5
DQ16 DQ20
3 2 DDR_DQ59 DDR_DQ21 43 DQ17 DQ21 44 DDR_DQ17 3 2 DDR_F_SMA7
45 VDD VDD 46
RP122 4P2R_47 RP123 4P2R_47 DDR_DQS2 47 DQS2 DM2 48
DDR_DQ12 1 RP124 4P2R_47 RP125 4P2R_56
4 4 1 DDR_F_CB1 DDR_DQ18 49 50 DDR_DQ22
DDR_DQ13 2 DQ18 DQ22
3 3 2 DDR_F_CB7 4 1 DDR_DQ58 51 VSS VSS 52 4 1 DDR_F_SMA6
3 2 DDR_DQ63 DDR_DQ23 53 54 DDR_DQ19 3 2 DDR_F_SMA4
DDR_DQ24 DQ19 DQ23 DDR_DQ25
55 DQ24 DQ28 56
RP126 4P2R_47 RP127 4P2R_47
57 VDD VDD 58
DDR_DQS1 1 RP128 4P2R_47 DDR_DQ29 DDR_DQ28 RP129 4P2R_56
4 4 1 59 DQ25 DQ29 60
DDR_DQ15 2 3 3 2 DDR_F_CB3 4 1 DDR_DQ62 DDR_DQS3 61 62 4 1 DDR_F_SMA1
DQS3 DM3
3 2 DDR_DQS7 63 VSS VSS 64 3 2 DDR_F_SMA3
DDR_DQ26 65 66 DDR_DQ27
RP130 4P2R_47 RP131 4P2R_47 DDR_DQ30 DQ26 DQ30 DDR_DQ31
67 DQ27 DQ31 68
DDR_DQ11 1 RP132 4P2R_47 RP133 4P2R_56
4 4 1 DDR_DQ36 69 VDD VDD 70
DDR_DQ9 2 3 3 2 DDR_DQ32 4 1 DDR_DQ61 DDR_F_CB5 71 72 DDR_F_CB4 4 1 DDR_F_SMA2
CB0 CB4
3 2 DDR_DQ57 DDR_F_CB0 73 CB1 CB5 74 DDR_F_CB2 3 2 DDR_F_SMA0
75 VSS VSS 76
RP134 4P2R_47 RP135 4P2R_47 DDR_DQS8 77 DQS8 DM8 78
DDR_DQ10 1 RP136 4P2R_47
4 4 1 DDR_DQ37 DDR_F_CB6 79 CB2 CB6 80 DDR_F_CB7 R529 56_0402
DDR_DQ14 2 3 3 2 DDR_DQ33 4 1 DDR_DQ56 81 82 1 2 DDR_F_SMA10
2 VDD VDD 2
3 2 DDR_DQ60 DDR_F_CB1 83 CB3 CB7 84 DDR_F_CB3
85 DU DU/RESET# 86
RP137 4P2R_47 RP138 4P2R_47 RP139 4P2R_56
87 VSS VSS 88
DDR_DQ20 1 4 4 1 DDR_DQ39 89 90 4 1 DDR_F_SWE#
DDR_DQ16 2 5 DDR_CLK3 CK2 VSS
3 3 2 DDR_DQS4 5 DDR_CLK3# 91 CK2# VDD 92 3 2 DDR_F_SBS0
93 VDD VDD 94
DDR_CKE3 95 96 DDR_CKE2
RP141 4P2R_47 5 DDR_CKE3 CKE1 CKE0 DDR_CKE2 5 RP142 4P2R_56
RP140 4P2R_47 97 98
DDR_DQ17 1 DU/A13 DU/BA2
4 4 1 DDR_DQ38 DDR_F_SMA12 99
A12 A11
100 DDR_F_SMA11 4 1 DDR_F_SRAS#
DDR_DQ21 2 3 3 2 DDR_DQ34 DDR_F_SMA9 101 102 DDR_F_SMA8 3 2 DDR_F_SCAS#
A9 A8
103 104
DDR_F_SMA7 VSS VSS DDR_F_SMA6
105 106
RP143 4P2R_47 RP144 4P2R_47 DDR_F_SMA5 A7 A6 DDR_F_SMA4 R530 56_0402
107 108
DDR_DQ18 1 A5 A4
4 4 1 DDR_DQ35 DDR_F_SMA3 109 110 DDR_F_SMA2 1 2 DDR_F_SBS1
DDR_DQS2 2 A3 A2
3 3 2 DDR_DQ44 DDR_F_SMA1 111
A1 A0
112 DDR_F_SMA0
113 114
DDR_F_SMA10 VDD VDD DDR_F_SBS1
115 116 DDR_F_SBS1 7
RP145 4P2R_47 RP146 4P2R_47 DDR_F_SBS0 A10/AP BA1 DDR_F_SRAS#
7 DDR_F_SBS0 117 118 DDR_F_SRAS# 7
DDR_DQ22 1 BA0 RAS#
4 4 1 DDR_DQ41 7 DDR_F_SWE#
DDR_F_SWE# 119 120 DDR_F_SCAS#
DDR_F_SCAS# 7
DDR_DQ23 2 WE# CAS#
3 3 2 DDR_DQ40 5 DDR_SCS#2
DDR_SCS#2 121
S0# S1#
122 DDR_SCS#3
DDR_SCS#3 5
123 124
DU DU
125 126
RP147 4P2R_47 RP148 4P2R_47 DDR_DQ32 VSS VSS DDR_DQ36
127 128
DDR_DQ19 1 DQ32 DQ36
4 4 1 DDR_DQS5 DDR_DQ37 129 130 DDR_DQ33
DDR_DQ24 2 DQ33 DQ37
3 3 2 DDR_DQ45 131 132
DDR_DQS4 VDD VDD
133 134
DDR_DQ34 DQS4 DM4 DDR_DQ39
135 136
RP149 4P2R_47 RP150 4P2R_47 DQ34 DQ38
137 138
DDR_DQ25 1 VSS VSS
4 4 1 DDR_DQ42 DDR_DQ35 139 140 DDR_DQ38
DDR_DQ29 2 DQ35 DQ39
3 3 2 DDR_DQ43 DDR_DQ41 141 142 DDR_DQ44
DQ40 DQ44
143 144
DDR_DQ45 VDD VDD DDR_DQ40
145 146
3 RP151 4P2R_47 RP152 4P2R_47 DDR_DQS5 DQ41 DQ45 3
147 148
DDR_DQS3 1 DDR_DQ46 DQS5 DM5
4 4 1 149
VSS VSS
150
DDR_DQ28 2 3 3 2 DDR_DQ47 DDR_DQ42 151 152 DDR_DQ43
DDR_DQ46 DQ42 DQ46 DDR_DQ47
153 154
DQ43 DQ47
155 156
VDD VDD
157 158 DDR_CLK5# 5
VDD CK1#
Layout note 159
VSS CK1
160 DDR_CLK5 5
161 162
DDR_DQ49 VSS VSS DDR_DQ52
Place these resistor 163
DQ48 DQ52
164
DDR_DQ53 165 166 DDR_DQ48
closely DIMM1, DQ49 DQ53
167 168
all trace DDR_DQS6 VDD VDD
169 170
DDR_DQ54 DQS6 DM6 DDR_DQ55 +1.25VS
length<=800mil 171 172
DQ50 DQ54
173 174
DDR_DQ51 VSS VSS DDR_DQ50
175 176
DDR_DQ58 DQ51 DQ55 DDR_DQ59
177 178
DQ56 DQ60 RP153 4P2R_47
179 180
DDR_DQ62 VDD VDD DDR_DQ63 DDR_CKE2 1
181 182 4
DDR_DQS7 DQ57 DQ61 DDR_CKE3 2
183 184 3
DQS7 DM7
185 186
DDR_DQ61 VSS VSS DDR_DQ57
187 188
DDR_DQ56 DQ58 DQ62 DDR_DQ60 RP154 4P2R_47
189 190
DQ59 DQ63 DDR_SCS#2 1
191 192 4
VDD VDD DDR_SCS#3 2
7,13 DIMM_SMDATA 193 194 +3VS 3
SDA SA0
7,13 DIMM_SMCLK 195 196
SCL SA1
197 198
+3VS VDD_SPD SA2
199 200
VDD_ID DU
Layout note
DDR-SODIMM_200_Reverse Place these resistor
closely DIMM1,
4 all trace length 4
DIMM1(REV) Max=1.3"
Bottem side
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 8 of 44
A B C D E
A B C D E
Layout note :
Di stribute as close as possible
to DDR-SODIMM.
+2.5V
1
1 C651 C652 C653 C654 C655 C656 C657 C658 C659 1
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2
2
+2.5V +2.5V
1
1
C660 C661 C662 C663 C664 C665 + C666 + C667
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R 150UF_D2_6.3V 150UF_D2_6.3V
2
2
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
2 2
+1.25VS
1
1
C668 C669 C670 C671 C672 C673 C674 C675 C676 C677
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2
2
+1.25VS
1
1
C678 C679 C680 C681 C682 C683 C684 C685 C686 C687
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2
2
+1.25VS
1
1
C688 C689 C690 C691 C692 C693 C694 C695 C696 C697
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2
2
3 3
+1.25VS
1
C698 C699 C700 C701 C702 C703 C704 C705 C706 C707
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2
+1.25VS
1
C708 C709 C710 C711 C712 C713 C714 C715 C716 C717
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2
+1.25VS
4 4
1
2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 9 of 44
A B C D E
A B C D
1 1
AD [0..31]
ICH-2
19,20,23 AD[0..31]
U33A
(FW82801BA)
AD0 AA4 D11
AD1 AD0 A20M# SB_A20M# 2
AB4 AD1 CPUSLP# A12 1 2 CPUSLP# 2
AD2 Y4 R22 FERR# R383 0
AD3 AD2 FERR# FERR# 2
W5 AD3 IGNNE# A11 SB_IGNNE# 2
AD4 W4 C12 CPUINIT#
AD5 AD4 INIT# CPUINIT# 2
AD6
Y5
AB3
AD5 CPU INTR C11
B11
SB_INTR 2
AD6 NMI SB_NMI 2
AD7 AA5 B12 SMI#
AD8 AD7 SMI# STPCLK# SMI# 2
AB5 AD8 STPCLK# C10 STPCLK# 2
AD9 Y3 B13 R C#
AD10 AD9 RCIN# GATEA20 RC# 31
W6 AD10 A20GATE C13 GATEA20 31
AD11 W3 A13 CPU_PWRGD
AD12 AD11 CPUPWRGD CPU_PWRGD 2
Y6 AD12
AD13 Y2
AD14 AD13 HL0 HL[0..10]
AA6 AD14 HL0 A4 HL[0..10] 4
AD15 Y1 B5 HL1
AD16 AD15 HL1 HL2
V2 AD16 HL2 A5
AD17 AA8 B6 HL3
AD18 AD17 HL3 HL4
V1 AD18 HL4 B7
2 AD19 HL5 2
AB8 AD19 HL5 A8
AD20 HL6
AD21
U4
W9
AD20 HUB HL6 B8
A9 HL7
AD22 AD21 HL7 HL8
U3 AD22 HL8 C8
AD23 Y9 C6 HL9
AD24 AD23 HL9 HL10
AD25
U2
AB9
AD24 PCI HL10 C7
C5 HL11
AD26 AD25 HL11 HL_STB
U1 A6 HL_STB 4
AD27 AD26 HL_STB HL_STB#
W10 A7 HL_STB# 4
AD28 AD27 HL_STB# +ICH_HLCOMP
T4 A3
AD29 AD28 HLCOMP HUBREF
Y10 B4 2 1
AD30 AD29 HUBREF C484 .1UF
T3
AD31 AD30
AA10
AD31 PIRQA# HUBREF 4
P1 PIRQA# 14,20,23
PIRQA# PIRQB#
19,20,23 C/BE#0 AA3 P2 PIRQB# 20
C/BE0# PIRQB# PIRQC#
19,20,23 C/BE#1 AB6
Y8
C/BE1# IRQ PIRQC#
P3
N4 PIRQD#
PIRQC# 19
19,20,23 C/BE#2 C/BE2# PIRQD# PIRQD# 23
19,20,23 C/BE#3 AA9
C/BE3#
DEVSEL# AB7 F21 IRQ14
19,20,23 DEVSEL# FRAME# DEVSEL# IRQ14 IRQ15 IRQ14 25
19,20,23 FRAME# V3 C16 IRQ15 24
IR D Y# FRAME# IRQ15 CLK_APIC_ICH
19,20,23 IR D Y# W8 N20
TR DY# IRDY# APICCLK PICD0
19,20,23 TRDY# V4 P22
STOP# TRDY# APICD0 PICD1
19,20,23 STOP# W1 N19
STOP# APICD1 SIRQ
19,20,23 PAR W2 N21 SIRQ 20,27,31
PCIRST# PAR SERIRQ
4,14,19,20,21,23,25,27,31,34 PCIRST# AA15
PLOCK# PCIRST# GPI2 +1_8VS
20 PLOCK# AA7 N3
SERR# PLOCK# GPI2/PIRQE# GPI3
19,20,23 SERR# W7 N2
PERR# SERR# GPI3/PIRQF# GPI4
Y7 N1
PCI Pullups 19,20,23 PERR#
Y15
PERR# GPI4/PIRQG#
M4 GPI5 HL11 1 2
PME# GPI5/PIRQH#
PME# has internal PU REQA# M3
GPI0/REQA# PIN N3, M4 can not use GPIO. R357 @10K
GNTA# L2 +ICH_HLCOMP 1 2
3 25 PIDERST# GPO16/GNTA# 3
R354 40.2_1%
RP35 PCLK_ICH W11 M2 GNT#0
PERR# 13 PCLK_ICH PCICLK GNT0# GNT#0 23
1 10 +3VS GNT1#
M1
REQA# 2 9 PIRQA# REQ#0 R2 R4 GNT#2
23 REQ#0 REQ0# GNT2# GNT#2 19
STOP# 3 8 PIRQB# REQ#1 R3 T2 GNT#3
SERR# REQ#4 REQ#2 REQ1# GNT3# GNT#3 20
4 7 19 REQ#2 T1 R1
REQ#3 REQ2# GNT4# SIDERST#
+3VS 5 6 20 REQ#3 AB10 L4 SIDERST# 25
REQ#4 REQ3# GPO17/GNTB#/GNT5# +3VS
P4
10P8R-8.2K GPI1 REQ4#
L3
GPI1/REQB#/REQ5# SIDERST# 1 2
ICH-2 R351 @8.2K
IRQ14 1 2
RP34 PCI REQ ASSIGMENT R410 10K
IR D Y# 1 10 IRQ15 1 2
+3VS
TR DY# 2 9 PIRQC# REQ#0 WLAN R390 10K
DEVSEL# 3 8 PIRQD#
FRAME# SIRQ RP36
4 7 REQ#1 NC
5 6 PLOCK# GPI4 1 8
+3VS GPI3
REQ#2 1394 2 7
10P8R-8.2K GPI2 3 6
REQ#3 PCMCIA CONTROLLER GPI5 4 5
REQ#4 NC
8P4R-100K
PCLK_ICH
1
+3VS R154
RP37 PICD0 2 1
REQ#0 @33 R414 10K
1 8
2 7 REQ#1 PICD1 2 1
1 2
GPI1 @22PF
1 2
R350 8.2K
1 2 GNTA#
R349 @1K
GNTA# Strapping for "A16 swap override" : "0" -> Enable
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 10 of 44
A B C D
A B C D
1 2
31 LLBATT#
+3V R403
1
10K
2 BATTLOW# RP41 RP44
ICH2-B(IDE,LPC,GPIO)
D38 RB751V USBP2- 1 8 USBP3- 1 8
USBP2+ USBP3+ USB3_D- 28
1 2 2 7 2 7
+3V R380 10K USBP0- USBP1- USB3_D+ 28
3 6 USB0_D- 28 3 6 USB1_D- 28
1 2 LID# USBP0+ 4 5 USBP1+ 4 5
31 EC_LID_OUT# USB0_D+ 28 USB1_D+ 28
D34 RB751V
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8P4R-15 8P4R-15
1 2 PBTN# CP5 RP40 CP6
31 PBTN_OUT#
D22 RB751V 8P4C-22PF 8P4R-15K 8P4C-22PF RP43
8P4R-15K
1 2
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
31,34 ON/OFF
D21 @RB751V
1 2
1 +3V R388 10K 1
1 2 ICH _ACIN
31,34,36,39 ACIN
D36 RB751V
1 2
+3V R370 10K
1 2 EXT_SMI# U33B
31 ECSMI#
D33 RB751V R400 1K
1 2 ATF_INT#
AA13 U20 1 2
+3V 31 ATF_INT# THRM# TP0 +3V
R362 10K D14 B14
SCI# SLP_S3# GPO19 GPO22
31 ECSCI# 1 2 31 SLP_S3# W16 A14
D32 RB751V SLP_S5# SLP_S3# GPO23 VGATE 1
31 SLP_S5# AB18 B15 2 V_GATE 41
SYS_PWROK R20 SLP_S5# VGATE/VRMPWRGD R478 0
1 2 35 SYS_PWROK PWROK
+3V R384 10K PBTN# CLK_USB_ICH
W21 PWRBTN# CLK48 P20 CLK_USB_ICH 13
1 2 ICH _RI# ICH _RI# AA17 M19 CLK_14M_ICH
31 EC_RIOUT# RSMRST# RI# CLK14 CLK_HUB_ICH CLK_14M_ICH 13
D35 RB751V R21 D4
12,35 RSMRST# RSMRST# CLK66 CLK_66M_ICH 13
32 FLASH# W15 GPIO25
AA18 F20 PDA0
+RTCVCC 20,21 RTCCLK SUSCLK PDA0 PDA1 PDA0 25
Y11
A15
GPI6 SYSTEM PDA1 F19
E22 PDA2 PDA1 25
GPO18 PDA2 PDCS1# PDA2 25
R190 C14 E21
GPO20 PDCS1# PDCS1# 25
1 2 BATTLOW# V21 E19 PDCS3#
GPIO24 PDCS3# PDCS3# 25
14,27,34 SUS_STAT# Y17 SUSSTAT#
15K R392 J1 INTRUDER# T19 G22 PDDREQ
INTRUDER# PDREQ PDDACK# PDDREQ 25
1 2 2 1 PDDACK# F22 PDDACK# 25
1
+5VS
+3VS
1 2 ICH_AC_SYNC
VGATE 26,29 IAC_SYNC PDIORDY
1 2 R408 22 1 2
R386 100K 1 2 ICH_AC_SDOUT R416 4.7K
26,29 IAC_SDATAO SDIORDY
R180 22 1 2
1
1 2 LDRQ#1
R356 @10K
1
1 2 ICH_AC_SDOUT
R179 @10K
AC_SDOUT Strapping: "1" -> Safe Mode Boot R166 R162 R149
22 10 10
1 2
1 2
1 2
4 RSMRST# IAC_BITCLK 4
2 1
R168 100K C270 C245 C198
1
2
R169 10K
IAC_SDATAI @33
2 1
R404 10K
2
2 1 IAC_SDATAI1
R405 10K Compal Electronics, Inc.
2 1 SPKR C543 Title
R407 1K SCHEMATIC, M/B LA-1512
@33PF THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SPKR Strapping: "0" -> No Reboot PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 11 of 44
A B C D
A B C D
ICH2-C(LAN,Power)
+1_8VS +3VS
U33C
1 1
D10 E14
VCC1_8_1 VCC3_3_1
E5 E15
VCC1_8_2 VCC3_3_2
K19 E16
VCC1_8_3 VCC3_3_3
L19 E17
VCC1_8_4 VCC3_3_4
P5 E18
VCC1_8_5 VCC3_3_5
V9 F18
VCC1_8_6 VCC3_3_6
D2 G18
VCC1_8_7 VCC3_3_7
H18
VCC3_3_8
A1 J18
GND1 VCC3_3_9
A2 P18
GND2 VCC3_3_10
A10 R18
GND3 VCC3_3_11 +3VS +5VS
B1 GND4 VCC3_3_12 R5
B2 GND5 VCC3_3_13 T5
B3 GND6 VCC3_3_14 U5
1
B9 GND7 VCC3_3_15 V5
B10 V6 R140
GND8 VCC3_3_16 D12 1K
C2 GND9 VCC3_3_17 V7
C3 V8 1SS355
GND10 VCC3_3_18
C4
2
GND11 +VCC5REF
C9 GND12 V5REF1 K2
D5 GND13 V5REF2 M20
D6 GND14
1
D7 V14 C197 C292
GND15 VCCSUS1_8_1 +1_8V
D8 GND16 VCCSUS1_8_2 V15
D9 V16 1UF_0805 .1UF
2
GND17 VCCSUS1_8_3
E6 GND18 VCCSUS1_8_4 H5
E7 GND19 VCCSUS1_8_5 J5
E8 GND20
E9 GND21
J10 GND22
J11 GND23 VCCSUS3_3_1 T18 +3V
J12 GND24 VCCSUS3_3_2 U18
2 2
J13 GND25 VCCSUS3_3_3 F5
J14 GND26 VCCSUS3_3_4 G5
J9 GND27 VCCSUS3_3_5 V17
K10 GND28 VCCSUS3_3_6 V18
K11 GND29
K12 GND30 V_CPU_IO_1 D12 CPU_VCC
+3V K13 D13
GND31 V_CPU_IO_2
K14
GND32
K9
GND33
L10
GND34
1
1
M13 J4 LAN_EEDI 3 6 C476
GND43 EE_DOUT DI NC
1
2
GND45 R353 @10K 9346
N10
4.7UF_10V_0805 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 1000PF_0402 1000PF_0402 N11
GND46 LAN
2
GND47
N12
GND48 LAN_CLK
P9 G3 LAN_CLK 22
GND49 LAN_CLK
P14 G2 LAN_RXD0 22
GND50 LAN_RXD0
P13 G1 LAN_RXD1 22
GND51 LAN_RXD1
P12 H1 LAN_RXD2 22
GND52 LAN_RXD2 LANTXD0 R100 1
P11 F3 2 33 LAN_TXD0 22
GND53 LAN_TXD0 LANTXD1 R101 1
P10 F2 2 33 LAN_TXD1 22
+1_8VS GND54 LAN_TXD1 LANTXD2 R102 1
N9 F1 2 33 LAN_TXD2 22
GND55 LAN_TXD2 R99
N14 H2 1 2 33 LAN_RST 22
3 GND56 LAN_RSTSYNC 3
N13 Y16 1 2 RSMRST# 11,35
GND57 RSM_PWROK R167 0
A21
GND58
1
C208 A22
GND59
1
GND62
AA2
GND63 LAN_CLK
AA21
GND64
AA22
GND65
1
AB1
GND66 R86
AB2
CPU_VCC GND67
AB21
+1_8V GND68 @33
AB22
GND69
K1
1 2
GND70
D3
GND71
1
C229
1
2
.1UF_0402 .1UF_0402 @22PF
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 12 of 44
A B C D
A B C D E F G H
Clock Generator
+3VS L11 +3V_CLK
CHB2012U121
1 2 Width=40 mils
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2] L12
1
0 0 0 66.67 66.67 CHB2012U121
1
0 0 1 100.00 100.00 1 2 +
0 1 0 200.00 200.00 C139 C140 C141 C142 C143 C172 C157 C174 C171
0 1 1 133.33 133.33 22UF_16V_1206 .01UF_0402.01UF_0402.01UF_0402.01UF_0402.01UF_0402.01UF_0402.01UF_0402.01UF_0402
2
1 1
14
19
32
37
46
50
1
8
U9
VDD_PCI
VDD_PCI
VDD_REF
VDD_3V66
VDD_3V66
VDD_48MHZ
VDD_CPU
VDD_CPU
L14 +3VS
C169 10PF CHB2012U121
+3VS +3VS 1 2 XTALIN 2 26 +3V_VDD 1 2
XTAL_IN VDD_CORE
1
1
Y2 +
1
2
@1K 1K
1 2 XTALOUT 3 27
C176 XTAL_OUT GND_CORE
2
CPUCLKT0
DIMM_SMDATA 29
DIMM_SMCLK SDATA
30 SCLK
51
CPUCLKC0
33
3V66_0/DRCG
35 24
3V66_1/VCH_CLK 66MHZ_IN/3V66_5
23 R125 1 2 33 CLK_66M_AGP 14
R324 1 66MHZ_OUT2/3V66_4
2 220 42 22 R124 1 2 33 CLK_66M_ICH 11
IREF 66MHZ_OUT1/3V66_3 66M_MCH R123 1
21 2 33 CLK_66M_MCH 4
66MHZ_OUT0/3V66_2
R107 1 2 33 39 7 R131 1 2 33
11 CLK_USB_ICH 48MHZ_USB PCICLK_F2 PCLK_ICH 10
6
PCICLK_F1
5
PCICLK_F0
38
48MHZ_DOT R134 1
18 2 33 PCLK_PCM 20
PCICLK6 R521 1
17 2 33 PCLK_1394 19
PCICLK5 R133 1
PCICLK4
16 2 33 PCLK_SIO 27
R109 1 2 33 56 13
11 CLK_14M_ICH REF PCICLK3
27 14.3M_SIO 1 2 12
PCICLK2
GND_48MHZ
R110 33 11 R132 1 2 33
PCICLK1 PCLK_EC 31
GND_3V66
GND_3V66
GND_IREF
GND_CPU
GND_REF
10 R122 1 2 33
GND_PCI
GND_PCI
PCICLK0 PCLK_MINI 23
3 3
1
C182 C183 C184
1
2
@10PF
2
+3V
2
+5VS
R321
4.7K
2
G
1
1 3 DIMM_SMDATA
11 SDAP4 DIMM_SMDATA 7,8
D
+3V
Q61 2N7002
2
+5VS
R322
4.7K
2
G
1
4 DIMM_SMCLK 4
11 SCKP4 1 3 DIMM_SMCLK 7,8
D
Q62 2N7002
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 13 of 44
A B C D E F G H
1 2 3 4 5 6 7 8
GPIO / ROM
GAD5 AD4 GPIO4
E25 AD5 GPIO5 V4
GAD6 E24 V3
GAD7 AD6 GPIO6
E26 AD7 GPIO7 V2
GAD8 F26 V1
GAD9 AD8 GPIO8
A G23 AD9 GPIO9 U3 A
GAD10 G25 U2
GAD11 AD10 GPIO10
G24 AD11 GPIO11 U1
GAD12 G26 T4
GAD13 AD12 GPIO12
H24 AD13 GPIO13 T3
GAD14 H26
GAD15 AD14
H25 AD15 ZV_LCDDATA0 AA4
GAD16 L23 AB1
GAD17 AD16 ZV_LCDDATA1
L26 AD17 ZV_LCDDATA2 AB2
GAD18 L24 AB3
GAD19 AD18 ZV_LCDDATA3
M26 AD19 ZV_LCDDATA4 AB4
GAD20 M24 AC1
GAD21 AD20 ZV_LCDDATA5
N25 AD21 ZV_LCDDATA6 AC2
GAD22 M25 AC3
GAD23 AD22 ZV_LCDDATA7
N26 AD23 ZV_LCDDATA8 AD1
LVDS
4 AD_STB0# ADSTRB0# TXOUT_U0P TZOUT0+ 18
BLM21P300S_0805 ADSTBB P25 AE11
4 AD_STB1 AD_STB1 TXOUT_U1N TZOUT1- 18
ADSTBB# N24 AF11
4 AD_STB1# ADSTRB1# TXOUT_U1P TZOUT1+ 18
TXOUT_U2N AD12 TZOUT2- 18
ST0 Y26 AC12
4 ST0 ST0 TXOUT_U2P TZOUT2+ 18
ST1 Y23 AD13
4 ST1 ST1 TXOUT_U3N
ST2 Y25 AE13
4 ST2 ST2 TXOUT_U3P
1
TXCM
1 2 AE6 AF18
SSC
SSOUT DVIDDCCLK
DVIDDCDATA AC20
1
XTALOUT R
G AF23 G 18
+3V_VGA AF22
B B 18
1 2 AC6 TESTEN HSYNC AE24 H S YNC1 18
FREQOUT 1 2 R55 1K AE23
VSYNC VSYNC1 18
R46 120 Y3 ROMCS#
1
DDC_MD2 18
2
H2SYNC MONID1
4 VDD OUT 3 AF13 V2SYNC
AE25 R49 1 2 0 SUS_STAT#
SUS_STAT# SUS_STAT# 11,27,34
1 ST GND 2 18 LCD_CLK AF6 CRT2DDCCLK
1
845_1% (10 mil) M6-P R2SET RSET (10 mil) R50 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
Divider circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
Custom
Date: 星期二, 十一月 26 , 2002 Sheet 14 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
MEMORY INTERFACE
NMD[0:63]
NMD[0:63] 16
A A
NMA[0:13]
NMA[0:13] 16
N DQM[0:7]
NDQM[0:7] 16
1 16
U8B 2 15
NMD0 8 9 VMD0 A26 B13 VMA0 3 14 RP12 NMA0
NMD1 RP15 VMD1 DQ0 MA0 VMA1 16P8R-10 NMA1
7 10 B25 DQ1 MA1 A13 4 13
NMD2 6 11 16P8R-33 VMD2 A25 C12 VMA2 5 12 NMA2
NMD3 VMD3 DQ2 MA2 VMA3 NMA3
5 12 A24 DQ3 MA3 B12 6 11
NMD4 4 13 VMD4 B23 A12 VMA4 7 10 NMA4
NMD5 VMD5 DQ4 MA4 VMA5 NMA5
3 14 A23 DQ5 MA5 D11 8 9
NMD6 2 15 VMD6 C22 C11 VMA6 1 16 NMA6
NMD7 VMD7 DQ6 MA6 VMA7 NMA7
1 16 B22 DQ7 MA7 B11 2 15
NMD8 8 9 VMD8 C21 A11 VMA8 3 14 RP13 NMA8
NMD9 RP16 VMD9 DQ8 MA8 VMA9 16P8R-10 NMA9
7 10 B21 DQ9 MA9 C10 4 13
NMD10 6 11 16P8R-33 VMD10 A21 B10 VMA10 5 12 NMA10
NMD11 VMD11 DQ10 MA10 VMA11 NMA11
5 12 D20 DQ11 MA11 A10 6 11
NMD12 4 13 VMD12 C20 D9 VMA12 7 10 NMA12
NMD13 VMD13 DQ12 MA12 VMA13 NMA13
3 14 B20 DQ13 MA13 C9 8 9
NMD14 2 15 VMD14 A20
NMD15 VMD15 DQ14 VDQM0 R345 33 NDQM0
1 16 C19 DQ15 DQM#0 A22 1 2
NMD16 8 9 VMD16 B18 D21 VDQM1 R344 1 2 33 NDQM1
MEMORY INTERFACE
NMD17 RP17 VMD17 DQ16 DQM#1 VDQM2 R342 33 NDQM2
7 10 A18 DQ17 DQM#2 A16 1 2
NMD18 6 11 16P8R-33 VMD18 C17 C15 VDQM3 R341 1 2 33 NDQM3
NMD19 VMD19 DQ18 DQM#3 VDQM4 R333 33 NDQM4
5 12 B17 DQ19 DQM#4 F2 1 2
NMD20 4 13 VMD20 A17 G1 VDQM5 R332 1 2 33 NDQM5
B NMD21 VMD21 DQ20 DQM#5 VDQM6 R316 33 NDQM6 B
3 14 D16 DQ21 DQM#6 N2 1 2
NMD22 2 15 VMD22 C16 N3 VDQM7 R320 1 2 33 NDQM7
NMD23 VMD23 DQ22 DQM#7
1 16 B16 DQ23
NMD24 8 9 VMD24 B15 A19 VDQS0 R343 1 2 33 NDQS0
DQ24 QS0 NDQS0 16
NMD25 7 10 VMD25 A15 B19
NMD26 RP18 VMD26 DQ25 QS1
6 11 D14 DQ26 QS2 D18
NMD27 5 12 16P8R-33 VMD27 C14 C18
NMD28 VMD28 DQ27 QS3 VDQS4 R329 1
4 13 B14 DQ28 QS4 J4 2 33 NDQS4
NDQS4 16
NMD29 3 14 VMD29 A14 K1
NMD30 VMD30 DQ29 QS5
2 15 D13 DQ30 QS6 K2
NMD31 1 16 VMD31 C13 K3
NMD32 VMD32 DQ31 QS7
8 9 B1 DQ32
NMD33 7 10 VMD33 C1 A9 VMRAS# 1 8 RP14 NMRAS#
DQ33 RAS# NMRAS# 16
NMD34 6 11 RP11 VMD34 C2 2 7 8P4R_0 NMCAS#
DQ34 NMCAS# 16
NMD35 5 12 16P8R-33 VMD35 D1 C8 VMCAS# 3 6 NMWE#
DQ35 CAS# NMWE# 16
NMD36 4 13 VMD36 D2 4 5 NMCS0#
DQ36 NMCS0# 16
NMD37 3 14 VMD37 E1 D8 VMWE#
NMD38 VMD38 DQ37 WE#
2 15 E2 DQ38
NMD39 1 16 VMD39 F1 B9 VMCS0#
NMD40 VMD40 DQ39 CS#0
8 9 G2 DQ40
NMD41 7 10 VMD41 G3 B8
NMD42 RP10 VMD42 DQ41 CS#1
6 11 H1 DQ42
NMD43 5 12 16P8R-33 VMD43 H2 A8 VMCKE R340 1 2 0 NMCKE
DQ43 CKE NMCKE 16
NMD44 4 13 VMD44 H3
NMD45 VMD45 DQ44 VMCLK0 R135 1 22 NMCLK0
3 14 J1 DQ45 CLK0 A6 2 NMCLK0 16
NMD46 2 15 VMD46 J2 B6 VMCLK0# R130 1 2 22 NMCLK0#
DQ46 CLK0# NMCLK0# 16
NMD47 1 16 VMD47 J3
NMD48 VMD48 DQ47 VMCLK1 R128 1 22 NMCLK1
8 9 L1 DQ48 CLK1 A4 2 NMCLK1 16
NMD49 7 10 VMD49 L2 B4 VMCLK1# R116 1 2 22 NMCLK1#
DQ49 CLK1# NMCLK1# 16
C NMD50 6 11 RP9 VMD50 L3 C
NMD51 16P8R-33 VMD51 DQ50
5 12 L4 DQ51 NC A7
NMD52 4 13 VMD52 M1 B7
DQ52 NC
1
NMD53 3 14 VMD53 M2 C186 C181 C178 C170
NMD54 VMD54 DQ53
2 15 M3 DQ54 NC A5
NMD55 1 16 VMD55 N1 B5 @15PF @15PF @15PF @15PF
2
NMD56 VMD56 DQ55 NC
8 9 N4 DQ56
NMD57 7 10 VMD57 P1 B3
NMD58 RP8 VMD58 DQ57 CLKFB
6 11 P2 DQ58
NMD59 5 12 16P8R-33 VMD59 P3
NMD60 VMD60 DQ59 MVREF
4 13 P4 DQ60 VREF T2
NMD61 3 14 VMD61 R1 +2_5V
NMD62 VMD62 DQ61
2 15 R2 DQ62 MEMVMODE T1 1 2 +1_8V_VGA
NMD63 1 16 VMD63 R3 R306 4.7K
DQ63
1
M6-P R314
1K_1%
2
(10 mil)
1
1 C399 R298
.1UF 1K_1%
2
2
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
Custom
Date: 星期二, 十一月 26 , 2002 Sheet 15 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DDR SDRAM
L17
+3V @CHB2012U121
FBVDD
A
L16 A
+2_5V
CHB2012U121
1
C188 C187
10UF_1206
.1UF
2
+2_5V +2_5V
1
C258 C262 C206 C236 C219 C200 C482 C205 C203 C201
10UF_1206 .1UF 2200PF 2200PF 2200PF 10UF_1206 .1UF 2200PF 2200PF 2200PF
2
2
FBVDD FBVDD
1
1
C483 C204 C261 C260 C202 C264 C237 C263 C226 C194 C179 C467 C466 C465 C464 C155 C195 C196
.1UF .1UF .1UF .1UF .1UF .1UF 2200PF .1UF 10UF_1206 .1UF .1UF .1UF .1UF .1UF .1UF 2200PF .1UF 10UF_1206
14
22
59
67
73
79
86
95
15
35
65
96
14
22
59
67
73
79
86
95
15
35
65
96
2
2
2
8
2
8
U13 U10
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B B
2
NDQM0 23 72 NMD15 NDQM4 23 72 NMD47
R147 NDQM1 DM0 DQ15 NMD16 R112 NDQM5 DM0 DQ15 NMD48
56 DM1 DQ16 9 56 DM1 DQ16 9
NMCKE NDQM2 24 10 NMD17 NDQM6 24 10 NMD49
15 NMCKE DM2 DQ17 DM2 DQ17
NMCLK0 1K_1% NDQM3 57 12 NMD18 1K_1% NDQM7 57 12 NMD50
15 NMCLK0 DM3 DQ18 DM3 DQ18
NMCLK0# NDQS0 13 NMD19 NDQS4 13 NMD51
15 NMCLK0#
1
1
NMCLK1 (10
VREF1 NVREF0 DQ19 NMD20 (10 VREF2 NVREF1 DQ19 NMD52
15 NMCLK1 94 DQS DQ20 17 94 DQS DQ20 17
NMCLK1# mil) 18 NMD21 mil) 18 NMD53
15 NMCLK1# DQ21 DQ21
2
2
58 20 NMD22 58 20 NMD54
VREF DQ22 VREF DQ22
1
1
R146 C207 52 21 NMD23 R113 C156 52 21 NMD55
NDQS0 MCL DQ23 NMD24 MCL DQ23 NMD56
15 NDQS0 93 RFU DQ24 74 93 RFU DQ24 74
NDQS4 1K_1% .1UF 75 NMD25 1K_1% .1UF 75 NMD57
15 NDQS4
2
2
NMRAS# DQ25 NMD26 NMRAS# DQ25 NMD58
27 77 27 77
1
1
C NMCAS# RAS# DQ26 NMD27 NMCAS# RAS# DQ26 NMD59 C
26 CAS# DQ27 78 26 CAS# DQ27 78
NMWE# 25 80 NMD28 NMWE# 25 80 NMD60
NMCS0# WE# DQ28 NMD29 NMCS0# WE# DQ28 NMD61
28 CS# DQ29 81 28 CS# DQ29 81
83 NMD30 83 NMD62
NMCKE DQ30 NMD31 NMCKE DQ30 NMD63
53 CKE DQ31 84 53 CKE DQ31 84
NMCLK0 55 38 NMCLK1 55 38
CK NC CK NC
54 CK# NC 39 54 CK# NC 39
2
2
NC 40 NC 40
R148 87 41 R114 87 41
NC NC NC NC
88 NC NC 42 88 NC NC 42
120 89 43 120 89 43
NC NC NC NC
90 44 90 44
1
1
NMCLK0# NC NC NMCLK1# NC NC
91 NC 91 NC
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K4D62323HA K4D62323HA
5
11
19
62
70
76
82
92
99
16
46
66
85
5
11
19
62
70
76
82
92
99
16
46
66
85
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE Custom 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
Date: 星期二, 十一月 26 , 2002 Sheet 16 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+1_8V_VGA
U8C +1_8V_VGA
E5 AB11
C3
B2
VSS
VSS
VSS
VDDC
VDDC
VDDC
H5
K5
POWER INTERFACE
1
A1 M5 C441 C439 C438 C437 C436 C432 C426 C421
VSS VDDC +1_8VS
D4 VSS VDDC R5
J4 L50 .1UF_0402 1000PF_0402 .1UF_0402 .01UF_0402.1UF_0402 .01UF_0402
T10 U5
2
VSS VDDC
T11 VSS VDDC W5 1 2
T12 AB8 FBM-L11-201209-221 22UF_10V_1206 1000PF_0402
VSS VDDC L51 VDD_PLL1.8
T13 VSS VDDC AB14
T14 AB7 PAD-OPEN 4x4m
VSS VDDC FBM-L11-201209-221 +1_8V_VGA L30
T15 VSS VDDC AB17
A T16 AB19 (20 mil) A
VSS VDDC +1_8V_VGA CHB1608U301
T17 VSS VDDC W22 For S3 mode,short J4
K10 VSS VDDC U22
1
K11 R22 C403 C417 C404 C440 C405 C415 C396 C401
VSS VDDC .1UF_0402
K12 VSS VDDC M22
K13 K22 .1UF_0402 1000PF_0402 .1UF_0402 .1UF_0402 10UF_1206
2
VSS VDDC
K14 VSS VDDC H22
K15 E19 22UF_10V_1206 1000PF_0402
VSS VDDC
K16 VSS VDDC E17
K17 VSS VDDC E15
L10 E12 +2_5V
VSS VDDC VDD_MEMPLL1.8
L11 VSS VDDC E10
L12 VSS VDDC E8
L13 AB12 L33
VSS VDDC
1
L14 C453 C457 C458 C459 C460 C427 (20 mil)
VSS +1_8V_VGA CHB1608U301
L15 VSS
L16 D10 1UF_0805 .1UF_0402 1000PF_0402 .1UF_0402 .1UF_0402
2
VSS VDDR1 C469 C471
L17 VSS VDDR1 C7
M10 C23 1000PF_0402 .1UF_0402
VSS VDDR1 @10UF_1206
M11 VSS VDDR1 D12
M12 VSS VDDR1 D17
M13 E3 +3V_VGA
VSS VDDR1
M14 VSS VDDR1 F4
M15 VSS VDDR1 B24
M16 VSS VDDR1 F3
1
M17 D6 C406 C407 C408 C402 C409 VDD_PNLPLL1.8
VSS VDDR1
N10 VSS VDDR1 C6
N11 D15 .1UF_0402 1000PF_0402 .1UF_0402 .1UF_0402 L27
2
VSS VDDR1 (20 mil)
N12 VSS VDDR1 D19
1000PF_0402 +1_8V_VGA CHB1608U301
N13 VSS VDDR1 D22
B B
N14 VSS VDDR1 G4
N15 E6 C384 C381
VSS VDDR1 +1_5VS .1UF_0402
N16 VSS VDDR1 E7
N17 E9 10UF_1206
VSS VDDR1
P10 VSS VDDR1 E11
P11 VSS VDDR1 E13
1
P12 E14 C411 C414 C420 C424 C429
VSS VDDR1
P13 VSS VDDR1 E16
P14 E18 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
2
VSS VDDR1 VDD_DAC1.8
P15 VSS VDDR1 E20
P16 VSS VDDR1 E21
P17 G5 L29
VSS VDDR1 (20 mil)
R10 VSS VDDR1 H4 +1_8V_VGA
R11 J5 CHB1608U301
VSS VDDR1
R12 VSS VDDR1 K4
R13 L5 C385 C383
VSS VDDR1 .1UF_0402
R14 VSS VDDR1 M4
R15 N5 10UF_1206
VSS VDDR1
R16 VSS VDDR1 P5
R17 VSS VDDR1 R4
U10 VSS VDDR1 D7
U11 +3V_VGA
VSS
U12 VSS
U13 For S3 mode,short J6 +2_5V VDD_PNLIO1.8
VSS J5
U14 VSS VDDR3 T5
U15 U4 1 2 L28
VSS VDDR3 +3V J7 (20 mil)
U16 V5 1 2
U17
VSS
VSS
VDDR3
VDDR3 W4 PAD-OPEN 4x4m +2.5Vdc Regulator 1 2
+1_8V_VGA
C4 Y5 CHB1608U301
C
VSS VDDR3 J6 PAD-OPEN 4x4m C380 C382 C
D3 VSS VDDR3 AA5
E4 AC4 1 2 U24 1 .1UF 1000PF_0402
VSS VDDR3 +3VS
F5 AB5 AMS1503 L48
VSS VDDR3 PAD-OPEN 4x4m +3VALW
D5 VSS VDDR3 AB6 Sense
AB15 @FBM-L11-201209-221
VDDR3 L49
VDD_DAC1.8 AD23 AVDD VDDR3 AB16 5 Vpower Output 3
AD22 AVSSN VDDR3 AB18
AC21 AB20 @FBM-L11-201209-221 VDD_MCLK2.5
AVSSQ VDDR3
2
+5VALW Control Adjust L34
VDDR3 AB21
AD16 AB22 Q35 R111 1 2 (20 mil)
VDD_DAC2.5 A2VDD VDDR3 4 2 +2_5V
AD15 AC17 TP0610T
A2VDDQ VDDR3 @100_1% CHB1608U301
AC15 A2VSSN VDDR3 AC23 3 1
AC16 AC24 VREF 1.25V C725 C463 C726 C727
1
A2VSSN VDDR3 C129 + 100PF .1UF_0402 100PF 470PF
AE15 A2VSSQ C137
10UF_1206
2
AC13 150UF_D_6.3V
VDD_PNLIO1.8 LVDDR
AD14 E22 C138 R108
LVDDR VDDP +1_5VS
AB13 F22 R300 .1UF
LVSSR VDDP 0
AC14 LVSSR VDDP G22 1 2
H23
1
VDDP 100K VDD_DAC2.5
AC19 TXVDDR VDDP J22
AD19 K23 L32
TXVDDR VDDP
1
B+
1
D27 D28 D26
L24
1
P ID[0..3] C358 C357 CHB2012U170 JP1
P ID[0..3] 27
1 2 IB+
. 1UF 10UF_1210_35V B+ 1
1 2
2
@DAN217 @DAN217 @DAN217 L25 CHB2012U170 2
3
DAC_B RIG 3
31 DAC_BRIG 4
+3VS INVT_PWM
+5VS 31 INVT_PWM 5
RP24 DISP OFF#
PID3 6
5 4 7
1 2 6 3 PID2
PID1 8
1 7 2 9 1
C17 @47PF 8 1 PID0
L3 CHB1608U301 JP16 LCDVDD 10
LUMA 8P4R-10K 11
14 LUMA 1 2 1 12
1 2 2 14 TXOUT0+ 13
C13 @47PF
3 14 TXOUT0- 14
CRMA 1 2
14 CRMA L1 CHB1608U301 4 15
5 14 TXOUT1+ 16
6 14 TXOUT1- 17
COMPS 1 2
14 COMPS 7 18
L2 CHB1608U301
14 TXOUT2+ 19
1 2 S C O NN._SUYIN
14 TXOUT2- 20
1
C15 @47PF 21
14 TXCLKO+ 22
R256 R257 R252
14 TXCLKO- 23
1
1
C355 C356 C354 C12 C16 PID0
C14 24
75_1% 75_1% 75_1% PID1
2
2
PID3 26
27
14 TZOUT0+ 28
14 TZOUT0- 29
30
14 TZOUT1+ 31
+3VS 14 TZOUT1- 32
+12V +3V
33
14 TZOUT2+ 34
14 TZOUT2- 35
LCDVDD R11 36
R258 14 TZCLKO+ 37
2 +5V 100K + C364 1K 2
4.7UF_1206 14 TZCLKO- 38
D29 RB717F 14 LCD_DATA 39
1
1
10V
14 LCD_CLK 40
R14 2 31 BKOFF# 1
Q24 3 DISPOFF# ipex_20228-040e_f40p
1
1
100 R13 SI2302DS 31 ENVEE 2 C738
3
10K R10 C22
1 2
2
1
D Q25
R12
Q21 22K BLON#
2 2 14 BLON# 2
2N7002 22K G 2N7002 +5VS
1
47K S R540 1K
3
3
Q22 C21 + C23 1 2
DTC124EK Q23 4.7UF_1206
3
GND
74AHCT1G125GW
D2 D4 D3 2 1 1 2 2
3 14 V S YNC1 A 3
4 V S YN C
Y
1
FUSE_1A 3
RB491D GND
C27 74AHCT1G125GW
2
DAN217 DAN217 DAN217 . 1UF JP15
2
CRT-15P
14 DDC_MD2
L21 6
14 M_SEN# 11
1 2 1
14 R CHB2012U121_0805 7
L22 12
1 2 2 +3VS
14 G CHB2012U121_0805 8
13 CRT_VCC CRT_VCC
L23
1
1 2 3 +3VS +3VS
14 B CHB2012U121_0805 CR T_VCC 9
2
1
14 R541
1
1
C362 C361 C352 C9 C7 C5 4 1K
R248 R255 R259 10 R249 R265 R302 R303
2
1
75_1% 75_1% 75_1% 18PF 18PF 18PF 15PF 15PF 15PF 15 2.2K 2.2K
2
2
100PF
2
2
L20
H S YN C 1 2 D DCD 1 3 DDC_DATA 14
CHB1608B121
2
D DCC Q65
L4 2N7002
1
V S YN C 1 2 C8 1 3
4
220PF DDC_CLK 14 4
CHB1608B121 C24
1
220PF Q66
2
2
2
Title
CRT_VCC CRT_VCC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 18 of 44
A B C D E
A B C D E
+3V
+3V
1
RP52 C606 C607 C608 C609 C610 C611 C612 C613 C614
AD[0..31] 1 8
10,20,23 AD[0..31] .01UF .01UF .01UF .01UF .01UF . 1UF . 1UF . 1UF . 1UF
2 7
2
+3V 3 6
4 5
8P4R_4.7K
1 +3V 1
U57
TSB43AB22
20
35
48
62
78
87
86
96
10
11
1
C615 C616 C617 C618
TEST17
TEST16
CYCLEIN
VDDP
VDDP
VDDP
VDDP
VDDP
CNA
CYCLEOUT/CARDBUS
15 . 1UF . 1UF .1 UF .1 UF
2
AD31 DVDD +3V
22 PCI_AD31 DVDD 27
AD30 24 39
AD29 PCI_AD30 DVDD
25 PCI_AD29 DVDD 51
AD28 26 59
AD27 PCI_AD28 DVDD
28 PCI_AD27 DVDD 72
AD26 29 88
AD25 PCI_AD26 DVDD L52
31 PCI_AD25 DVDD 100
AD24 32 7 1 2
AD23 PCI_AD24 PLLVDD 0_0805 +3V
37 PCI_AD23 AVDD 1 +3V
1
AD22 38 2
AD21
AD20
40
41
PCI_AD22
PCI_AD21
TSB43AB22 AVDD
AVDD 107
108
C619 C620
2
AD19 PCI_AD20 AVDD .01UF 4.7UF_0805
42 PCI_AD19 AVDD 120
AD18 43 PCI_AD18
AD17 45 PCI_AD17
PCI BUS INTERFACE
AD16 46 106 1 2
AD15 PCI_AD16 CPS R500 1K
61 PCI_AD15
AD14 63
AD13 PCI_AD14
65 PCI_AD13 PHY PORT 2 TPBIAS1 125 1 2
AD12 66 124 C621 . 1UF
AD11 PCI_AD12 TPA1+ R501 1K
67 PCI_AD11 TPA1- 123
AD10 69 122 1 2
2 A D9 PCI_AD10 TPB1+ 2
70 PCI_AD9 TPB1- 121 1 2
A D8 71 R502 1K
A D7 PCI_AD8
74 PCI_AD7 BIAS CURRENT R0 118
A D6 76 R503
A D5 PCI_AD6 6.34K_1%_0603
77 PCI_AD5
A D4 79
A D3 PCI_AD4
80 PCI_AD3
AD26 C622
1 2 1394_IDSEL A D2 81 PCI_AD2 R1 119
R504 100 A D1 82 1 2
A D0 PCI_AD1
84 PCI_AD0 OSCILLATOR X0 6
C/BE#3 34 15PF
10,20,23 C/BE#3 PCI_C/BE3
C/BE#2 47 Y4
10,20,23 C/BE#2 PCI_C/BE2
C/BE#1 60
10,20,23 C/BE#1 PCI_C/BE1 C623
C/BE#0 73 5 24.576 MHz
10,20,23 C/BE#0 PCI_C/BE0 X1
PCLK_1394 16 1 2
13 PCLK_1394 PCI_CLK
GNT#2 18
10 GNT#2 PCI_GNT
REQ#2 19 3 1 2 15PF
10 REQ#2
1394_IDSEL PCI_REQ FILTER FILTER0 C624 . 1UF
36 PCI_IDSEL
FRAME# 49 4 JP28
10,20,23 FRAME# PCI_FRAME FILTER1
IR D Y# 50
10,20,23 IR D Y# PCI_IRDY
T RDY# 52 92 1 2 TPB0- 1
10,20,23 T RDY#
DEVSEL# 53
PCI_TRDY EEPROM 2 WIRE BUS SDA R505 220 TPB0+ 2
1
10,20,23 DEVSEL# PCI_DEVSEL 2
STOP# 54 91 1 2 TPA0- 3
10,20,23 STOP# PCI_STOP SCL 3
P ERR# 56 R506 220 TPA0+ 4
10,20,23 PERR# PCI_PERR 4
PIRQ C# 13 POWER CLASS 99
10 PIRQC# PCI_INTA/CINT PC0
1394_PME# 21 98 R507 56.2_1%_0603 C625
31 1394_PME# PCI_PME/CSTSCHG PC1
S ERR# 57 97 Molex SD-54030-0411
10,20,23 SERR# PCI_SERR PC2
P AR 58 0.33UF_0603
10,20,23 PAR PCI_PAR
12 116 TPBIAS0 R508
3 11,20,23,27,31 CLKRUN#
P CIRST# PCI_CLKRUN PHY PORT 1 TPBIAS0 56.2_1%_0603 TPA0+ 3
4,10,14,20,21,23,25,27,31,34 PCIRST# 85 PCI_RST TPA0+ 115
114 TPA0-
TPA0- TPB0+
TPB0 + 113
112 TPB0-
TPB0 -
94 R509 1 2 220
TEST9 R512 1
TEST8 95 2 220 R510 R511
14 56.2_1%_0603 5.11K_1%_0603
20,21,23 CBRST# G_RST
101 R513 1 2 220
TEST3 R514 220
PLLGND1
89 102 1 2
REG_EN
REG18
GPIO2 TEST1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103
R518 R519
220 220
1
@0.1UF @0.1UF
1
4 4
R520 change to 0
@22 ohm to short
to GND
2
TSB43AB22 USE
C629
Compal Electronics, Inc.
Title
@10PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 19 of 44
A B C D E
A B C D E
+3VS
CardBus Controller
1
C634 C635 C636 C637
4.7UF_10V_0805 .1UF .1UF .1UF
2
OZ6933T (uBGA) +3V +3VS +3VS CBRST# 19,21,23
+3VS
S1_IOWR#
S1_IORD#
C642
S1_CE2#
S1_OE#
S1_D10
S1_D15
S1_D13
S1_D12
S1_D11
1 1
S1_A25
W15 S1_A24
U11 S1_A17
S1_A10
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
W11 S1_A9
S1_A11
M19 S1_D9
M18 S1_D1
M15 S1_D8
M17 S1_D0
S1_D7
S1_D6
S1_D5
S1_D4
S1_D3
.1UF
S1_VCC
R10
N18
N17
R19
N14
R17
R14
U15
U10
B10
P18
P14
P10
V10
10,19,23 AD[0..31]
T19
L15
L18
J18
W9
W7
W6
M6
R9
U9
U8
R8
U7
U6
P5
P9
V7
P8
U58
F2
J5
C643 C644 C645
GRST#
A_D10/CAD31
A_D9/CAD30
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A25/CAD19
A_A7/CAD18
A_A24/CAD17
A_A17/CAD16
A_IOWR/CAD15
A_A9/CAD14
A_IORD#/CAD13
A_A11/CAD12
A_OE#/CAD11
A_CE2#/CAD10
A_A10/CAD9
A_D15/CAD8
A_D7/CAD7
A_D13/CAD6
A_D6/CAD5
A_D12/CAD4
A_D5/CAD3
A_D11/CAD2
A_D4/CAD1
A_D3/CAD0
AUX_VCC
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
CORE_VCC
CORE_VCC
CORE_VCC
AD31 E1
AD30 AD31 .1UF .1UF .1UF
E2
AD29 AD30
F3 R7
AD28 AD29 A_SOCKET_VCC
F1 AD28 A_SOCKET_VCC R13
AD27 G5
AD26 AD27
H6 AD26
AD25 G3 N15
AD24 AD25 A_REG#/CCBE3# S1_A12 S1_REG# 21
G2 AD24 A_A12/CCBE2# V14
S1_IOWR# AD23 H2 V11 S1_A8 S1_A[0..25]
S1_IORD# S1_IOWR# 21 AD22 AD23 A_A8/CCBE1# S1_A[0..25] 21
S1_IORD# 21 H1 AD22 A_CE1#/CCBE0# W8
S1_OE# AD21 R531 S1_CE1# 21
S1_OE# 21 J1 AD21 S1_D[0..15] 21
S1_CE2# AD20 J2 V13 1 2 33 S1_A16
S1_CE2# 21 AD20 A_A16/CCLK
AD19
AD18
J3
J6
AD19 O 2 MICRO A_A23/CFRAME# U14
P13
S1_A23
S1_A15
AD18 A_A15/CIRDY#
AD17
AD16
K1
K2
AD17 CARDBUS CONTROLLER A_A22/CTRDY# W14
U13
S1_A22
S1_A21
AD16 A_A21/CDEVSEL#
AD15 M5 AD15 OZ6933 209PIN CSP A_A20/CSTOP# W13 S1_A20
Slot
AD14 N2 R11 S1_A13
AD13 AD14 A_A13/CPAR S1_A14 S2_A[0..25]
N1 AD13 A_A14/CPERR V12 S2_A[0..25] 21
AD12 N3 R18
AD11 AD12 A_WAIT#/CSERR# S1_WAIT# 21 S2_D[0..15]
N6 AD11 A_INPACK#/CREQ# P17 S2_D[0..15] 21
AD10 S1_INPACK# 21
P1 R12
A
AD9 AD10 A_WE#/CGNT# S1_WE# 21
P3 AD9 A_RDY_IRQ#/CINT# P12 S1_RDY# 21
AD8 N5 U12 S1_A19
2 AD7 AD8 A_A19/CBLOCK# 2
P6 AD7 A_WP/CCLKRUN# L17 S1_WP 21
AD6 R2 P15
AD5 AD6 A_RST/CRESET# S1_D2 S1_RST 21
R3 AD5 A_D2/RFU L19
AD4 T1 V8 S1_D14
AD3 AD4 A_D14/RFU S1_A18
W4 AD3 A_A18/RFU P11
AD2 R6 W10
AD1 AD2 A_VS1/CVS1 S1_VS1 21
U5 AD1 A_VS2/CVS2 W16
AD0 S1_VS2 21
P7 V6
AD0 A_CD1#/CCD1# S1_CD1# 21
L14
A_CD2#/CCD2# S1_CD2# 21
M14
A_BVD2/CAUDIO S1_BVD2 21
10,19,23 C/BE#3 G1 N19
C/BE3# A_BVD1/CSTSCHG S1_BVD1 21
10,19,23 C/BE#2 K3
C/BE2#
10,19,23 C/BE#1 M3 F8
C/BE1# B_BVD1/CSTSCHG S2_BVD1 21
10,19,23 C/BE#0 R1 C8
PCI
C/BE0# B_BVD2/CAUDIO S2_BVD2 21
C6
B_CD2#/CCD2# S2_CD2# 21
J15
AD16 R532 1 B_CD1#/CCD1# S2_CD1# 21
2 100 H5 A10
CLK_PCI_CB IDSEL B_VS2/CVS2 S2_VS2 21
13 PCLK_PCM E3 E18
PCI_CLK B_VS1/CVS1 S2_A18 S2_VS1 21
10,19,23 DEVSEL# L3 C14
DEVSEL# B_A18/RFU S2_D14
10,19,23 FRAME# K6 G17
FRAME# B_D14/RFU S2_D2
10,19,23 IR D Y# L1 F7
IRDY# B_D2/RFU
10,19,23 TRDY# L2 C10
TRDY# B_RESET/CRESET# S2_RST 21
10,19,23 STOP# L5 A5
STOP# B_WP/CCLKRUN# S2_A19 S2_WP 21
10,19,23 PAR M2 A14
PAR B_A19/CBLOCK#
10,19,23 PERR# L6 F12
PERR# B_RDY_IRQ#/CINT# S2_RDY# 21
10,19,23 SERR# M1 E13
SERR# B_WE#/CGNT# S2_WE# 21
Slot B
10 REQ#3 G6 C9
PCI_REQ# B_INPACK#/CREQ# S2_INPACK# 21
10 GNT#3 F5 A9
PCI_GNT# B_WAIT#/CSERR# S2_A14 S2_WAIT# 21
10,14,23 PIRQA# B5 A15
IRQ9/INTA# B_A14/CPERR# S2_A13
10 PIRQB# F6 C15
IRQ4/INTB# B_A13/CPAR S2_A20
10 PLOCK# V5 C13
LOCK# B_A20/CSTOP# S2_A21
4,10,14,19,21,23,25,27,31,34 PCIRST# D1 B13
3 RST# B_A21/CDEVSEL# S2_A22 3
A13
B_A22/CTRDY# S2_A15
31 PCM_PME# B14 C12
IRQ12/PME# B_A15/CIRDY# S2_A23
11,19,23,27,31 CLKRUN# A4 B12
IRQ14/CLKRUN# B_A23/CFRAME# S2_A16
31 RING# V9 E12 1 2
IRQ15/RING_OUT B_A16/CCLK R533 33
30 PCM_SPK# K19
SPKR_OUT#
32 PCM1_LED J19 G14
LED_OUT/SKT_ACTIVITY B_CE1#/CCBE0# S2_A8 S2_CE1# 21
32 PCM2_LED E8 A16
SKTB_ACTV B_A8/CCBE1# S2_A12
A12
B_A12/CCBE2#
SLATCH/B_VCC_5#
CLK_PCI_CB
IRQ10/B_VPP_VCC
C5 F9
SDATA/B_VCC_3#
B_IOWR#/CAD15
E6
SCLK/A_VCC_5#
B_IORD#/CAD13
IRQ7/SIN#/B_VPP_PGM
2
B_CE2#/CAD10
G19
B_OE#/CAD11
B_D10/CAD31
B_A25/CAD19
B_A24/CAD17
B_A17/CAD16
B_A11/CAD12
B_SKT_VCC S2_VCC
B_D9/CAD30
B_D1/CAD29
B_D8/CAD28
B_D0/CAD27
B_D15/CAD8
B_D13/CAD6
B_D12/CAD4
B_D11/CAD2
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A7/CAD18
B_A9/CAD14
B_A10/CAD9
R534
IRQ3/VCC3#
F13
B_D7/CAD7
B_D6/CAD5
B_D5/CAD3
B_D4/CAD1
B_D3/CAD0
B_SKT_VCC
E7
@33 B_SKT_VCC
C646 C647 C648
GND
GND
GND
GND
GND
GND
GND
1
NC
NC
P2
W5
V15
K18
E11
B15
E5
W12
K14
K15
K17
P19
F19
B6
A6
B7
C7
A7
B8
A8
E9
B9
F10
E10
F11
C11
B11
A11
E14
D19
F15
E17
F14
G15
E19
F18
F17
G18
H15
H14
H17
H18
H19
J14
J17
S2_D10
S2_D15
S2_D13
S2_D12
S2_D11
S2_A25
S2_A24
S2_A17
S2_A11
S2_A10
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A9
S2_D9
S2_D1
S2_D8
S2_D0
S2_D7
S2_D6
S2_D5
S2_D4
S2_D3
S2_CE2#
SLATCH 21 S2_OE# S2_CE2# 21
SLDATA 21 S2_OE# 21
S2_IORD#
RTCCLK 11,21 S2_IORD# 21
S2_IOWR#
S2_IOWR# 21
4 4
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE Custom 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
Date: 星期二, 十一 ?26, 2002 Sheet 20 of 44
A B C D E
PCMCIA POWER CTRL. CARDBUS
SOCKET
+5V_CBS JP26
1
25 8 S1_D10 A5 B5 S2_D10
VCC_5V AVPP C528 S1_D2 a66 b66 S2_D2
AVCC 9 A6 a32 b32 B6
C502 7 10 S1_D9 A7 B7 S2_D9
2
12V AVCC a65 b65
1 2 1UF_25V_0805 24 12V AVCC 11 4.7UF_10V_0805 S1_D1 A8 a31 b31 B8 S2_D1
A9 GND GND B9
1 2 C503 1 5V BVPP 23 S2_VPP S2_VPP S1_D8 A10 a64 b64 B10 S2_D8
. 1UF 2 20 S1_D0 A11 B11 S2_D0
5V BVCC W=40mils a30 b30
1 2 C529 30 5V BVCC 21 S2_VCC 20 S1_BVD1
S1_BVD1 A12 a63 b63 B12 S2_BVD1
S2_BVD1 20
. 1UF 22 S1_A0 A13 B13 S2_A0
BVCC a29 b29
1
1 2 C530 15 3.3V 20 S1_BVD2
S1_BVD2 A14 a62 b62 B14 S2_BVD2
S2_BVD2 20
. 1UF 16 6 C507 S1_A1 A15 B15 S2_A1
3.3V RESET a28 b28
1 2 C504 17 14 S1_REG# A16 B16 S2_REG# S2_REG# 20
2
. 1UF 3.3V RESET# 4.7UF_10V_0805 20 S1_REG# a61 b61
A17 GND GND B17
1 2 C531 20 SLDATA 3 DATA NC 26 S1_A2 A18 a27 b27 B18 S2_A2
. 1UF 5 27 S1_INPACK# A19 B19 S2_INPACK#
20 SLATCH LATCH NC 20 S1_INPACK# a60 b60 S2_INPACK# 20
1 2 C505 11,20 RTCCLK 4 CLOCK NC 28 S1_A3 A20 a26 b26 B20 S2_A3
. 1UF 29 CBRST# S1_WAIT# A21 B21 S2_WAIT#
NC 20 S1_WAIT# S1_A4 a59 b59 S2_A4 S2_WAIT# 20
13 APWR_GOOD# A22 a25 b25 B22
19 S1_RST A23 B23 S2_RST
BPWR_GOOD# 20 S1_RST S1_A5 a58 b58 S2_A5 S2_RST 20
32 OCCB# 18 OC# GND 12 A24 a24 b24 B24
A25 GND GND B25
+3V 1 2 S1_VS2 A26 B26 S2_VS2
20 S1_VS2 S1_A6 a57 b57 S2_A6 S2_VS2 20
TPS2206AI/TPS2216 A27 B27
R363 S1_A25 a23 b23 S2_A25
A28 a56 b56 B28
100K S1_A7 A29 B29 S2_A7
S1_A24 a22 b22 S2_A24
A30 a55 b55 B30
S1_A12 A31 B31 S2_A12
S1_A23 a21 b21 S2_A23
A32 a54 b54 B32
A33 GND GND B33
S1_A15 A34 B34 S2_A15
S1_A22 a20 b20 S2_A22
A35 a53 b53 B35
S1_A16 A36 B36 S2_A16
a19 b19
S1_VPP A37 a52/a18 b52/b18 B37 S2_VPP
A38 none none B38
S1_VCC A39 a51/a17 b51/b17 B39 S2_VCC
S1_RD Y# A40 B40 S2_RD Y#
20 S1_RDY# S1_A21 a16 b16 S2_A21 S2_RDY# 20
A41 a50 b50 B41
S1_WE# A42 B42 S2_WE#
20 S1_WE# a15 b15 S2_WE# 20
A43 GND GND B43
S1_A20 A44 B44 S2_A20
S1_A14 a49 b49 S2_A14
A45 a14 b14 B45
S1_A19 A46 B46 S2_A19
S1_A13 a48 b48 S2_A13
A47 a13 b13 B47
S 1_A[0..25] +3V S1_A18 A48 B48 S2_A18
20 S1_A[0..25] S1_ D[0..15] a47 b47
S1_A8 A49 B49 S2_A8
20 S1_D[0..15] S 2_A[0..25] S1_A17 a12 b12 S2_A17
20 S2_A[0..25] A50 a46 b46 B50
S2_ D[0..15] A51 B51
20 S2_D[0..15] GND GND
1
A54 B54
2
a10 b10
1
S1_D14 a6 b6 S2_D14
A64 a40 b40 B64
S1_D6 A65 B65 S2_D6
+3V S1_D13 a5 b5 S2_D13
31 G_RST# 1 2 A66 a39 b39 B66
R233 @0 A67 B67
+5V +5V_CBS S1_D5 GND GND S2_D5
A68 a4 b4 B68
W=30mils J2 S1_D12 S2_D12
S1_VPP A69 a38 b38 B69
1 2 S1_D4 A70 B70 S2_D4
a3 b3
1
4 5 @100K_1%
@2.2UF_0805
2
SHDN# GND
@MAX1857 C211
1
C276 @1000PF
10UF_1206 56PF . 1UF 1000PF
2
1.25V C331
S1_CD2# 1 2
U41 @1000PF
1 8 C210
IN OUT
2
S2_CD1# 1 2
S2_VCC 2 7 R174 @1000PF
IN OUT @34K_1%
C330
1 2 3 6
R401 @10K RST# SET S2_CD2# 1 2 Compal Electronics, Inc.
1
1 2 4 5 @1000PF
SHDN# GND
1
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 21 of 44
5 4 3 2 1
L10
U4 4.7UH_0805
19 LA N_VCC 2 1
VCCR +3V
VCCR 23
1
36 20 C61
+3V VCCP VSSR
D 40 22 C62 D
2
VCCP VSSR 1000PF 0.1UF
14 VCCT
17 VCCT
25 C64
VCC LINK10_100# 4.7UF_1206
1 VCC LILED# 27
9 32 ACTIVITY#
VCCT ACTLED#
12 VCCT SPDLED# 31
2 VCCA
7 VCCA2
5 R33 1 2 619
RBIAS100
RBIAS10 4 1 2
R34 562
16 LA N_RD-
RDN U2
12 LAN_RST 42 LAN_RSTSYNC
1 2 39 15 LAN_RD+ R31 1 2 100_1%
12 LAN_CLK LAN_CLK RDP
R79 33 LAN_RD+ 1 16 RJ45_RX+
LA N_RD- RD+ RX+ RJ45_RX-
12 LAN_TXD2 45 LAN_TXD2 2 RD- RX- 15
44 11 LAN_TD- 3 14
12 LAN_TXD1 LAN_TXD1 TDN CT CT
12 LAN_TXD0 43 LAN_TXD0 4 NC NC 13
10 LAN_TD+ R32 1 2 100_1% 5 12
LANRXD2 TDP NC NC
12 LAN_RXD2 1 2 37 LAN_RXD2 6 CT CT 11
R85 1 2 33 LANRXD1 35 LAN_TD+ 7 10 RJ45_TX+
12 LAN_RXD1 LAN_RXD1 TD+ TX+
R84 1 2 33 LANRXD0 34 LAN_TD- 8 9 RJ45_TX-
12 LAN_RXD0 LAN_RXD0 TD- TX-
R78 33
ADV10 41
1
Pulse H0013
33 30 R83 1 2 100
VSSP ISOL_TCK R77
38 VSSP ISOL_TEX 29 1 2 100 R266 R267
C 13 28 R76 1 2 100 75 75 C
VSS ISOL_TI
8 26
2
VSS TOUT R J45_PR
18 VSS
24 VSS
1
48 VSS TESTEN 21
3 C375 C63
VSSA
2
6 0.01UF @0.01UF
2
VSSA2 R30
X2
X1
INTEL-82562ET 100
47
46
1
Y1
25 MHz Q2
LAN_X1 LAN_X2 DTA114YKA
JP19
E
1
C132 C131 3 1 1 2 12
+3V Amber LED+
47K
R6 300
C
22PF 22PF 11
2
Amber LED-
10K
16
B
SHLD4
8 PR4-
15
2
SHLD3
7 PR4+
ACTIVITY#
RJ45_RX- 6 PR2-
5 PR3-
B B
4 PR3+
RJ45_RX+ 3 PR2+
RJ45_TX- 2 PR1-
SHLD2 14
RJ45_TX+ 1
Q1 PR1+
SHLD1 13
DTA114YKA 10 Green LED-
E
+3V 3 1 1 2 9 Green LED+
47K
R3 300
C
AMP RJ45/RJ11 with LED
10K
B
2
R1 R2
2
LINK10_100# 75 75
1
C1
R J45_PR 1 2 LAN GND
+3V
1
C11 C3
1000PF_2KV_1206
. 1UF 4.7UF_10V_0805
2
1
C389 C60 C390 C119 C79 C386 C89 C387 C80 C377
4.7UF_1206 4.7UF_1206 . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF . 1UF
2
A A
Termination plane should be copled to chassis ground
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 22 of 44
5 4 3 2 1
Q3
+3VALW @SI2301DS +3.3VAUX
R29
D
3 1 1 2 +3V
0
1
G
2
C44 C58
@1UF_25V_0805 @1UF_25V_0805
2
R26
31 EN_WOL# 1 2 +5VALW
@100K
+3V
5
JP20
1 TIP 1 2 RING
32,34 W L_OFF# 1 2
4 KEY KEY
2 3 4 1 2 P CIRST#
32,34 KILL_SW# LAN RESERVED 3 4 PCIRST# 4,10,14,19,20,21,25,27,31,34
5 6 R35 0
U3 5 6 M INI_RST#
7 8 1 2 CBRST# 19,20,21
3
1
73 74 C49 C37 C38
10,19,20 C/BE#1 AD14 73 74 AD15 C39
75 75 76 76
77 78 AD13 @1000PF @.1UF @.1UF @10U_1210
2
AD12 77 78 AD11
79 79 80 80
AD10 81 82
81 82 A D9
83 83 84 84
A D8 85 86
PCL K_MINI A D7 85 86 C/BE#0 10,19,20
87 87 88 88
89 90 A D6
A D5 89 90 A D4
91 91 92 92 +3VS_MINIPCI
1
93 94 A D2
R27 A D3 93 94 A D0
95 95 96 96
1
10 W=30mils 97 98 C36 C54 C52 C363 C51
+5VS_MINIPCI 97 98
A D1 99 100 C53
99 100 . 1UF . 1UF . 1UF . 1UF . 1UF 10UF_1210
101 102
1 2
2
101 102
103 103 104 104
105 105 106 106
C50 107 108
33PF 107 108
109 110
2
109 110
111 111 112 112
113 113 114 114
115 115 116 116
117 117 118 118
119 119 120 120
121 121 122 122
+5VS 1 2 W=30mils 123 123 124 124 W=20mils
+3.3VAUX
L5 0
1
C55
0603 Mini-PCI SLOT
. 1UF
+5VS_MINIPCI
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
AD[0..31] PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
AD[0..31] 10,19,20 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 23 of 44
CHB1608U301
+5VOZ 1 2
L41
32,34 STOPBTN# 1 2 1 2 +5VCD
R223 0 L42
CHB1608U301
D23 +5VOZ C302 C554 C557 C576
1 2 OZ_STOPBTN# . 1UF . 1UF . 1UF . 1UF
32 CD_STOPBTN#
@RB751V
CDD[0..15]
CDD[0..15] 25
U42
44
58
9
OZ168
SDD[0..15]
VDD
VDD
VDD
SDD[0..15] 11
SD D0 76 77 C DD0
SD D1 HDD0 CDD0 C DD1
78 HDD1 CDD1 79
SD D2 81 82 C DD2
SD D3 HDD2 CDD2 C DD3
83 HDD3 CDD3 84
SD D4 86 87 C DD4
SD D5 HDD4 CDD4 C DD5
90 HDD5 CDD5 91
SD D6 95 96 C DD6
SD D7 HDD6 CDD6 C DD7
97 HDD7 CDD7 98
SD D8 2 1 C DD8
SD D9 HDD8 CDD8 C DD9
4 HDD9 CDD9 3
S DD10 8 7 CDD 10
S DD11 HDD10 CDD10 CDD 11
11 HDD11 CDD11 10
S DD12 15 14 CDD 12
S DD13 HDD12 CDD12 CDD 13
18 HDD13 CDD13 17
S DD14 20 19 CDD 14
S DD15 HDD14 CDD14 CDD 15
22 HDD15 CDD15 21
+5VCD
74 75 C D_IRQ 8P4R-10K
X4 10 IRQ15 HINTRQ CHINTRQ C D _IRQ 25
SDD REQ 12 13 CD_D REQ
11 SDDREQ HDMARQ CDMARQ CD_DREQ 25
OSC1 OSC2 SD DACK# 88 89 CD_ DACK# RP48
11 SDDACK# HDMACK# CHDMACK# CD_DACK# 25
PLAYBTN# 1 8
FR DBTN# 2 7
8MHZ
24 23 C D_RSTDRV# REVBTN# 3 6
R449 25 SIDE_RST# HRESET# CRESET# CD_RSTDRV# 25
59 60 CDA SPN INTN 4 5
HDASPN CDASPN
48 47 8P4R-10K
HSYNC SSYNC
1M 53 HBIT_CLK SBIT_CLK 52
55 54 RP45
HDATA_OUT SDATA_OUT C DD7
50 HDATA_IN SDATA_IN 49 1 16
C573 C574 46 45 C DD6 2 15
HACRSTN SACRSTN C DD5
10PF 10PF 1 2 +5VCD 3 14
DM_ON 28 R215 @10K C DD4 4 13
PLAYBTN# PAV_EN C DD3
34 PLAYBTN# 36 PLAY/PAUSE PWR_CTL 51 1 2 5 12
FR DBTN# 35 R216 10K C DD2 6 11
34 FRDBTN# FFORWARD
REVBTN# 34 1 2 C DD1 7 10
34 REVBTN# REWIND MEDIA_DETECT 32
OZ_STOPBTN# 37 80 1 2 ISCD ROM R177 0 C DD0 8 9
STOP/EJECT ISCDROM R176 @0
10UF_1206 39 GPIO_1 @16P8R_4.7K
C336 DM_ON GPIO[1]/VOL_UP GPIO_0
29 PCSYSTEM_OFF GPIO[0]/VOL_DN 40
R239 10K INTN 25 RP47
32 CD_INTA# INTN R207 @1K C DD8
+5VCD 1 2 30 RESET# 8 9
56 1 2 C DD9 7 10
D25 MODE0 MODE1 CDD 10
MODE1 57 6 11
1 2 1 3 26 CDD 11 5 12
2,31 EC_SMD2 SDATA
Q50 CDD 12 4 13
2N7002 38 1 2 CDD 13 3 14
RB751V PAVMODE CDD 14
27 R227 10K 2 15
2
SCLK CDD 15
2,31 EC_SMC2 1 3 CSN 41 1 16
INCN 42
1
R428 R399 1K
100K +5VCD
2
+5VALW 1 2
+5VCD
16
33
65
85
92
R454 CIOCS16# 1 2
R477 +5VCD 100K R411 47K
100K +5VCD +5VCD
C DD7 1 2
C334 C333 R398 10K
10UF_1206 1UF_0805 U16 R228 DM_ON CD_D REQ 1 2
DM_ON 29
1 8 100K R206 5.6K
+5VALW S D
1
2 7 C321 C317 Q54
R230 240K S D 10UF_1206 . 1UF SUSP#
3 S D 6 2
1 2 4 5 2N7002
+5VALW G D DM_ON#
DM_ON# 29 3
SI4425DY
1
C335 Q17
1 2 DM_ON 2
2N7002
1
DTC124EK DTC124EK DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 24 of 44
+5VS
+5VS IDE,CD-ROM Module CONN.
C585
1
C584 C587
C351
1
C350 C594 C586
C593 1000PF 10UF_1210 1UF_25V_0805 . 1UF
2
1000PF 10UF_1210 1UF_25V_0805 . 1UF
2
Place component's closely FDD CONN.
Place component's closely IDE CONN. +5VS JP11
1 1
INDEX# 2
27 INDEX# 2
3 3
JP13 D RV0#
27,32 DRV0# 4 4
PIDE_RST# +5VS 5
PD D7 1 2 PD D8 RP50 DS KCHG# 5
3 4 27 DSKCHG# 6 6
PD D6 PD D9 8 1 F D D IR# 7
PD D5 5 6 P DD10 D RV0# 7
7 8 7 2 8 8
PD D4 P DD11 6 3 DS KCHG# 9
PD D3 9 10 P DD12 MTR0# MTR0# 9
11 12 5 4 27 MTR0# 10 10
PD D2 P DD13 11
PD D1 13 14 P DD14 8P4R_1K F D D IR# 11
15 16 27 F D D IR# 12 12
PD D0 P DD15 3MODE# 13
17 18 27 3MODE# STEP# 13
19 20 27 STEP# 14 14
11 PDDREQ 21 22 15 15
P DIOW # WDATA# 16
11 PDIOW # 23 24 27 WDATA# 16
PDIO R# 17
11 PDIOR# 25 26 PCSEL WGATE# 17
11 P D IO R D Y 27 28 1 2 27 WGATE# 18 18
R244 470 RP51
11 PDDACK# 29 30 19 19
IR Q14 STEP# 6 5 TRACK0# 20
10 IRQ14 31 32 +5VS 27 TRACK0# 20
PDA1 WDATA# 7 4 INDEX# 21
11 PDA1 33 34 21
PDA0 PDA2 WGATE# 8 3 TRACK0# WP# 22
11 PDA0 35 36 PDA2 11 27 WP# 22
PDCS1# PDCS3# HDSEL# 9 2 WP# 23
11 PDCS1# 37 38 PDCS3# 11 23
10 1 RDATA# RDATA# 24
32 PHDD_LED# 39 40 +5VS 27 RDATA# 24
+5VS 41 42 +5VS 25 25
1 2 HDSEL# 26
+5VS 43 44 27 HDSEL# 26
R243 100K 10P8R_1K
85201-2605
HDD 44P
P DIOW # PDIO R#
1
R535 R536
PDD[0..15] 10 10
11 PDD[0..15] CDD[0..15]
24 CDD[0..15]
1 2
1 2
C765 C766
15PF 15PF
2
JP25
29 INT_CD_L 1 2 INT_CD_R 29
29 CD_AGND 3 4
C D_RSTDRV# C DD8
24 CD_RSTDRV# 5 6
C DD7 C DD9
C DD6 7 8 CDD 10 +5VS
C DD5 9 10 CDD 11 C342
C DD4 11 12 CDD 12
13 14 2 1
C DD3 CDD 13
C DD2 15 16 CDD 14 0.1UF U18
17 18
5
C DD1 CDD 15
C DD0 19 20 P CIRST#
21 22 CD_DREQ 24 4,10,14,19,20,21,23,27,31,34 PCIRST# 1
4 PIDE_RST#
23 24 CD_SIOR# 24
24 CD_SIOW # 25 26 10 PIDERST# 2
24 C D _ S IORDY 27 28 CD_DACK# 24
24 C D_IRQ R189
3
29 30 PD IAG# 100K 7SH08FU
24 CD_SBA1 31 32 1 2 +5VCD
24 CD_SBA0 33 34 CD_SBA2 24
24 CD_SCS1# 35 36 W=80mils
CD_SCS3# 24
SH DD_LED#
32 SHDD_LED# 37 38
39 40 +5VCD
+5VCD 41 42
43 44 1 2 +5VCD +5VS
45 46 C311 . 1UF C590
47 48
49 50 2 1
1
1 2 SH DD_LED#
+5VCD
R452 0.1UF U52
100K
5
R188 470 CD-ROM CONN.
P CIRST# 1
4 SIDE_RST#
SIDE_RST# 24
2
10 SIDERST# 2
3
7SH08FU
W=80mils
+5VCD
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 25 of 44
JP21
29 MD_MIC 1 2 MDC_DN# 32
3 4 MD_SPK 29
5 6
7 8 +5VS_MDC
9 10 1 2 +5VS
L15 CHB1608B121
11 12
13 14
15 16 1 2 +3VS
R117 10K
+3.3VAUX 17 18
19 20
+3VS 1 2 +3VS_MDC 21 22 IA C _ SYNC 11,29
L13 CHB1608B121 1 2
11,29 IAC_SDATAO 23 24 R476 0 1 2
11,29 IAC_RST# 25 26 IAC_SDATAI1 11
R118 22
27 28
29 30 1 2 IAC_BITCLK 11,29
R119 22
AMP 108-5424
+5V_PRN
LPTSLCT
LPTPE
PARALLEL PORT
L PTBUSY
LPTACK#
+5V_PRN
10
9
8
7
6
CP1
RP2 AFD#/3M# 1 8
10P8R-2.7K D6 LPTERR# 2 7
2 1 LPTINIT# 3 6
+5VS LPTSLCTIN# 4 5
RB420D
R5 8P4C-220PF
2.2K C4 CP2
1
2
3
4
5
220PF LPTSLCT 4 5
+5V_PRN R4 LPTPE 3 6
LPTSTB# L PTBUSY 2 7
AFD#/3M# 27 LPTSTB# LPTACK# 1 8
LPTERR# AFD#/3M# 33
LPTINIT# 8P4C-220PF
LPTSLCTIN# R245 1 CP4
14 F D0 1 8
27 LPTAFD# F D0 F D1
33 2 2 7
LPTERR# 15 F D2 3 6
27 LPTERR# F D1 F D3
3 4 5
+5V_PRN LPTINIT# 16
R246 F D2 4 8P4C-220PF
F D4 33 LPTSLCTIN# 17 CP3
F D5 1 2 LPTINIT# F D3 5 F D4 1 8
F D6 27 INIT# F D5
18 2 7
F D7 R247 F D4 6 F D6 3 6
1 33 2 LPTSLCTIN# 19 F D7 4 5
27 SLCTIN# F D5 7
8P4C-220PF
10
20
9
8
7
6
RP23 F D6 8
RP22 LPD0 1 8 F D0 21 JP14
10P8R-2.7K LPD1 2 7 F D1 F D7 9
LPD2 F D2 LPTCN-25
3 6 22
LPD3 4 5 F D3 LPTACK# 10
27 LPTACK#
23
8P4R-68 RP1 L PTBUSY 11
27 LPTBUSY
LPD7 1 8 F D7 24
1
2
3
4
5
LPD6 2 7 F D6 LPTPE 12
LPD5 F D5 27 LPTPE
+5V_PRN 3 6 25
LPD4 4 5 F D4 LPTSLCT 13
F D3 27 LPTSLCT
F D2 8P4R-68
F D1
F D0
LPD[0 ..7]
27 LPD[0..7]
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 26 of 44
A B C D E
65 14 TRACK0#
VCC TRK0# TRACK0# 25
R242 R237 93 3 MTR0#
VCC MTR0# MTR0# 25
33 DRVDEN0 1 3MODE# 25
1
2 1
10V VSS
76 VSS GPIO11/SYSOPT 49 1 2
C340 C332 R214 1K
1
15PF 22PF
SMsC LPC47N227 Base I/O Address
* 0 = 02Eh
1 = 04Eh
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 27 of 44
A B C D E
USB_VCCA
1
C740 +
C741
. 1UF 150UF_E
2
JP31 +3V
L55
0_0805 1
USB0_D- 1 2
11 USB0_D- 2
USB0_D+ 1 2
11 USB0_D+ 3
1
L54 USB_VCCA
0_0805 4 R570
S U YIN USB 100K
+5V
2
U56
1 GND OC1# 8 1 2 OVCUR#0 11
2 IN OUT1 7
3 6 R571
EN1# OUT2
1
C743 USBEN# 4 5 47
EN2# OC2#
1
. 1UF TPS2042
2
C742
2
. 1UF
USB_AS
W=40mils
1
C744 + C745
. 1UF 150UF_10V_E
2
L56 JP32
0_0805 1
USB1_D- U SB1D- VCC
11 USB1_D- 1 2 2 D-
USB1_D+ 1 2 USB1D+ 3 USB_AS USB_BS +3V
11 USB1_D+ D+
L57 4
0_0805 GND
SUYIN 2551A-04G5T
1
R482 R483
100K 100K
+5V
R484
2
U55 47
1 8 1 2 OV CUR#1
GND OC1# OVCUR#1 11
2 IN OUT1 7
3 EN1# OUT2 6
1
C597 4 5 1 2 OV CUR#3
+ EN2# OC2# OVCUR#3 11
1
C376 . 1UF TPS2042 R485 C598 C599
2
150UF_E R566 R567 47
100K 100K .1 UF . 1UF
2
USB_BS
2
1 2 USBEN#
11 USB_EN#
1
W=40mils R487
0 R488
1K
1
C746 + C747
. 1UF
2
150UF_10V_E
2
L58 JP33
0_0805 1
USB3_D- U SB3D- VCC
11 USB3_D- 1 2 2 D-
USB3_D+ 1 2 USB3D+ 3
11 USB3_D+ D+
0_0805 4
L59 GND
SUYIN 2551A_04G5T
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 28 of 44
AC97 Codec
+5VS
U51 C289
4 5 R_ INT_CD_L 3 1 1 3 LEFT
VIN VOUT VDDA 25 INT_CD_L
1
C580 C578 2 6 1UF_25V_0805 Q15 Q46
DELAY SENSE
1
C579 2N7002 2N7002
2
4.7UF_10V_0805 . 1UF 7 1
2
ERROR CNOISE 4.7UF_10V_0805 input to AMPLIFY
2
8 ON/OFF# GND 3
1
C577 C583
SI9182 R_INT_CD_R 3 1 1 3 RIGHT
25 INT_CD_R
. 1UF
2
1UF_25V_0805 Q57 Q47
2N7002 2N7002
2
DM_ON
24 DM_ON
+5VAMP_PU
R460 R202
0 10K
1 2 2 1 R_ INT_CD_L 3 1 1 3 CDROM_L
+3VS
1
Q49 Q48
R198 2N7002 2N7002
2
@10K
C591
10UF_1206 input to CS 4297A
2
R459
AVDD_AC97 10K
L18 R_INT _CD_R CD ROM_R
+5VAMP_PU 2 1 3 1 1 3
1 2 V DDC
VDDA
1
Q56 Q55
CHB2012U170 R438 R458 2N7002 2N7002
2
1 2 +3VS @10K
0
1
C310 C291 C561
2
1
1
4.7UF_10V_0805
. 1UF C559
. 1UF
2
2
4.7UF_10V_0805
2
DM_ON#
24 DM_ON#
25
38
9
U43 C542
2 1 1000PF
AVCC
AVCC
VCC
VCC
C304
AUD_VREF 1 2 1000PF
C297
14 35 LINEL 1 2 4.7UF_10V_0805 LEFT
AUX_L LINE_OUT_L LEFT 30
C290
15 36 L INER 1 2 4.7UF_10V_0805 RIGHT
AUX_R LINE_OUT_R RIGHT 30
C299
16 VIDEO_L MONO_OUT 37 1 2 1UF_0805 MD_MIC 26
C286
17 VIDEO_R HP_OUT_L 39 2 1 1000PF
2 1
R221 6.8K 23 41
LIN_IN_L HP_OUT_R
2 1
R451 6.8K 24 R423
LIN_IN_R
BIT_CLK 6 1 2 22 IAC_BITCLK 11,26
CDROM_L 2 1 CD _L_R 1 2 18 R422
R220 20K C567 1UF_25V_0805 CD_L
SDATA_IN 8 1 2 22 IAC_SDATAI 11
CD ROM_R 2 1 CD_R_R 1 2 20
R441 20K C569 1UF_25V_0805 CD_R C541
XTL_IN 2
CD_ GNA 1 2 19 22PF
C568 1UF_25V_0805 CD_GNA Y3
MIC 1 2 21
30 MIC MIC1 24.576 MHz
C565 1UF_25V_0805
1 2 0.01UF AUD_VREF 22 MIC2 XTL_OUT 3
C605 C545
2 1 1 2 13 29 1 2 22PF
26 MD_SPK PHONE AFLT1
R222 10K C566 1UF_25V_0805 C555
12 30 1000PF 1 2
30 MONO_IN PC_BEEP AFLT2 C549
28 1000PF 1 2
VREFOUT AUD_VREF
2 1 11 R203 0
11,26 IAC_RST# RESET#
R204 100 27
REFFLT
11,26 IA C _ SYNC 10 SYNC
FLT3D 32
11,26 IAC_SDATAO 5 SDATA_OUT
1
1
45 ID0# BPCFG 31
46 33 C558 C560
2
ID1# FLTI
1
34 . 1UF 1UF_25V_0805
2
FLTO C546
30 EAPD 47 EAPD# NC 43
44 R418 .01UF AUD_VREF
2
NC @100K L19 0_0805
48 S/PDIF_OUT
1
40 C547 1 2
1
NC
4 GND AGND 26
7 42 1000PF L43 0_0805
2
GND AGND
1 2
1
C319
CS4299A L39 0_0805 C318
1 2 . 1UF 4.7UF_10V_0805
2
2 1 CD_ GNA
25 CD_AGND
R219
3.3K
1
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 29 of 44
A B C D E
+5VCD
AMP & Audio Jack
+5VCD
1
2
+5VCD R387
2
SHUTDOW N#
1
1
C274 C269
1
Q45 JP7
1
2
INTSPK_L2 1
VR1 VOL_AMP 2
2 2 1
3
HS-1503MF 2N7002 SPEAER-R
R572
0
3
U14
7 22 JP9
PVDD SHUTDOWN# NBA_PLUG INTSPK_R1
18 PVDD SE/BTL# 15 2 1 +5VCD 1
19 14 C234 1 2 R157 100K INTSPK_R2
R172 100K VDD PC-BEEP . 1UF 2
BYPASS 11
1 2 2 9 INTSPK_L2 SPEAKER-L
PC-ENABLE LOUT-
2
VOL_AMP 3 16 INTSPK_R2
R453 INTSPK_L1 VOLUME ROUT-
4 LOUT+ LIN 10
1K INTSPK_R1 21 8
ROUT+ RIN
29 LEFT 1 2 5 LLINEIN
C272 .47UF 23 1
1
RLINEIN GND
1
1 2 6 12 C522 C524 C523
29 RIGHT LHPIN GND
20 RHPIN GND 13
C232 .47UF 24 .47UF .47UF .47UF
2
C273 .47UF GND
17 CLK
1 2
C235
1
1 2 TPA0132
2
1
R573
3 3
2.4K
2
JP8
5
C518 NBA_PLUG 4
150UF_D L38
+ +
+3V +3V INTSPK_R1 1 2 1 2 1 2 INTSPK_R1-3 3
R393 47 FBM-11-160808-700T 6
31 BEEP#
VDDA INTSPK_L1 1 2 1 2 1 2 INTSPK_L1-3 2
1
1
100K 150UF_D C536 C527
. 1UF R224 PHONEJACK
10K 330PF 330PF
14
2
2
4
U48E
C328 R236
2
5 6 1 2 11 10 1 2 1 2
R210 8.2K
560
1
2 74LVC14 1 UF C575 2
1
74LVC125 .22UF
2
AVDD_AC97
2
C320
1 2 MO NO_IN R377
MONO_IN 29
1
18K_1%
1
1 2 1 2 2 2SC2411EK
20 PCM_SPK#
1
Q51 R212 1 2
3
560
1
1 UF 2SC2411EK 2.4K R382
3
18K_1%
R381 C512
1
2
100K 1 UF
1
+3V
R378 R481 JP6
@2.2K 2.2K 5
EXT.
14
2
U48F
C322
13 12 1 2 1
R226
2
3
6
MICPHONE
11 SPKR MIC
74LVC14 1 UF
560 29 MIC 1
L36
2 2
1
JACK
+3V POWER FBM-11-160808-700T
7
1
R231 C509 PHONEJACK
10K D24 220PF
2
1 1
RB751V
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 30 of 44
A B C D E
5 4 3 2 1
+3VALW 1 2
+3VALW R446 0 +3VALW 51AVCC +RTCVCC KB A[0..18]
32 KBA[0..18] +3V 1 2
1 2 5 1VDD ADB[0 ..7] R171 10K
+3VS 32 ADB[0..7] KSI[0..7]
R445 @0
KSI[0..7]
1
1
C279 C294 C562 C553 C517 C506 C563 KS O[0..15] MMO_ON 1 2
KSO[0..15] VR_ON 2,41
123
136
157
166
161
. 1UF . 1UF . 1UF . 1UF 1000PF 1000PF . 1UF D20 RB751V
16
34
45
95
2
2
U45
2 1
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD
AVCC
VBAT
KBA0 +3VS R442 10K
IOPH0/A0/ENV0 124
INVT_PWM 32 125 KBA1
51AVCC +3VALW 18 INVT_PWM IOPA0/PWM0 IOPH1/A1/ENV1 KBA2 ATFOUT# 1
30 BEEP# 33 IOPA1/PWM1 IOPH2/A2/BADDR0 126 2 ATF_INT# 11
+RTCVCC L37 For PWM EN_DFAN 36 127 KBA3
IOPA2/PWM2 IOPH3/A3/BADDR1 KBA4 D39 RB751V
D 1 2 37 ACOFF 37 IOPA3/PWM3 IOPH4/A4/TRIS 128 D
CHB1608U800 38 131 KBA5
11 LLBATT# IOPA4/PWM4 IOPH5/A5/SHBM
1
2
JP3 G20 C R Y1 20M IRE 0 0 0
5 GA20/IOPB5 32KX1/32KCLKOUT 158
1 1 +3VALW
RC L# 6 KBRST#/IOPB6
R413 * OBD 0 1 0
2 2 EC_TINIT#
32KX2 160 C R Y2 510K DEV 1 0 0
3 EC_TCK
13 PCLK_EC 18 PROG 1 1 0
3 LCLK
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
NC10
4 EC_TDO 47 X2
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
1
4 EC _TDI CLK SHBM(KBA5)=1: Enable shared memory with host BIOS
A 5 5 A
6 6 EC_TMS TRIS(KBA4)=1: While in IRE and OBD, float all the
1
7 1 2 1 2 PC97591VPC 32.768KHZ signals for clip-on ISE use
17
35
46
122
137
159
167
96
11
12
20
21
85
86
91
92
97
98
2
9 E C_USCLK L35
10
10 ECA GND 1 2
CHB1608U800
Compal Electronics, Inc.
@96212-1011S Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 31 of 44
5 4 3 2 1
+3VALW . 1UF
C474 +5VALW
C461
1 2
1 2
. 1UF
20
U31
20
2 18 ADB0 U27
VCC
34 BUTTON1# 1A1 1Y1
4 16 ADB1 +3VALW ADB0 3 2
VCC
34 INTERNET# 1A2 1Y2 D0 Q0 PW R_SUSP_LED# 34
6 14 ADB2 RP19 +3VALW ADB1 4 5
24 CD_INTA# 1A3 1Y3 C481 D1 Q1 ------>BT_DETACH MDC_DN# 26
PCM_LED 8 12 ADB3 ADB2 7 6
1A4 1Y4 ADB4 DD ADB3 D2 Q2 ------>RFOFF#
25 SHDD_LED# 11 2A1 2Y1 9 1 8 1 2 8 D3 Q3 9
13 7 ADB5 AA 2 7 ADB4 13 12 ------>BT_RESET#
25 PHDD_LED# 2A2 2Y2 D4 Q4
15 5 ADB6 BB 3 6 ADB5 14 15
25,27 DRV0# 2A3 2Y3 U34A D5 Q5 CD_PLAY 24
ADB7 CC . 1UF ADB6
14
21 OCCB# 17 2A4 2Y4 3 4 5 17 D6 Q6 16 HDD_LED# 34
74LVC32 ADB7 18 D7 Q7 19 CD_FDD_LED# 34
+3VALW 1 8P4R_100K KBA2 1
GND
1G AA
19 3 11
GND
U34B 2G SELIO# LARST# CLK
14
2 1 CLR
74LVC32 74LVC244
10
KBA1 4 74HCT273
10
6 CC
SELIO# 5
31 SELIO# R127 C180
+5VALW 1 2 1 2
7
20K 1UF_25V_0805
1
R141
100K
D11 +5VALW
2
C462
20 PCM1_LED 1
3 PCM_LED +3VALW 1 2
1
C475
20 PCM2_LED 2
R348 1 2 . 1UF
20
DAN202U 100K . 1UF U28
20
U32 ADB0 3 2
VCC
PW R_LED# 34
2
VCC
34 MP3_STOPBTN# 1A1 1Y1 D1 Q1 CDON_LED# 34
MP3_PLAYBTN# 4 16 ADB1 ADB2 7 6
34 MP3_PLAYBTN# 1A2 1Y2 D2 Q2 MP3_LED# 34
MP3_FRDBTN# 6 14 ADB2 ADB3 8 9
34 MP3_FRDBTN# 1A3 1Y3 D3 Q3 BATT_CHGI_LED# 34
8 12 ADB3 +3VALW ADB4 13 12
BT_WAKE_UP 1A4 1Y4 D4 Q4 W L_OFF# 23,34
11 9 ADB4 ADB5 14 15
24 MEDIA_DETECT 2A1 2Y1 U34C D5 Q5 CD_STOPBTN# 24
MP3_REVBTN# ADB5 ADB6
14
34 MP3_REVBTN# 13 2A2 2Y2 7 17 D6 Q6 16 PCMRST# 21
ADB6 74LVC32 ADB7
24,34 STOPBTN# 15 2A3 2Y3 5 18 D7 Q7 19 BATT_LOW_LED# 34
17 3 ADB7 KBA4 9
23,34 KILL_SW# 2A4 2Y4
8 BB 11
GND
+3VALW SELIO# LARST# CLK
1 10 1
GND
1G CLR
U34D 19 2G 74HCT273
14
10
74LVC32 74LVC244
10
KBA3 12
+3VALW 11 DD
SELIO# 13
1 2 BID0
7
1
BID2 C556
1 2
1
R466 @100K . 1UF R153
20
1 2 1 2 R430
1
U53 C199 . 1UF R152 1 2 +12VS 100K
1 2 BID0 2 18 ADB0 100K R424 R425 . 1UF
VCC
2
R467 @1K BID1 ADB1 U46
G
1 2 4 16
2
1A2 1Y2
5
R468
1 2 1K BID2 6 14 ADB2 Q11 4.7K 4.7K 8 VCC 1
2
+3VALW R469 1K2 1A3 1Y3 ADB3 A0
1 8 12 2 1 3 7 WC 2
2
C596 R470 1K 1A4 1Y4 ADB4 FWE# FLASH# 11 A1
1 2 11 9 4 6 SCL 3
S
2A1 2Y1 31,38 EC_SMC1 A2
1 2 1 2 R471 1K 13 7 ADB5 1 2N7002 5 SDA 4
2A2 2Y2 FW R# 31 31,38 EC_SMD1 GND
R472 1K 1 2 15 5 ADB6 U11
. 1UF R473 1K 2A3 2Y3 ADB7 7SH32FU NM24C16
1 2 17 3
3
2A4 2Y4
5
R474 1K
KBA5 2 1 2 1
GND
+3VALW 1G
1
4 R475 100K 19
SELIO# 2G
1
U54 74LVC244 R431
10
100K
3
7SH32FU
2
2MX32 BID:001
4MX32 BID:011 1
C480
2
. 1UF U25
C470 U30
1 2 KBA11 1 32 F RD#
+3VALW U26 A11 OE#
KBA18 1 32 KBA9 2 31 KBA10
NC VCC +3VALW A9 A10
. 1UF KBA16 2 31 FWE# KBA8 3 30 FSEL#
KBA11 F RD# KBA15 A16 WE* KBA17 KBA13 A8 CE# ADB7
1 A11 OE# 32 F RD# 31 3 A15 A17 30 4 A13 DQ7 29
KBA9 2 31 KBA10 KBA12 4 29 KBA14 KBA14 5 28 ADB6
KBA8 A9 A10 FSEL# KBA7 A12 A14 KBA13 KBA17 A14 DQ6 ADB5
3 A8 CE# 30 FSEL# 31 5 A7 A13 28 6 A17 DQ5 27
KBA13 4 29 ADB7 KBA6 6 27 KBA8 FWE# 7 26 ADB4
KBA14 A13 DQ7 ADB6 KBA5 A6 A8 KBA9 WE# DQ4 ADB3
5 A14 DQ6 28 7 A5 A9 26 +3VALW 8 VCC DQ3 25
KBA17 6 27 ADB5 KBA4 8 25 KBA11 KBA18 9 24
FWE# A17 DQ5 ADB4 KBA3 A4 A11 F RD# KBA16 A18 VSS ADB2
7 WE# DQ4 26 9 A3 OE* 24 10 A16 DQ2 23
8 25 ADB3 KBA2 10 23 KBA10 KBA15 11 22 ADB1
KBA18 VCC DQ3 KBA1 A2 A10 FSEL# KBA12 A15 DQ1 ADB0
9 A18 VSS 24 11 A1 CE* 22 12 A12 DQ0 21
KBA16 10 23 ADB2 KBA0 12 21 ADB7 KBA7 13 20 KBA0
KBA15 A16 DQ2 ADB1 ADB0 A0 DQ7 ADB6 KBA6 A7 A0 KBA1
11 A15 DQ1 22 13 DQ0 DQ6 20 14 A6 A1 19
KBA12 12 21 ADB0 ADB1 14 19 ADB5 KBA5 15 18 KBA2
KBA7 A12 DQ0 KBA0 ADB2 DQ1 DQ5 ADB4 KBA4 A5 A2 KBA3
13 A7 A0 20 15 DQ2 DQ4 18 16 A4 A3 17
KBA6 14 19 KBA1 16 17 ADB3
KBA5
KBA4
15
A6
A5
A1
A2 18 KBA2
KBA3
VSS DQ3
@29F040_TSOP
Compal Electronics, Inc.
16 A4 A3 17
29F040/SST39VF040_PLCC Title
@SST39VF040_TSOP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
KB A[0..18] PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
31 KBA[0..18] DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
ADB[0 ..7] B 1B
31 ADB[0..7] USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期三, 十一月 27, 2002 Sheet 32 of 44
A B C D E
1
U37 U36 @2N7002 2N7002
8 D1 S1 1 8 D1 S1 1 2 SYSON# 2 SYSON# 2 SYSON# 2 SYSON# 2 SYSON#
7 D1 G1 2 7 D1 G1 2
1 6 3 6 3 Q42 Q28 Q14 1
3
D2 S2 SYSON_ALW D2 S2 @2N7002 2N7002 2N7002
5 D2 G2 4 +12VALW 5 D2 G2 4
R385 100K +
C511
1
8936 8936 C513
+ C515 2N7002 2 SYSON# + 4.7UF_1206 1UF_0805
C532 C514
Q44
10UF_1206 4.7UF_1206
.01UF 16V
3
6.3V 16V
C501
.01UF
+3VALW R282 R283 R136 R129 R143
+ C218 @470 @470 470 470 470
U12 C217 1UF_0805
8 1 10UF_1206
D1 S1 Q26 Q27 Q7
7 2 6.3V
D1 G1
1
@2N7002 @2N7002 2N7002
6 D2 S2 3
5 4 5VS_GATE 2 SUSP 2 SUSP 2 SUSP 2 SUSP 2 SUSP
D2 G2
R150
8936 5VS_GATE +12VALW Q5 Q9
3
C516 2N7002 2N7002
1
+ 100K .01UF
C248
R159 2N7002 2 SUSP
10UF_1206
C228
6.3V .01UF @1M Q12
3
2 2
2
+1_5V +1_5VS
U38
8 1 +5VALW
D1 S1 +12VALW
7 D1 G1 2
+5VALW +5VS 6 3
D2 S2 +12VALW
U20 5 4
D2 G2 + R311
8 D1 S1 1 C525
7 2 8936 C526 10K
D1 G1 + 4.7UF_1206 1UF_0805 R330
6 3 C537 C454
D2 S2 + C346 100K
5 4 4.7UF_1206 . 1UF
D2 G2 C345 1UF_0805 16V C430 SYSON#
16V
3
8936 4.7UF_1206 1UF_0805
1
+ 16V 2 50V
C344
S Y SON 2
4.7UF_1206 17,31,40,42 S YSON
Q36
1
16V R312 NDS352P Q34
3
51K 2N7002
+12VS
5VS_GATE
+ C416
1
1UF_1206
SUSP# 2 Q31 25V
C343
.01UF 2N7002
3
3 3
+5VALW +5V
U19
8 D1 S1 1
7 D1 G1 2
6 3 +12VALW
D2 S2
5 D2 G2 4
+ +12VALW
C349
8936 C347
+ 4.7UF_1206 1UF_0805
C341 R331
4.7UF_1206 C455
16V . 1UF 100K
16V C431 +5VALW
3
1UF_0805
+5V 2 50V
SYSON_ALW
Q37 R139
1
1
R313 NDS352P
51K 10K
C348 R305 +12V
.01UF
100K SUSP
+ SUSP
C419
2
1
1UF_1206_25V
2 Q32 25V SUSP# 2
17,24,31,42 SUSP#
2N7002 Q10
3
3
2N7002
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 33 of 44
A B C D E
5 4 3 2 1
JP10
+5VS 1
+3VS RP38 2
32 PW R_SUSP_LED#
31 TP_CLK 3
1 8 MP3_STOPBTN# 4
JP2 31 TP_DATA
2 7 5
+3VALW 3 6 MP3_FRDBTN# 6
+3VALW 1 32 BATT_LOW_LED#
4 5 MP3_REVBTN# 7
2 32 BATT_CHGI_LED#
3 11,31,36,39 A C IN 8
1
ON /OFFBTN# C99 10K-8P4R 9
4 32 HDD_LED#
51ON# 10
5 1 UF 32 CD_FDD_LED#
D 32 BUTTON1# 11 D
2
6 32 MP3_LED#
32 INTERNET# 7 32 CDON_LED# 12
LID_SW # 13
31 LID_SW # 8 31 MODE#
FR DBTN# 14
9 24 FRDBTN#
R486 1 2 100K STOPBTN# 15
+3VALW 10 24,32 STOPBTN#
MP3_FRDBTN# 2 1 FR DBTN# REVBTN# 16
31 NUM_LED# 11 32 MP3_FRDBTN# 24 REVBTN#
D14 RB751V PLAYBTN# 17
31 ARROW _LED# 12 24 PLAYBTN#
13 32 PW R_LED# 18
31 CAPS_LED# MP3_REVBTN# 2 1 REVBTN# 19
+5VALW 14 32 MP3_REVBTN# 23,32 W L_OFF#
D13 RB751V 20
+5VALW
MOLEX_SD-53307-1417_F14P 21
MP3_STOPBTN# STOPBTN# +3VALW 51ON# +5VS +5VALW +3VALW
32 MP3_STOPBTN# 2 1 22
ON /OFFBTN# D16 RB751V
85201-2205
1
C736 MP3_PLAYBTN# 1 2 PLAYBTN# C581 C338 C337
32 MP3_PLAYBTN#
+3VALW 68PF R499 1 UF 1 UF 1 UF
2
0
1
470K
R447
2
51RST#
51RST# 31
FAN CONN.
2
470K
D37 +3V
2
Q53 DAN217
31 PC7 2
C 2N7002 +12V C
1
3
1
R396
100K
8
KILL_SW#
KILL_SW# 23,32
3 +
1
+3VALW 1
2
3
1
-
1
U1A
4
R309 LM358
SW1
Power Button
100K
DS-1200-02
D31
2
1 ON/OFF
O N/OFF 11,31
ON /OFFBTN# 3
2 51ON#
51ON# 36
+3VALW DAN202U
1
D30
1
R307 C395
1
C Q30
2
4.7K 1000PF
2
RLZ20A
2
8
2
1
G EN_D FAN 5 C C2
31 EN_DFAN +
S 2N7002 7 1 2 2 Q20 D5
3
2
1
R16 R8 E
3
10K U1B 100 C20 1SS355
2
LM358 FA N1
2
. 1UF JP17
1
LID_SW # SW2 D1 1
31 LID_SW # 3 1 2
1N4148
3
1 2
R15 53398-0310-FAN
2
8.2K
4 2
+3VALW +3V
2
H O R NG CHIH
1 2
1
C571 . 1UF
U50 R9
5
1 10K
4,10,14,19,20,21,23,25,27,31 PCIRST# D46
4 LPCPD#
LPCPD# 31
2
A A
11,14,27 SUS_STAT# 2 PSOT03C 31 FAN_SPEED
3
LPCPD# 7SH08FU
R448 @0
Compal Electronics, Inc.
Title
For PC87591 REV 0.A Only
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 34 of 44
5 4 3 2 1
A B C D E
C F1 C F3 C F2 C F4 F D1 F D3 F D2
SMD40M80 SMD40M80 SMD40M80 SMD40M80 F IDUCAL F IDUCAL F IDUCAL EP9 EP11 EP13 EP15 EP14 EP10 EP12 EP2
H8 H19 H18 H7 H9 H13 EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD
C315D146 C315D146 C315D146 C315D146 C315D165 C315D165
1
C F5 C F6 C F7 C F8 F D5 F D6 F D4
1
SMD40M80 SMD40M80 SMD40M80 SMD40M80 F IDUCAL F IDUCAL F IDUCAL
1
C315D150 C315D150 C315D150 C315D150
C F9 CF11 CF10 CF12 CF14 CF19 CF17 CF20
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
1
1
1
EP20 EP22 EP23
M8 CF15 CF18 CF13 CF16 EMIPAD EMIPAD EMIPAD
C157D157N SMD40M80 SMD40M80 SMD40M80 SMD40M80
1
1
1
M2 M1 M7 M4 EP24 EP25 EP26
C85D85N C315D91 C315D106 C315D106 H1 H14 H20 H15 H17 H5 H6 H10 EMIPAD EMIPAD EMIPAD
S315D110 S315D110 S315D110 S315D110 S315D110 S315D146 S315D146 S315D110
1
1
1
1
M9 M10
O95X173D95X173N O157X197D157X197N H16 H23 H21 H2 H22 H26
S315D110 S315D110 S315D110 S315D110 S315D110 S315D110 +3V
1
1
2 D44 +3V +3V 2
M12 R427 @1N4148
C256D256N 47K
14
14
U48A U48B
R437
2
1 2 3 4 RSMRST#
RSMRST# 11,12
1
+3V
330K C564 74LVC14 74LVC14
14
7
U48C 1 UF +3V POWER +3V POWER
5 6
74LVC14
+5V
7
+3V
C552
1 2
1
D45 +3V
R420 @1N4148 U44
5
U49D 47K . 1UF
13
14
74LVC125 U48D 2
R419
4
2
12 11 1 2 9 8 1
1
330K 74LVC14
3
C551 7SH32FU
7
2
. 1UF
3 3
RTC BATT
+3VS
C325
- BATT1 + 1 2
2 1 +RTCBATT
. 1UF U49C
10
74LVC125
1
U47
RTCBATT 5 6 9 8
VCC
MR# RST# SYS_PW ROK 11
1
D42 1 2 3
+5VS PFI
1
HSM1265 +3V POWER
1
R225 4 R421
GND
PFO#
1
+RTCVCC 240K R211 C324 C316
10K
3
MAX6342
2
100K .01UF . 1UF
2
CHGRTC
4 4
C592
. 1UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 35 of 44
A B C D E
A B C D
Vin Detector
1
1
PR56
PR51 PR47
* 84.5K_1% 10K 1K
1 2
2
PR50 A C IN 11,31,34,39
8
22K
1 2 3 +
PL2 V IN 1
PF1 CHC4532U800_1812 P ACIN 37,40
2 -
1
7A 125V UL/CSA FAST
1
PCN1 1 2 PC72 PR58 PC84 PU27A
4
1 1000PF_50V 20K_1% 0.1UF_50V PZD4 PR57
1
LM393M RLZ4.3B 10K
4 1
2
PR4
2
1
10_1206
2
3 2
3 PD1 RTCVREF
2 1
12
2 BYS10-45
PC3 PC4 PC2 PC1 PR49
3.3V
2
2
2 2
V IN
2
PD18
PD3 RLS4148
1SS355
37,38 VMB 2 1
1
PR83
VS +5VP
33_1206
PZD2 PQ21
RLZ6.2C TP0610T
CH GRTCP 2 1 3 1 1 2
RTCVREF PR18 PR208
* PU10
1
10K
2
200_0805
1
S-81233SG
1
0.1UF_50V
PR86 PC38 PC97 PR209 PZD5
3.3V
PC192
100K 0.22UF_1206_25V 0.1UF_0805_25V 150K RLZ5.1B
2
CHGRTC 1 2 3 2 34 51ON#
2
2
3 2
1
2
PR27 1 2
1
10UF_1206_10V 22K
2
PJP4
+1.8VP 1 2 +1_8V (3A,120mils ,Via NO.= 6)
3MMA
PJP3
+12VALWP 2 1 +12VALW (120mA,20mils ,Via NO.= 1)
JOPEN/+12V
PJP2
4
PJP5 4
CHARGER
1 1
Iadp=0~4.2A
P2 P3 B+ B++
PQ1 PQ2 PR5 PL8 PQ24
SI4835DY SI4835DY 0.015_2512_1% FBM-L11-453215-900LMAT_1812 SI4835DY
V IN 8 1 1 8 2 1 1 2 1 8
7 2 2 7 2 7
1
6 3 3 6 PC53 PC54 PC58 PC45 3 6
5 5 5
1
2
4
4
PR1 PR3
10K 200K
2
AC OFF# 1 2 1 2 V IN
PR25 10K PR26 47K
1
PU12
1
PD17 PR2 MB3887
1SS355 150K 1 24 PR41
-INC2 +INC2
3
2
1
AC OFF# 1 2 0
38 ACOFF# 31 ADP_I
2
1
2 2 1 2 23 PC48 2
2
OUTC2 GND 0.022UF_25V 4
PR81 PR46
1
-INE2 VCC(o)
1
5
6
7
8
1
3
PC83 PR54 1 2 1 2 5 20 0.1UF_0805_25V
40 ACON FB2 OUT
0.1UF_16V 10K_1% PC112
2
0.1UF_0805_25V
PC86 1 2 1 2 7 18 1 2
0.1UF_16V FB1 VCC
2
PC71 PR37
1000PF_50V 1K 8 17 1 2
ACON 40 CC=0~2.52A
PR116 -INE1 RT
226K_1% PR101 CV=16.84V(12 CELLS)
1 2 9 16 68K PL11
31 IR EF +INE1 -INE3 22UH_SPC_1205P_220A VMB
PR53 10K 1 2 1 2
2 1 10 OUTC1 FB3 15 1 2 1 2
1
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
PR65 0.1UF_16V PR31 PC49 0.02_2512_1%
1
100K_1% 11 14 @47K 1500PF_50V
2
OUTD CTL
1
P C90
PC130
PC122
CS +
1
1
3 3
2
2
-INC1 +INC1
1
3
2
2
100K VMB
2
PQ38
DTC115EUA
1
100K
PR39
3
205K_1%
100K 2 1 2 1
2
2
PR38
1
300K_0.5%
PC70
0.1UF_50V
2
2
8
+ 3
1
31 BATT-UVP - 2
PU25A
4
4 LM358 4
1
PR36 PC66
1
2.2K
2
PC65
Compal Electronics, Inc.
2
@0.1UF_16V
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B 401225 1B
D ate: ¬P 期二, 十一月 26, 2002 Sheet 37 of 44
A B C D
A B C D
1
PC132
1000PF_50V
2
PL12 PF2
HCB4532K-800T90_9A 12A 65V UL/CSA fast PJP7
12 Cells Charger OVP : 18.059V 36,37 VMB 1 2
V IN BLI/N IMH# 1
1 B B/I 2 1
TS 3
4
1
PR120
5
1
37 ACOFF# VMB PC124 PC123
6
1
@1000PF_50V 1K
7
1
PR59
2
36K VS 0.01UF_50V PR123 PR124
2
100 100 BP0207
PR45
1M_0.5%
2
PU26A EC_SMD1
31,32 EC_SMD1
LM393M
8
PR42 PR111 0
1
309K 1% + 3 EC_SMC1
31,32 EC_SMC1
2 1
- 2
PQ9
* PR122
3
1
100K_1% 25.5K_1%
PR109 PR110 1 2 TS
PR43 PC81 100K_0.5% 97.6K_1% PD27 PD28
1
100K 1UF_1206_25V PC82 PR210 PC79 @BAS40_04 @BAS40_04
1
1000PF_50V 51K_1% PR114
1UF_0805_16V 47K PR121
3
PD6 PD5 1K
PR113 3 3
2
@1K
2
BLI/N IMH# 2 1 1 1
2 BATT_TEMP 31 2
2 2
31 BLI/MH# +5VALWP
@BAS40_04 @BAS40_04
PH1 under CPU botten side : PH2 near main Battery CONN :
CPU thermal protection at 76 degree C BAT. thermal protection at 82 degree C
Recovery at 45 degree C Recovery at 45 degree C
VL
VL
VS VS
VL VL
10K_1%_0805
10K_1%_0805
47K_0402_1%
1
1
PR131 PC126
PH2
PC128 47K_0402_1% 0.1UF_50V PR126
PH1
0.1UF_50V
2
2
3 PR168 PR169 3
47K_0402_1%
PR130 PR117 47K_0402_1%
*
8
13.3K_1% 15.8K_1%
PD34 PD35
5 + 5 +
7 2 1 OTPON 7 2 1 OTPON
OTPON 39 OTPON 39
TM_REF1 6 - TM_REF2 6 -
PU26B
PU27B 1SS355 LM393M 1SS355
4
LM393M
2.2UF_1206_16V
2.2UF_1206_16V
PR170 PR171
1000PF_50V
PC129 1000PF_50V
3.48K_1%
PC135
PC127
PC134
3.32K_1%
VL VL
PR132 PR127 100K_0402_1%
100K_0402_1%
PR133 PR128
100K_0402_1% 100K_0402_1%
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B 401225 1B
D ate: ¬P 期二, 十一月 26, 2002 Sheet 38 of 44
A B C D
A B C D E
+3.3V/+5V/+12V
1 1
PC80
4.7UF_1210_25V
1 2
470PF_0805_100V
1
2
PC64
PC85
DAP202U PD29
0.1UF_0805_25V PD4 PR71 EC11FS2
1
1 2 BST31 BST51 22_1206
2
B++
3
SNB 2 1 FLYBACK
2
0.1UF_0805_25V
4.7UF_1210_25V
4.7UF_1210_25V
8
7
6
5
VL
PC68
1
1
1
2200PF
PQ14 VS 0.1UF_0805_25V
PC117
PC62
PC59
PC113
SI4800DY PR107 1 2
3
0_0402 PT1
2
4.7UF_1206_10V
4 DH31 1 2 B++ PQ15 SDT-1205P-100
0.1UF_16V
SI4800DY
2
PR32 PD168
PC63
PC119
0_0402 +12VALWP
4.7UF_1210_25V
1SS355
5
6
7
8
0.1UF_0805_25V
4.7UF_1210_25V
1
2
3
1
LX3
1 1
1
PC61
PC116
2200PF
8
7
6
5
PC57
PC50
0.1UF_0805_25V
4.7UF_1210_25V
PR108
+3.3V Ipeak = 6.66A ~ 10A
2
2 47PF_0402 PQ23 10_1206 PR30 2
4
1
SI4810DY 0_0402
PC100
1
PC99
2
1
0.1UF_0805_25V
1
DL3
D H3
4
2
PC51
2
3
2
1
1
1
PL10 PC108
PC118
SLF12565T_100M @1000PF 1 2 DH51
5
6
7
8
1
2
3
2
PR102
2
1
0_0402 PQ25 PC52
22
21
SI4810DY 47PF_0402
25 4
V+
VL
2
BST3 12OUT
2
5 DL5 4
VDD CSH5
27 18
DH3 BST5
1
1
PU23 16
PR91 DH5 PC109
26 17
LX3 LX5
1
PR60 1M_0402 24 19 @1000PF
1
3
2
1
DL3 DL5
1
+3VALWP 0.012_2512_1% 20
PGND PR34 PR61
14
2
2
CSL3 FB5
150UF_D_6.3V_FP
@47UF_D_6.3V_PC
3 MAX1632 15
2
FB3 SEQ
150UF_D_6.3V_FP
23 6
SHDN# SYNC
1
1
PC74
PC75
PC76
+ + + PR90 PR85 11
RST#
1
10K_0402 7
3.57K_1% PC105 TIME/ON5 PC103 CSL5
+5VALWP
2
@47UF_D_6.3V_PC
28
GND
2
2
RUN/ON3
150UF_D_6.3V_FP
@300K_0402
2
1
1
PC78
PC77
+ +
8
1
PD26 PC107 PC102 1 2 1 2 PR95 PD25
VL
2
2
10K_0402
2
PR89
0_0402 @0_0402
2
1
2
PR33
1
1
47K_0402
PR87
1
10K_0402
2
POK
POK 41 PC101
2
PR29 @100PF_0402
1
PC67 2 1 VL
0.047UF_16V
2
47K_0402_1%
+5V Ipeak = 6.66A ~ 10A
MAINPWON 40
1
OTPON 2 100K
PC47
38 OTPON 0.047UF_16V
2
100K
4 PQ34 4
3
DTC115EK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401225
Date: 星期二, 十一 ?26, 2002 Sheet 39 of 44
A B C D E
A B C D
1.8V/1.5V
+1.8VP+-5%
PQ26
SI3445DV PL7 +1.8VP
+5VALWP 5UH_TPRH6D38_5R0
D
LX18
S
6 1 2
4 5 B+
2
1
1 PC111 PR154 PR155 1000PF
1
PD22 PR40 PC69 100K @1M_1% PC136
G
4.4V
1
1 RB051L-40 0.1UF_50V 191K_1% + PC98 1 2 2 1 1
+5VP
2
1
1
PD2 PQ6 2200PF 150UF_D_4V_FP PR156
2
PC115 RB751V HMBT2222A 1 2 698K_1%
2
1
1
10UF_1206_10V PR103
2
1 2 2 10K VS PR96 2 1
PD31
2
2M_5% LM393M RTCVREF
RB751V
2
PR104 PU11B - 6
3
1
1K 2 1 7 10K PR157
2
39 MAINPW ON
0.1UF_25V
PC114 + 5
1
4700PF_50V
2
1
PR158
PC166
1
402K_1% PC137
PD32
PR159 100PF
RB751V
2
PC138 332K_1%
2
8
37 ACON 2 1
3
+ 3 1000PF
2
PQ7 2 1
2SA1036K - 2 1.8V 1 2 2.5VREF
PU11A
1
0.01UF_50V
LM393M PR62 93.1K
1
+5VALWP
PR152 PR160
47K P ACIN 36,37
1
17.8K 2 2 1 P ACIN
PQ29
1
PC60 PR68
1
47K 2N7002
3
2
P1.5V
1 2
100K
1
2 2 2
2
100K +5VALWP
100K
PR35 PQ16 2
3
100K
DTC115EK 2 S Y SON PQ30
249K S YSON 17,31,33,42 DTC115EUA
100K
1
100K
3
PQ12
3
DTC115EK
PQ37
+1.5VS+-5%
+1.8VP SI3456DV-T1
D
V IN PD33 1.5K_1206
6
S
5 4 2 1 PR161
+1.5VP
2
4.7UF_1206_25V
3 1 3
2
+
PR204
PC164
5.1K
PR203
3
PC165
150UF_D_6.3V_KO
2
1.5K_1206 PR163
1
220PF
PC167
VS 1.5K_1206 PR164
PU25B B+
P1.5V
+ 5
7
- 6
0. 01UF
PC168
PC169LM358
PR205
68PF
5.1K
1 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225 1B
D ate: ¬P 期二, 十一月 26, 2002 Sheet 40 of 44
A B C D
A B C D
CPU-CORE
@4.7U_0805_10V
+5VDRIVE +12VALWP
B+++ PL3 B+
HCB4532K-800T90_9A
P C29
1 2
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
1UF_0805_25V
100UF_EC_25V
PQ32
1
+5VDRIVE PD16
100UF_EC_25V
SI2301
1
PR172
PR173
P C22
PC6
PC141
4.7UF_0805_10V
0.22UF_0805_16V
1 @10K
1 @10K
1000PF_50V
2 1 +
8
7
6
5
8
7
6
5
PC190
1 3 +
+5VDRIVE
P C11
P C12
P C13
P C14
0.1UF_0805_25V
@4.7U_0805_10V
+5VALWP
P C27
D
D
D
D
D
D
D
D
2
P C28
PR174
7 1 @10K
EP10QY03
2
PR175 PU1 PU2
P C30
1 1 2 1
G
4
S
S
S
S
S
S
P C23
0
6
10K 1 2 PR80 1 IRF7811A IRF7811A
VCC
1
2
3
4
1
2
3
4
BST H R1
8
PVCC
VCC
BOOST
DRVH CPU_VCC
2 IN
PR176 7 1
SW UGATE
PGND
PL6 0.6U_HK-AE26A0R6
1K_1%
1
3 8 SW1
1K DLY PHASE
5 3 2 1
GND
DRVL PWM
PR9
5 LR1
LGATE
1
1
P C96
@220PF
ADP3414
8
7
6
5
8
7
6
5
PU21 @ISL6206 PR76
1
PU7
D
D
D
D
D
D
D
D
RB051L-20
2.4_1% PD13 PR10
100K
39 POK POK 2 PU18 PU17 2K_1%
P D10
+5VALWP
G
S
S
S
S
S
S
EC31QS04
2
100K SI4362 SI4362
1
2
3
4
1
2
3
4
2
PQ33
3
DTC115EK
0.22UF_0805_16V
B+++
PC39
1 PR177 2
@10K
+5VDRIVE
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
+12VALWP
1UF_0805_25V
+5VDRIVE PD15 PC25
20
PC5
4.7UF_0805_10V
0.22UF_0805_16V
@4.7U_0805_10V
1000PF_50V
2 1
8
7
6
5
8
7
6
5
VCC
PR178
PC7
PC8
PC9
P C10
1 @10K
18 11
P C32
D
D
D
D
D
D
D
D
PWM4 PWM1
P C31
PR179
PR180
P C19
7 1 @10K
2 EP10QY03 2
0.1UF_0805_25V
@10K
@4.7U_0805_10V
+5VALWP 17 12 PU3 PU4
ISEN4 ISEN1
G
4
S
S
S
S
S
S
P C24
3 VID0 2 PR13 1 5 14 0
VID0 PWM2
6
1 2 PR79 1 IRF7811A IRF7811A
VCC
1
2
3
4
1
2
3
4
BST
2
P C33
3 VID1 2 PR14
0 1 4 13 8 H R2
PVCC
VCC
BOOST
VID1 ISEN2 DRVH 0.6U_HK-AE26A0R6
2 IN
PR28 3 VID2 2 PR15
0 1 3 15 7 1
VID2 PWM3 SW UGATE
PGND
10K_1% SW2 PL5
3 DLY PHASE 8
2,31 VR_ON 3 VID3 2 PR16
0 1 2 16 5 3 2 1
GND
1
1
P C95
@220PF
3 VID4 2 PR17
0 1 1 10 ADP3414
6
VID4 VSEN
8
7
6
5
8
7
6
5
PU20 @ISL6206
1
PR11
0 PU8 PR82
D
D
D
D
D
D
D
D
1
1
1500PF_50V P C41
RB051L-20
1 2 19 6 PD12 PR7
+3VS PGOOD COMP 2.4_1% PU16 PU15 2K_1%
PD9
10K
G
S
S
S
S
S
S
EC31QS04
8 7
GND
2
100K FS/DIS FB PC40
V R_ON 2 1 2 SI4362 SI4362
1
2
3
4
1
2
3
4
2
11 V_GATE PR207 0 33PF
1K_1%
PC191 PU22
9
100K PQ3
1
PR8
PQ5 @2200PF PR20
3
1 PR181 2
@10K
+12VALWP
1
CORE_EN +5VDRIVE
1
100K
2
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
1UF_0805_25V
+12VALWP 2
2
2
4.7UF_0805_10V
0.22UF_0805_16V
@4.7U_0805_10V
1000PF_50V
2.5VREF 3K_1% 2 1
8
7
6
5
8
7
6
5
P C20
0.1UF_0805_25V
3
100K PR19 3
P C36
PR182
PR183
P C15
P C16
P C17
P C18
P C21
137K_1%
P C35
D
D
D
D
D
D
D
D
3
1
1
P C34
PR184
7 1 @10K
@10K
@10K
@4.7U_0805_10V
+3VS EP10QY03
1
1
P C26
0.1UF_50V
2
G
2
S
S
S
S
S
S
0
1
6
D
P C37
PR98 3 PQ8 1 2 PR78 1 IRF7811A IRF7811A
VCC
1
2
3
4
1
2
3
4
105K_1% 2N7002 BST H R3
1 2 8
PVCC
VCC
BOOST
G DRVH 0.6U_HK-AE26A0R6
2 - 2 IN
PU24A S 7 1
1
SW UGATE
2
PGND
SW3 PL4
3 8
4
DLY PHASE
2
LM358 5 3 2 1
GND
DRVL PWM
1 P R12
1K_1%
PR97 5 LR3
LGATE
P C94
@220PF
100K_1% ADP3414
6
8
7
6
5
8
7
6
5
PU19 @ISL6206
1
PU9
D
D
D
D
D
D
D
D
C PUVID 3
1
1
4.7UF_1206_25V
RB051L-20
PR77 PD11 PR6
PU14 PU13 2K_1%
1
PD8
PQ22 2.4_1%
G
S
S
S
S
S
S
P C46
EC31QS04
2 2N7002 +5VALWP
2
G PR22 SI4362 SI4362
1
2
3
4
1
2
3
4
2
S 33K_1%
3
2
2
1
PR99 PR24
150K_1% 100K
PD19
1
1SS355
CORE_EN
1
1 PR185 2
D
@10K
4 5 + PQ4 4
7 2 2N7002
6 - G
PU24B S
3
2
2
1
Title
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D SizeB Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225 1B
D ate: ¬P 期二, 十一月 26, 2002 Sheet 41 of 44
A B C D
5 4 3 2 1
D D
+2.5V/+1.25V
PL13
B++
KC FBM-LI11-322513-151AT
PR187
20 PC145
4.7U_1210_25V
1
PC147
PD36 PC146
.1UF_0805
2
4.7UF_1206_16V
14
28
C C
PC148 PC149
1
12 17 PC150
VIN
VCC
SOFT1 SOFT2
PC151 0.01uF_50V 0.01uF_50V PC152
2
.1UF_0805_25V
6 23
BOOT1 BOOT2
.1UF_0805_25V PQ36
PQ35 FDS6984S FDS6984S
5 4 5 24 4 5
UGATE1 P U28 UGATE2
PL14 6 3 0 PR188 4 25 0 PR189 3 6 PL15
4.7UH_SPC-1205P-100 PHASE1 PHASE2 1.5UH_TPRH6D38_1R5
+2.5VP 7 2 2 7 1 2
PR190 ISL6225 PR191
+1.25VP
PC195 8 1 7 22 1 8
PC155 PR192 1K ISEN1 ISEN2 PR193
4.7uF _0805_6.3V @100 2 27 2K @ 100
1
GND
DDR
17,31,33,40 SYSON 11 18
1
0 OCSET1 OCSET2 PC160 PC162 PC161
IS6225 2.2UF_0805_6.3V @1000PF_50V PC194
13
2
PR198 PR199 PR200 @4.7UF_1206_16V 4.7uF _0805_6.3V
10K @100 50K +2.5VP
PC163
@1000PF_50V
B B
+5VALWP PR201
10K_0.1%
PJP8
+2.5VP 1 2 +2.5V (5A,120mils ,Via NO.=6)
PR202
PC193 10K_0.1%
PAD-OPEN 4x4m
1000PF_50V
PJP9
1 2 +1.25VS (3A,200mils ,Via NO.= 10)
+1.25VP
PAD-OPEN 4x4m
A A
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE C 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
Date: 星期 G, 十一月 26, 2002 Sheet 42 of 44
5 4 3 2 1
ATR11 PIR LIST
ATEST 9/6~
HW PIR LIST PWR PIR LIST
Remove R111 100ohm
1 +2.5V LEVEL ERROR Change R108 from 100 to 0 ohm P15
Change CLK_SDRAM3 from U22.F3 to U22.E3
2 Change CLK_SDRAM5 from U22.H5 to U22.G5 P5
SDRAM BANK select error Change RRAS#3 from U22.H7 to U22.F7
Change RRAS#5 from U22.G6 to U22.H6
BTEST
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C ustom 401225
D ate: ¬P 期二, 十一月 26, 2002 Sheet 43 of 44
5 4 3 2 1
D
1 Creat +5VP power 36
Add PC192: 0.1UF; PZD5: RLZ5.1B
DVT D
PR208: 10K; PR209: 150K
2 Meet spec. of ISL6225 DDR2.5V Vsense voltage 42 Change PR195 from 17.8K to 18.2K DVT
0.89V
Change PR64 from 10K to 4.7K
3 For CP mode 37
PC121 from 4700PF to 1000PF
DVT
For DDR 1.25V ripple voltage 42 Change PC153, PC154 from 150uF/6.3V to DVT
4 220uF/2V
5 For DDR 2.5V voltage 42 Add PC156: 220uF/2V; delete PC155: 220uF/2V DVT
For cost downe Change PL15 from 1.5uH SPC_06703 to 1.5UH DVT
6 42
TPRH6D38
Change PL7 from 5uH SPC_06703 to5UH
40
TPRH6D38
C
7
C
For DDR 1.25V voltage sense 42 Change PR191 from 6.8K_1% to 2K_1% DVT
For transient response of DDR 2.5V 1.25V 42 Add PC195 PC194 4.7uF/6.3V; de-pop PC153
PVT
8 Change PC193 from 1000pF to 4700pF;
PR186 from 10 to 51Ohm
9 For reduce CP mode noise 37 Change PC121 from 4700PF to 1000PF PVT
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1512
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401225
Date: 星期二, 十一月 26 , 2002 Sheet 44 of 44
5 4 3 2 1