Experiment :1

Operation of the basic logic Gates

Enter the input values for each input combination on the gates true table in the cells labelled
and observe the change in cell labelled "Y". Fill the Gate's Truth table with the correspondin
"Y"

AND gate Boolean expression

Y  A .B

A A.B
AND

fig 1 function of AND Gate

OR gate Boolean expression

Y  AB

A AB
OR

fig 2 function of OR Gate

NAND gate Boolean expression

Y  A .B

A
A .B
NAND

fig 3 function of NAND Gate

NOT gate Boolean expression

Y  A

A NOT

fig 4. function of NOT Gate

NOR gate Boolean expression

Y  AB
A
NOR
NOR
B

fig 5. function of NOR Gate

EX-OR gate Boolean expression

Y  A  B

A
OR
XOR
B

fig 6. function of EX_OR Gate

sic logic Gates Designed by AMINU ZUBAIRU

es true table in the cells labelled "A" or "B"

uth table with the corresponding value of

A B Y
Y 0 0
0 1
1 0
1 1

table 1. AND Gate Truth Table

A B Y
Y 0 0
0 1
1 0
1 1

table 2. OR Gate Truth Table

 A B Y
A .B 0 0
Y 0 1
1 0
1 1

table 3 . NAND Gate Truth Table

A A Y
Y 0
1

table 4. NOT Gate Truth Table

A  B A B Y
0 0
NOR Y 0 1
1 0
1 1

table 5. NOR Gate Truth Table

A  B A B Y
0 0
Y 0 1
1 0
1 1

table 6. EX-OR Gate Truth Table

y AMINU ZUBAIRU
 Experiment

IMPLEMENTATION OF THE LOGIC GA

Fill the corresponding truth tables and compare the truth t

NAND
A

fig.7 implimentation of NOT Gate using NAND Gate Only

A
NAND

fig.8 implimentation of AND Gate using NAND Gate Only

A
NAND

NAND
 B
NAND

fig.9 implimentation of OR Gate using NAND Gate Only

A
NOR

fig.10 implimentation of NOT Gate using NOR Gate Only

NOR

fig.11 implimentation of OR Gate using NOR Gate Only

A NOR

B NOR

fig.12 implimentation of AND Gate using NOR Gate Only

 Experiment :2

OF THE LOGIC GATES WITH THE UNIVERSAL GATES

ables and compare the truth table for each implementation with the standard gate truth table

A A Y
Y 0
1

AND Gate Only table.7

A B Y
A .B 0 0
NAND Y 0 1
1 0
1 1

AND Gate Only table.8

A A
AND 0
0
1
NAND Y 1

AND B
 NAND

AND B

ND Gate Only table.9

A Y
A 0
Y 1

table. 10
NOR Gate Only

A B
A  B 0 0
NOR Y 0 1
1 0
1 1

table .11
OR Gate Only
 A

A B
0 0
0 1
NOR Y 1 0
1 1

B
table.12

NOR Gate Only

 Designed by AMINU ZUBAIRU

B Y
0
1
0
1
table.9

Y
Y
 Experiment :3
Simulation of DeMogan's

FIRST DeMogan's theorem : A .B  A  B

LHS : A .B

NAND

RHS : A  B
A
A 1

B
B 1
 SECOND DeMogan's theorem
A  B  A .B

LHS : AB

NOR

RHS : A.B

A
A 1

AND
B
B 1
 Experiment :3
ation of DeMogan's Theorem
Designed by AMINU ZUBAIRU

A.B  A  B

A B Y
0 0
0 1
1 0
1 1

table 1.

A B Y
0 0
0 1
1 0
1 1

table .2
A  B  A .B

Y A B Y
0 0
0 1
1 0
1 1

table . 4

AND A B Y
0 0
0 1
1 0
1 1

table . 5
U ZUBAIRU
 Tabaular Number system conversion

S/N DECIMAL BINARY OCTAL

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Table 1. Number system conversion

Individual Number system convertion

Decimal
To

Decimal
To

Decimal
To

Binary
To
Binary
To

Binary
To

Octal
To

Octal
To

Octal
To

Hexadecimal
To

Hexadecimal
To

Hexadecimal
To
er system conversion

HEXADECIMAL
Designed by AMINU ZUBAIRU

Binary

Octal

Hexadecimal

Decimal
Octal

Hexadecimal

Decimal

Binary

Hexadecimal

Decimal

Binary

Octal
y AMINU ZUBAIRU
 Y = ᾹB̅C̅ + ᾹBC̅

A 0

B 1

C 1

C B A Y
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0
ᾹB̅C̅ + ᾹBC̅

0 0
0 Y

1 0

1
Designed by AMINU ZUBAIRU
 S1
0

A 1

B 1

C 1

D 1
S1 S2 I0 I1
0 0
0 1
1 0
 Designed by AMINU ZUBA

S2
0

I0 1

I1 0

I2 0

I3 0
I2 I3 Y
I0
Designed by AMINU ZUBAIRU

1Y