MJF122 D

MJF122, MJF127
Complementary Power
Darlingtons
For Isolated Package Applications
Designed for general−purpose amplifiers and switching
applications, where the mounting surface of the device is required to http://onsemi.com
be electrically isolated from the heatsink or chassis.
COMPLEMENTARY SILICON
Features
POWER DARLINGTONS
• Electrically Similar to the Popular TIP122 and TIP127 5.0 A, 100 V, 30 W
• 100 VCEO(sus)
• 5.0 A Rated Collector Current NPN PNP
• No Isolating Washers Required COLLECTOR 2 COLLECTOR 2
• Reduced System Cost

• High DC Current Gain − 2000 (Min) @ IC = 3 Adc BASE
1
BASE
1
• UL Recognized, File #E69369, to 3500 VRMS Isolation
• Pb−Free Packages are Available*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
EMITTER 3 EMITTER 3
MAXIMUM RATINGS
MJF122 MJF127
Rating Symbol Value Unit
Collector−Emitter Voltage VCEO 100 Vdc MARKING
Collector−Base Voltage VCB 100 Vdc DIAGRAM
Emitter−Base Voltage VEB 5 Vdc
MJF12xG
RMS Isolation Voltage (Note 1) VISOL 4500 VRMS AYWW
(t = 0.3 sec, R.H. ≤ 30%, TA = 25°C) TO−220
Per Figure 14 CASE 221D−02
Collector Current − Continuous IC 5 Adc STYLE 2
Peak 8
1 x = 2 or 7
Base Current IB 0.12 Adc 2
3 G = Pb−Free Package
Total Power Dissipation (Note 2) PD
A = Assembly Location
@ TC = 25_C 30 W Y = Year
Derate above 25_C 0.24 W/_C WW = Work Week
Total Power Dissipation @ TA = 25_C PD 2 W
Derate above 25_C 0.016 W/_C
ORDERING INFORMATION
Operating and Storage Junction Temperat- TJ, Tstg −65 to IC
ure Range + 150 Device Package Shipping†
THERMAL CHARACTERISTICS MJF122 TO−220 50 Units / Rail
Characteristic Symbol Max Unit MJF122G TO−220 50 Units / Rail
Thermal Resistance, Junction−to−Ambient RqJA 62.5 _C/W (Pb−Free)
Thermal Resistance, Junction−to−Case RqJC 4.1 _C/W MJF127 TO−220 50 Units / Rail
(Note 2)
MJF127G TO−220 50 Units / Rail
Lead Temperature for Soldering Purpose TL 260 _C
(Pb−Free)
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not †For information on tape and reel specifications,
normal operating conditions) and are not valid simultaneously. If these limits are including part orientation and tape sizes, please
exceeded, device functional operation is not implied, damage may occur and refer to our Tape and Reel Packaging Specifications
reliability may be affected. Brochure, BRD8011/D.
1. Proper strike and creepage distance must be provided.
2. Measurement made with thermocouple contacting the bottom insulated *For additional information on our Pb−Free strategy
mounting surface (in a location beneath the die), the device mounted on a and soldering details, please download the
heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs. ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2008 1 Publication Order Number:

September, 2008 − Rev. 7 MJF122/D
MJF122, MJF127
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Characteristic Symbol Min Max Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
OFF CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Collector−Emitter Sustaining Voltage (Note 3) VCEO(sus) 100 − Vdc
(IC = 100 mAdc, IB = 0)
Collector Cutoff Current ICEO − 10 mAdc
(VCE = 50 Vdc, IB = 0)
Collector Cutoff Current ICBO − 10 mAdc
(VCB = 100 Vdc, IE = 0)
Emitter Cutoff Current (VBE = 5 Vdc, IC = 0) IEBO − 2 mAdc
ON CHARACTERISTICS (Note 3)
DC Current Gain (IC = 0.5 Adc, VCE = 3 Vdc) hFE 1000 − −
DC Current Gain (IC = 3 Adc, VCE = 3 Vdc) 2000 −
Collector−Emitter Saturation Voltage (IC = 3 Adc, IB = 12 mAdc) VCE(sat) − 2 Vdc
Collector−Emitter Saturation Voltage (IC = 5 Adc, IB = 20 mAdc) − 3.5
Base−Emitter On Voltage (IC = 3 Adc, VCE = 3 Vdc) VBE(on) − 2.5 Vdc
DYNAMIC CHARACTERISTICS
Small−Signal Current Gain (IC = 3 Adc, VCE = 4 Vdc, f = 1 MHz) hfe 4 − −
Output Capacitance MJF127 Cob − 300 pF
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
MJF122 − 200
5
RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS ts
VCC 3
D1, MUST BE FAST RECOVERY TYPES, e.g.,
1N5825 USED ABOVE IB ≈ 100 mA
- 30 V 2
MSD6100 USED BELOW IB ≈ 100 mA RC
SCOPE
TUT 1 tf
t, TIME (s)
V2 RB
μ
0.7
APPROX.
+8 V
0.5
51 D1 ≈8 k ≈120
0 0.3 td @ VBE(off) = 0 V
tr
V1 0.2
APPROX. VCC = 30 V
+4 V IC/IB = 250
-12 V 25 ms 0.1 IB1 = IB2 PNP
0.07 TJ = 25°C NPN
tr, tf ≤ 10 ns FOR td AND tr, D1 IS DISCONNECTED
0.05
DUTY CYCLE = 1% AND V2 = 0 0.1 0.5 0.7 1 2 3 5 7 10
0.2 0.3
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
IC, COLLECTOR CURRENT (AMP)
Figure 1. Switching Times Test Circuit Figure 2. Typical Switching Times
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2
MJF122, MJF127
TA TC
4 80
PD, POWER DISSIPATION (WATTS)

3 60
TC
2 40
1 20 TA
0
0 20 40 60 80 100 120 140 160
T, TEMPERATURE (°C)
Figure 3. Maximum Power Derating
0.5
RESISTANCE (NORMALIZED)
r(t), TRANSIENT THERMAL
0.3
0.2
0.1
SINGLE PULSE
RqJC(t) = r(t) RqJC
0.05 TJ(pk) - TC = P(pk) RqJC(t)
0.03
0.02
0.01
0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 100 200 300 500 1K 2K 3K 5K 10K
t, TIME (ms)
Figure 4. Thermal Response
10
100 ms There are two limitations on the power handling ability of
IC, COLLECTOR CURRENT (AMPS)
5 a transistor: average junction temperature and second

3 TJ = 150°C
1ms breakdown. Safe operating area curves indicate IC − VCE
2 d
limits of the transistor that must be observed for reliable
5 ms
c operation; i.e., the transistor must not be subjected to greater
1 dissipation than the curves indicate.
The data of Figure 5 is based on TJ(pk) = 150_C; TC is
CURRENT LIMIT
0.5 variable depending on conditions. Secondary breakdown
SECONDARY BREAKDOWN
0.3 LIMIT pulse limits are valid for duty cycles to 10% provided TJ(pk)
0.2 THERMAL LIMIT @ < 150_C. TJ(pk) may be calculated from the data in Figure 4.
TC = 25°C (SINGLE PULSE) At high case temperatures, thermal limitations will reduce
0.1 the power that can be handled to values less than the
1 2 3 5 10 20 30 50 100
limitations imposed by secondary breakdown.
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 5. Maximum Forward Bias

Safe Operating Area
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3
MJF122, MJF127
10,000 300
5000 TJ = 25°C
hfe , SMALL-SIGNAL CURRENT GAIN
3000 200
2000
C, CAPACITANCE (pF)
1000 Cob
500 TC = 25°C
300 100
VCE = 4 Vdc
200 IC = 3 Adc
70 Cib
100
50 50
30 PNP PNP
20
NPN NPN
10 30
1 2 5 10 20 50 100 200 500 1000 0.1 0.2 0.5 1 2 5 10 20 50 100
f, FREQUENCY (kHz) VR, REVERSE VOLTAGE (VOLTS)
Figure 6. Typical Small−Signal Current Gain Figure 7. Typical Capacitance
NPN PNP
MJF122 MJF127
20,000 20,000
VCE = 4 V VCE = 4 V
10,000 10,000
7000
hFE , DC CURRENT GAIN
hFE , DC CURRENT GAIN
5000 TJ = 150°C 5000 TJ = 150°C

3000 3000
2000 2000 25°C
25°C
1000 1000
700
500 -55°C 500 -55°C
300 300
200 200
0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10
IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)
Figure 8. Typical DC Current Gain

VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
3 3
TJ = 25°C TJ = 25°C
2.6 2.6
IC = 2 A 4A 6A IC = 2 A 4A 6A
2.2 2.2
1.8 1.8
1.4 1.4
1 1
0.3 0.5 0.7 1 2 3 5 7 10 20 30 0.3 0.5 0.7 1 2 3 5 7 10 20 30
IB, BASE CURRENT (mA) IB, BASE CURRENT (mA)
Figure 9. Typical Collector Saturation Region
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4
MJF122, MJF127
NPN PNP
MJF122 MJF127
3 3
TJ = 25°C TJ = 25°C
2.5 2.5
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
2 2
VBE(sat) @ IC/IB = 250

1.5 1.5 VBE @ VCE = 4 V
VBE @ VCE = 4 V VBE(sat) @ IC/IB = 250

1 1
VCE(sat) @ IC/IB = 250
VCE(sat) @ IC/IB = 250
0.5 0.5
0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10
Figure 10. Typical “On” Voltages
+5 θV, TEMPERATURE COEFFICIENTS (mV/°C) +5

θV, TEMPERATURE COEFFICIENT (mV°C)
+4 *IC/IB ≤ hFE 3 +4 *IC/IB ≤ hFE 3

+3 +3 25°C to 150°C
25°C to 150°C
+2 +2
- 55°C to 25°C
+1 +1
0 0
-1 *qVC FOR VCE(sat) -1 *qVC FOR VCE(sat)
-2 -2
- 55°C to 25°C
-3 25°C to 150°C -3 qVB FOR VBE
-4 - 55°C to 25°C -4 25°C to 150°C
qVB FOR VBE - 55°C to 25°C
-5 -5
0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10 0.1 0.2 0.3 0.5 1 2 3 5 7 10
Figure 11. Typical Temperature Coefficients
105 105
REVERSE FORWARD REVERSE FORWARD
104 104
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)

μ
VCE = 30 V VCE = 30 V
103 103
102 102
TJ = 150°C
TJ = 150°C
101 101
100°C
100 100°C 100
25°C 25°C
10-1 10-1
-0.6 - 0.4 -0.2 0 +0.2 +0.4 +0.6 +0.8 +1 +1.2 +1.4 +0.6 +0.4 +0.2 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 -1.4
VBE, BASE-EMITTER VOLTAGE (VOLTS) VBE, BASE-EMITTER VOLTAGE (VOLTS)
Figure 12. Typical Collector Cut−Off Region
http://onsemi.com
5
MJF122, MJF127
NPN PNP
MJF122 COLLECTOR MJF127 COLLECTOR
BASE BASE
≈8k ≈ 120 ≈8k ≈ 120
EMITTER EMITTER
Figure 13. Darlington Schematic
TEST CONDITIONS FOR ISOLATION TESTS*
FULLY ISOLATED PACKAGE
LEADS
HEATSINK
0.110, MIN
Figure 14. Mounting Position

*Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION
4-40 SCREW CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
NUT HEATSINK
Figure 15. Typical Mounting Techniques*

Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con-
stant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in . lbs will
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the pack-
age. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend
exceeding 10 in . lbs of mounting torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
http://onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220 FULLPAK
CASE 221D−03
ISSUE K
DATE 27 FEB 2009
NOTES:
−T− SEATING
PLANE 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−B− C 2. CONTROLLING DIMENSION: INCH
F 3. 221D-01 THRU 221D-02 OBSOLETE, NEW
S STANDARD 221D-03.
Q U INCHES MILLIMETERS
SCALE 1:1 DIM MIN MAX MIN MAX
A A 0.617 0.635 15.67 16.12
B 0.392 0.419 9.96 10.63
1 2 3 C 0.177 0.193 4.50 4.90
D 0.024 0.039 0.60 1.00
H F 0.116 0.129 2.95 3.28
K −Y− G 0.100 BSC 2.54 BSC
H 0.118 0.135 3.00 3.43
J 0.018 0.025 0.45 0.63
K 0.503 0.541 12.78 13.73
G J L 0.048 0.058 1.23 1.47
N 0.200 BSC 5.08 BSC
N R Q 0.122 0.138 3.10 3.50
L R 0.099 0.117 2.51 2.96
S 0.092 0.113 2.34 2.87
D 3 PL U 0.239 0.271 6.06 6.88
0.25 (0.010) M B M Y
MARKING
DIAGRAMS
STYLE 1: STYLE 2: STYLE 3:

PIN 1. GATE PIN 1. BASE PIN 1. ANODE
2. DRAIN 2. COLLECTOR 2. CATHODE
3. SOURCE 3. EMITTER 3. ANODE
STYLE 4: STYLE 5: STYLE 6: xxxxxxG AYWW

PIN 1. CATHODE PIN 1. CATHODE PIN 1. MT 1
AYWW xxxxxxG
2. ANODE 2. MT 2
2. ANODE
3. CATHODE 3. GATE 3. GATE AKA
Bipolar Rectifier
xxxxxx = Specific Device Code A = Assembly Location

G = Pb−Free Package Y = Year
A = Assembly Location WW = Work Week
Y = Year xxxxxx = Device Code
WW = Work Week G = Pb−Free Package
AKA = Polarity Designator
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42514B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TO−220 FULLPAK PAGE 1 OF 1
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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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MJF122, MJF127

• No Isolating Washers Required COLLECTOR 2 COLLECTOR 2

• Reduced System Cost

© Semiconductor Components Industries, LLC, 2008 1 Publication Order Number:

Figure 1. Switching Times Test Circuit Figure 2. Typical Switching Times

PD, POWER DISSIPATION (WATTS)

Figure 3. Maximum Power Derating

Figure 4. Thermal Response

5 a transistor: average junction temperature and second

Figure 5. Maximum Forward Bias

Figure 6. Typical Small−Signal Current Gain Figure 7. Typical Capacitance

hFE , DC CURRENT GAIN

5000 TJ = 150°C 5000 TJ = 150°C

Figure 8. Typical DC Current Gain

VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 9. Typical Collector Saturation Region

VBE(sat) @ IC/IB = 250

VBE @ VCE = 4 V VBE(sat) @ IC/IB = 250

Figure 10. Typical “On” Voltages

+5 θV, TEMPERATURE COEFFICIENTS (mV/°C) +5

+4 *IC/IB ≤ hFE 3 +4 *IC/IB ≤ hFE 3

Figure 11. Typical Temperature Coefficients

IC, COLLECTOR CURRENT (A)

Figure 12. Typical Collector Cut−Off Region

≈8k ≈ 120 ≈8k ≈ 120

TEST CONDITIONS FOR ISOLATION TESTS*

FULLY ISOLATED PACKAGE

Figure 14. Mounting Position

4-40 SCREW CLIP

Figure 15. Typical Mounting Techniques*

STYLE 1: STYLE 2: STYLE 3:

STYLE 4: STYLE 5: STYLE 6: xxxxxxG AYWW

xxxxxx = Specific Device Code A = Assembly Location

DESCRIPTION: TO−220 FULLPAK PAGE 1 OF 1

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

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+4 IC/IB ≤ hFE 3 +4 IC/IB ≤ hFE 3