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Transactions on Power Electronics
Abstract—Photovoltaic (PV) systems having converters into a single unit have been proposed and developed,
rechargeable batteries are prone to be complex and costly as illustrated in Fig. 1(b). MPCs are roughly classified into three
because multiple converters are necessary to individually categories: the isolated, partially-isolated, and nonisolated
regulate a load, PV panel, and battery. This paper proposes topologies. Among the most typical isolated MPC topologies is
novel nonisolated multiport converters (MPCs) integrating a triple active bridge (TAB) converter [1]–[3] that is an
a bidirectional PWM converter and phase-shift switched extended version of traditional dual active bridge (DAB)
capacitor converter (PS-SCC) for standalone PV systems. A converters. The number of input and output ports can be
PWM converter and PS-SCC are integrated with reducing extended by adding transformer windings as well as inverter
the total switch count, realizing the simplified system and bridges. The TAB topologies, however, are prone to complexity
circuit. In the proposed MPCs, two control freedoms of duty due to the large switch count because each inverter bridge
cycle and phase shift angle are manipulated to individually requires two or four switches for half- and full-bridge
regulate the load, PV panel, and/or battery. The detailed topologies.
operation analysis was performed to mathematically derive The partially-isolated MPCs, on the other hand, can reduce
gain characteristics and ZVS operation boundaries. For the the switch count by sharing switches between isolated and
battery discharging mode, in which the PV panel is not nonisolated converters [4]–[14]. These MPCs are derived from
available and the MPC behaves as a single-input–single- the combination of a bidirectional PWM converter and an
output converter with two control freedoms available, the isolated converter, such as full- or half-bridge converters [4]–
optimized control scheme achieving the lowest RMS current [7] and resonant converters [8], [9]. Among various promising
is also proposed to maximize power conversion efficiencies. topologies are the DAB-based MPCs [10]–[14] that achieve
Various kinds of experimental verification tests using a 200- zero voltage switching (ZVS) in wide operation ranges,
W prototype were performed to verify the theoretical realizing efficient and flexible power conversion thanks to the
analysis and to demonstrate the performance of the reduced switching loss and their inherent bidirectional power
proposed MPC. conversion capability. Although partially-isolated MPCs are an
appealing topology from the viewpoint of component count, a
Keywords—Bidirectional pulse width modulation (PWM) bulky transformer is indispensable regardless of isolation
converter, multiport converter (MPC), nonisolated dc-dc requirement. For nonisolated applications, nonisolated MPCs
converter, phase-shift switched capacitor converter (PS- are undoubtedly suitable because of the lack of bulky and
SCC)
I. INTRODUCTION
+ dc-dc
Recent power systems are prone to be complex and costly as Load
− Converter
they comprise multiple power sources and loads. Photovoltaic Power
Source
(PV) systems, for example, consist of not only PV panels but
also rechargeable batteries to buffer weather-dependent dc-dc
unstable power generation of panels. Hybrid electric vehicles Battery Converter
also contain multiple power sources including a generator and
multiple batteries for various loads. In such multi-power-source (a)
Pin Pout
systems, multiple converters in proportion to the number of
power sources are required to regulate power sources
Power
individually, as shown in Fig. 1(a). Source
To reduce the converter count in such systems, various kinds + Pbat Multiport
Load
− Converter
of multiport converters (MPCs) that integrate multiple
Battery
Y. Sato and M. uno are with the College of Engineering, Ibaraki University,
Hitachi 316-8511, Japan (e-mail: masatoshi.uno.ee@vc.ibaraki.ac.jp). (b)
H. Nagata is with Hitachi Ltd., Tokyo, Japan (e-mail: redmoon- Fig. 1. (a) Conventional system with multiple converters. (b) MPC-based
koutuki@hotmail.co.jp). system.
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Transactions on Power Electronics
expensive transformers, which also lead to substantial power Fig. 2(b)] and connecting it to the ground, the PS-SCC can be
losses. transformed into the nonisolated DAB converter. Fundamental
Various types of nonisolated MPCs have been reported [15]– operation principle and major features of the nonisolated DAB
[24]. In MPCs operating with a time division manner [15], [16], converter are identical to those of the PS-SCC, though their
all input or output ports share an on-duty cycle in a single suitable voltage conversion ratios differ—voltage conversion
switching cycle, hence resulting in decreased effective duty ratios of M = 2.0 and 1.0 are the best conditions for the PS-SCC
cycle, increased RMS currents, and deteriorated power [31] and DAB converter [32], respectively, from the viewpoint
conversion efficiencies. MPCs with a shared bus can reduce the of power conversion efficiency.
number of passive components to some extent [17]–[19], but A resonant SCC topology [30] is very similar to the PS-SCC
most active switches remain unshared. Topology reported in in Fig. 2(b) but is considered not suitable for the proposed MPC
[20]–[24], on the other hand, can reduce both passive and active in standalone PV systems. Although the inductor L can be
component counts, allowing reduced costs and simplified smaller thanks to resonant operations, relatively narrow voltage
topology. These topologies, however, pose major issues such as regulation ranges of resonant topologies are a major drawback.
narrowed operation ranges [20]–[22], unshared ground [23], Since voltages of rechargeable batteries and PV panels vary
and increased circuit volume due to the requirement of significantly, PS-SCCs with wider regulation ranges are a
numerous inductors [24]. preferable topology—for applications where voltage regulation
Switched capacitor converters (SCCs) are widely known as ranges are not of importance, resonant SCCs would be an
high power-density converters for nonisolated applications. appealing candidate from the viewpoint of circuit
SCCs chiefly rely on capacitors rather than inductors as an miniaturization.
energy storage medium in circuits, realizing miniaturized
B. Derivation of Proposed MPCs
circuit design because an energy density of discrete capacitors
is 100–1000 times greater than that of similarly-scaled By sharing two switches (Q1 and Q2) of the bidirectional
inductors [25]–[27]. Power conversion efficiencies of SCCs, PWM converter and PS-SCC or nonisolated DAB converter,
however, are known to decrease when the required load voltage the proposed SCC-MPC and DAB-MPC can be derived, as
is lower than the theoretically attainable voltage [29]. To cope shown in Figs. 3(a) and (b). Switches, Q1 and Q2, are shared by
with this issue, hybrid SCCs employing an additional inductor two circuits, hence reducing the total switch count and realizing
to realize efficient voltage regulation capability have been the simplified topology.
proposed. With a single additional inductor, SCCs can be Although the PS-SCC and nonisolated DAB converter are
modified to be hybrid SCCs that can be regulated with PWM integrated with the bidirectional PWM converter, their original
[27], [28], PFM [29], [30], or phase-shift (PS) control [31]. features and suitable voltage conversion ratios are essentially
Despite the additional inductors, power densities of hybrid retained. Hence, a suitable MPC topology should be selected
SCCs are reportedly greater than those of ordinary inductor- with considering applications and requirements. Our target
based converters [25]. In addition to the enhanced power application in this paper, for example, is a standalone PV
densities, the hybrid SCCs with PS control (hereafter called PS- system with the PV panel voltage Vin = 30 V, the battery voltage
SCCs) achieve ZVS and flexible power flow, making them an Vbat = 12–16 V, and the load voltage Vout = 48 V. Therefore, the
attractive candidate for nonisolated MPC topologies. SCC-MPC is preferable because the target system corresponds
This paper proposes nonisolated MPCs based on PS-SCCs to M = 1.6 that is closer to M = 2.0 than M = 1.0. The following
for standalone PV systems. A traditional bidirectional PWM sections focus mainly on the SCC-MPC.
converter and PS-SCC are integrated with sharing active
switches, achieving simplified circuit. The remaining of this
Q4
paper is organized as follows. Section II presents the derivation
and major features of the proposed MPCs. Section III
Q3 C
introduces three operation scenarios and control schemes in the Q2 a×
proposed MPCs. The detailed operation analyses will be Cout
Cin Q2 L
performed in Sections IV and V. A design example for a 200- L
W experimental prototype will be presented in Section VI, Cin
Cout Q1 Q1
followed by the experimental verification in Section VII. The
proposed and conventional MPCs will be compared from (a) (b)
various aspects in Section VIII.
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Transactions on Power Electronics
Phase-Shift Switched Capacitor Converter (PS-SCC) capacitors are nearly identical in the ladder-SCC, allowing
simple circuit design and good modularity. In the Dickson SCC,
Q4 Iout on the other hand, capacitors’ voltage stress varies depending
on positions. A capacitor count can be reduced with the series-
Q3 vds(Q3) parallel SCC, but switches must be properly selected with
considering individual voltage stresses. The Fibonacci SCC is
Bidirectional PWM Converter VC a suitable topology for applications needing high step-up or -
×a C
Q2 Vout down voltage conversion, whereas both switches and capacitors
Dblock Iin vL Cout are exposed to different voltage stresses depending on positions,
Ibat vLbat i iL L
Lbat resulting in increased design difficulty. The target application
Vin Cin in this paper is a 200-W standalone PV system with the voltage
Lbat
Vbat vds(Q1) gain M = 1.6, as mentioned in Section II-B. Given the target
Cbat
Q1 specification, the ladder-type SCC-MPC is considered to be the
(a)
best topology from the viewpoint of design simplicity.
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Q6 Q6
Q5 L2 Q5 L2
Q4 C2 Q4 C2
Ladder
C3 C3
Q3 Cout
Q3 L1 Cout L1
Q2 C1 Lbat Q2 C1
Cin
Cin b×
Q1 Cbat Q1
Q6 Q6
Q5 L2 C3 Q5 L2 C3
Dickson Q4 Q4
Q3 L1 C2 Cout Q3 L1 C2 Cout
C4 C4
Q2 Lbat Q2
Cin
Cin b× C1
Q1 C1 Cbat Q1
Q3 Q6 Q3 Q6
Series-parallel L1 L2 Q7 L1 L2 Q7
Q2 Q5 Q2 Q5
Cin C1 C2 Cin C1 Lbat C2
×b Cout Cout
Q1 Q4 Q1 Cbat Q4
L1 L2 Q7 L1 L2 Q7
Q3 Q6 Q3 Q6
Fibonacci
Q2 C1 Q5 C2 Q2 C1 Lbat Q5 C2
Cout Cout
Cin b× Cin
Cbat
Q1 Q4 Q1 Q4
the surplus power (i.e., Pin−Pout) is greater than the acceptable cycle d and PS angle φ for one output port. The operation in the
charging power of the battery. Hence, a charging current or battery discharging mode will be detailed in Section V-A. In
voltage is regulated to be constant. In other words, Pbat is addition, the optimal control strategy manipulating both d and
regulated based on the CC–CV charging scheme in this φ to maximize the power conversion efficiency in the battery
operation mode. The MPC regulates Pbat and Pout with PWM discharging mode will be proposed in Section V-B.
and PS controls, respectively, whereas Pin is unregulated in this MPPT Mode (Pin > Pout or Pin < Pout) [Fig. 4(c)]: The PV
mode. The detailed operation analysis for the battery charging panel is regulated with PWM control employing an MPPT
mode will be performed in Section IV. algorithm, regardless of the load power demand, while Pout is
Battery Discharging Mode (Pin = 0) [Fig. 4(b)]: When the regulated by PS control. Thus, Pin and Pout are regulated with
input power source is no longer available (e.g., PV panels at PWM and PS controls, respectively, whereas Pbat is unregulated
night), the battery alone supplies the whole load power. Hence, in the MPPT mode. When Pin surpasses Pout (i.e., Pin > Pout), Pbat
the MPC in this mode behaves as a single-input–single-output is positive, and the surplus power is allocated for battery
converter. However, there are two control freedoms of duty charging. The power flow in this case is identical to that in the
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2(n +1) 2n +2 n +1
Unform voltage stresses
Ladder M n +1 High capacitor count
of swiches and capacitors
Unform switch voltage
Dickson 2(n +1) 2n +3 n +1 M n +1 High capacitor count
stresses
Series- Non-uniform switch voltage
3n +1 n +3 n +1 M n +1 Low capacitor count
Parallel stresses
M 2, 3, 5, 8... High voltage gain Non-uniform voltage stresses
Fibonacci 3n +1 n +3 n +1
for n = 1, 2, 3, 4… Low capacitor count of switches and capacitors
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T3
2 fL
bat
,
(5)
VV
i (T ) I d 1 d Vin Pout IoutVout in out d 2d 1 d d (13)
2 fL
Lbat 2 bat
2 fLbat
Pout in (13) contains not only φd but also d, suggesting the
where Ibat is the battery charging current. interdependence between PWM and PS controls.
Mode 1 (0 ≤ t < T1) [Fig. 7(a)]: Q1 and Q4 are conducting. Pout is normalized by VinVout/2fL to be dimensionless and is
The voltages across L and Lbat, vL and vLbat, are Vout−VC and plotted as functions of d and φd, as shown in Fig. 8. The
−Vbat, respectively. Therefore, iL in Mode 1 is expressed as normalized Pout peaks to be 0.0625 at d = 0.5 and φd = 0.25, and
it decreases as d moves away from 0.5. Hence, L needs to be
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Transactions on Power Electronics
Q4
C VC
Q3
Cout Vout
Dblock L vL
Lbat Q2
Vin Cin
vLbat iLbat iL
Vbat Cbat
Q1
(a)
Q4
Fig. 8. Normalized Pout as functions of d and φd.
C VC
Q3
Cout Vout
Dblock L vL Similar to traditional PS converters [13], parasitic capacitances
Lbat Q2 and body diodes of switches (not shown in figures for the sake of
Vin Cin
vLbat iLbat iL clarity) allow all switches are turned off at zero voltage,
Vbat Cbat achieving ZVS turn-off. Meanwhile, ZVS turn-on conditions
Q1
depend on current directions at the turn-on moment. The
(b)
proposed MPCs achieve ZVS turn-on under the condition that
body diodes conduct before the switches are turned-on. In other
Q4
words, the currents flowing through Q1–Q4 must be negative
before turning-on. Note that the currents flowing through Q1 and
C VC
Q3 Q2 are the sum of iL and iLbat. Therefore, the ZVS constraints are
Cout Vout
Dblock given by
L vL
Lbat Q2 Q1 : iL (0) iLbat (0) 0
Vin Cin Q : iL (T2 ) iLbat (T2 ) 0
vLbat iLbat iL 2
Vbat Cbat
Q1 Q3 : iL (T1 ) 0
Q4 : iL (T3 ) 0
(c)
1 d 1 M 2 d d d 1 l
Q1 : k
Q4 d 2d 1 d d (15)
d 1 M 1 2 d d 1 d 1 l ,
Q3
C VC Q : k
d 2d 1 d d
2
Cout Vout
Dblock
d 1 d 2 M 2
L vL
Lbat Q2 Q 3 :
Vin Cin Q : d d 2 M 2
vLbat iLbat iL 4
Vbat Cbat
Q1 where k is the current ratio of the battery to load (k = Ibat/Iout), l
(d) is the ratio of L to Lbat (l = L/Lbat), and M is the voltage
Fig. 7. Operational modes in CC–CV battery charging mode: (a) Mode 1, conversion ratio (M = Vout/Vin).
(b) Mode 2, (c) Mode 3, (d) Mode 4. The ZVS boundaries of (15) are shown in Fig. 9. Around M
= 2.0, the ZVS operation is feasible at any φd. As M moves away
determined with considering voltages of Vin, Vout, and variation from 2.0, ZVS ranges narrow especially when φd is small in the
ranges of d and φd in target applications. A design example of a light-load region—small φd corresponds to low Pout as indicated
200-W prototype for standalone PV systems will be presented by (13) and shown in Fig. 8. It should be noted that Q1 and Q2
in Section VI. determine the ZVS conditions in the range of M > 2.0, while the
D. RMS Current of Inductor boundaries at M < 2.0 were due to Q3 and Q4. According to Fig.
9(a), the ZVS range is dependent on d. Figure 9(b) suggests that
The RMS current of L, IL_RMS, is derived from (4), as shown the ZVS range at M > 2.0 (i.e., constraints by Q1 and Q2)
at the bottom of this page. narrows as k increases. The larger the value of l, the wider will
IL_RMS is important for not only calculating a Joule loss but be the ZVS range at M > 2.0, as shown in Fig. 9(c). Thus, ZVS
also determining the optimized control in the battery ranges are dependent on M and operation conditions, and ZVS
discharging mode, as will be detailed in Section V-B. operations are prone to be lost in the light-load region. In the
E. ZVS Conditions design example in Section VI, the proposed MPC is designed
to achieve ZVS operations in the certain heavy-load region with
1 1
4 d 2Vin Vin Vout d 3d 1 d d 2 1 d 2Vin Vout
T
iL 2 t dt
2 2
I L _ RMS (14)
T 0
2 3 fL
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k=2
2.5 k=1 k=3
2.0
ZVS for all switches
1.5 k = 1, 2, 3
d = 0.4, l = 0.1 Fig. 10. Key operation waveforms in battery discharging mode.
1.0
0 0.05 0.10 0.15 0.20 0.25
Phase-Shift Angle, φd There are two control freedoms of d and φd in (16), whereas the
(b) SCC-MPC in this mode is equivalent to a single-input–single-
3.0 output converter. In other words, the two control freedoms can
Voltage Conversion Ratio, M
l = 0.2
l = 0.5 be manipulated for the output regulation. With the aim of
2.5 minimizing the loss in the heavy-load region, an optimal control
l = 0.1
scheme in the battery discharging mode is proposed in the next
2.0 ZVS for all switches subsection.
B. Optimal Control Scheme
1.5 l = 0.1, 0.2, 0.5
In general, switching loss, iron loss, and Joule loss are major
d = 0.4, k = 2.0
1.0 loss factors in switching converters. As discussed in Section IV-
0.05 0.10 0.15 0 0.20 0.25 E, ZVS ranges of the proposed MPC are dependent on d and φd,
Phase-Shift Angle, φd and ZVS operations might be infeasible especially in the light-
(c) load region. In the heavy-load region, on the other hand, ZVS
Fig. 9. ZVS boundaries: (a) k = 2.0, l = 0.1, and d = 0.4–0.6, (b) d = 0.4, l ranges widen, and Joule losses generally become dominant.
= 0.1, and k =1.0–3.0, (c) d = 0.4, k = 2.0, and l =0.1–0.5. Hence, the Joule loss minimization is a key to enhance
efficiency performance in the heavy-load region.
considering target applications, and ZVS operations in the light- As illustrated in Figs. 10 and 11, iL always flows through L,
load region are compromised. C, and either Q3 or Q4 [i.e., iL(t) = iQ3(t) − iQ4(t), see the 3rd
panel from the bottom in Fig. 10], and therefore, Joule losses of
V. OPERATION ANALYSIS FOR BATTERY DISCHARGING these components can be simply determined with the inductor’s
MODE RMS current, IL_RMS. As for Q1 and Q2, iL together with iLbat
A. Operation Mode flows through them, hence iL(t) – iLbat(t) = iQ1(t) – iQ2(t) (see the
4th panel from the bottom in Fig. 10). Since iLbat can be assumed
The input power from the PV panel is zero in the battery
to be a dc current of Ibat, the RMS currents of iQ1(t) – iQ2(t) are
discharging mode. The input port can be regarded as an open
circuit providing no power, and hence, the SCC-MPC in this IL_RMS 2 +ILbat 2 . ILbat is simply equal to Pbat/Vbat, and therefore,
mode is equivalent to a cascaded converter comprising the
PWM boost converter and PS-SCC with Vbat as an input power its Joule loss is independent on d and φd. Thus, the minimization
source. The key operation waveforms and current flows in the of IL_RMS is equivalent to that of Joule losses of L, C, and all
battery discharging mode are shown in Figs. 10 and 11, switches. Furthermore, since an iron loss of L at a given
respectively. frequency increases with a peak-to-peak flux density or a peak-
The output power in this mode is derived by combining (2) to-peak current, the minimization of IL_RMS also translates to
and (13), as minimize the iron loss.
The two control freedoms of d and φd are determined to
VbatVout d
Pout 2d 1 d d (16) minimize IL_RMS in order to maximize the power conversion
2 fL d efficiency. The substitution of (2) into (14) yields IL_RMS in the
battery discharging mode, shown at the bottom in this page.
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Optimal φd
Optimal d
Dblock L vL
Lbat Q2
0.09
Vin Cin 0.6
vLbat iLbat iL 0.06
Vbat Cbat
Q1
0.5
0.03
(b) φd = 0.0012Pout + 0.0036
0 0.4
0 20 40 60 80 100
Q4
Load Power, Pout [W]
C VC
(b)
Q3 Fig. 12. Derivation of optimal φd and d at Vbat = 16 V, Vout = 48 V, f = 100
Cout Vout kHz, L = 3.3 μH: (a) IL_RMS as a function of φd, (b) optimal φd and d as a
Dblock L vL function of Pout.
Lbat Q2
Vin Cin
vLbat iLbat iL
Vbat Cbat
Q1 The optimal φd and d as a function of Pout are plotted in Fig.
12(b). Both characteristics are almost linear, and their
(c)
approximated functions can be obtained on the basis of linear
approximation, as designated in Fig. 12(b). By arranging these
Q4 two functions, the relational equation for the optimal φd and d
at Vbat = 16 V, Vout = 48 V, f = 100 kHz, and L = 3.3 μH (the
Q3
C VC same condition as the experiment) can be yielded, as
Dblock
Cout Vout d 1.21 d 0.70 (19)
L vL
Lbat Q2 By operating the MPC in the battery discharging mode so
Vin Cin
vLbat iLbat iL that d and φd obey (19), the RMS current as well as the Joule
Vbat Cbat
Q1 loss are minimized, achieving the maximized power conversion
(d) efficiency. This optimal control scheme of (19) is implemented
Fig. 11. Operational modes in battery discharging mode: (a) Mode 1, with the control block diagram (see Fig. 5) and will be
(b) Mode 2, (c) Mode 3, (d) Mode 4. experimentally demonstrated in Section VII-C.
We will derive a relational equation that minimizes IL_RMS of VI. DESIGN EXAMPLE
(17) with two variables of φd and d. However, this equation is
This section presents a design example of a 200-W
impractically complex to solve algebraically. Hence, in the
experimental prototype. The design target is a standalone PV
following, the relational equation is derived numerically.
system with Pout = 100 W, Pbat = 100 W, Vin = 30 V, Vout = 48
Solving (16) produces d, as
V (i.e., M = 1.6), and Vbat = 12–16 V at f = 100 kHz. All the
1 A A2 A circuit elements are assumed ideal to simplify the design
d 1 1 2 d (18)
2 2 d 2 d d
2
procedure.
where A = 2fLPout/VbatVout. Substitution of (18) into (17) yields A. Inductor for Bidirectional PWM Converter
the relationship between IL_RMS and φd at a given value of Pout, According to the voltage conversion ratio of (2), d varies
as shown in Fig. 12(a). These characteristics suggest that, at any between 0.40 and 0.54. The inductance Lbat for the bidirectional
Pout, an optimal φd minimizing IL_RMS exists. PWM converter is designed considering the largest current
ripple ratio.
2
1 V V 2 2V
I L _ RMS 4d 2 bat bat Vout d 3d 1 d d 2 1 d bat Vout (17)
2 3 fL d d d
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At Vbat = 12 V, Ibat becomes the largest value of 8.33 A. In Sections VI-A and -B, as listed in Table III. The largest stresses
general, the inductance Lbat is designed so that its ripple ratio is of each switch are highlighted with grey. The MPPT mode, an
around 30%, and therefore, intermediate mode between the battery charging and
∆ 1 discharging modes, was excluded in this table because voltage
30% →
and current stresses in the MPPT mode are lower than those in
0.6 12 10
(20) other modes. In the battery charging mode, voltage stresses are
28.8 μH simply equal to Vin = 30 V or Vout−Vin = 18 V. In the battery
0.3 8.33 discharging mode, on the other hand, voltage stresses vary
where ILbat is the ripple current of Lbat. An inductor with 33 because the voltage of Cin is dependent on d. Current stresses
H was selected based on (20). changed with operation modes. In summary, Q1 and Q2 are
exposed to higher voltage and current stresses, and larger
B. Inductor and Capacitor for PS-SCC conduction losses (or Joule losses) are expected from these
As shown in Fig. 9, ZVS operation is not feasible with small switches.
φd in the light-load region—small φd corresponds to low Pout as
indicated by (13) and shown in Fig. 8. ZVS range might be VII. EXPERIMENTAL RESULTS
extended with large l (= L/Lbat), as shown in Fig. 9(c), but
A. Prototype and Measured Waveforms
circulation currents tend to increase with L and φd, eventually
resulting in increased Joule loss [37]. Theoretical voltage Based on the design procedure presented in Section VI, a
stresses of switches are lower than Vin = 30 V for the target 200-W prototype (Pout = 100 W and Pbat = 100 W) was built, as
application, and therefore, Joule losses would be dominant shown in Fig. 13, and its component values are listed in Table
rather than switching losses. IV. The prototype was designed for the standalone PV system
In this design example, L is designed to achieve ZVS with Vin = 30 V, Vbat = 12–16 V, and Vout = 48 V. Gate drivers
operations in the heavy-load region of Pout > 80 W. According were powered by external auxiliary power supplies. A control
to Fig. 9(a), ZVS operation is feasible with φd > 0.10 in the card TMS320F28335 (Texas Instruments) was used for
range of d = 0.40–0.54. For Pout to be 80 W with φd > 0.10, L feedback control and to generate gating signals at f = 100 kHz.
was determined to be 3.3 H based on (13). Once L is designed, The measured key operation waveforms at the full load with
(13) also yields the maximum φd = 0.15 at Pout = 100 W and d Vbat = 16 V are shown in Fig. 14. These waveforms agreed well
= 0.40. with the theoretical ones, verifying the operation of the
The capacitor C is designed large enough so that the prototype.
resonance between C and L does not influence the PS operation. Screenshots of the switches’ drain-source and gate-source
The capacitance C was determined to be 80 F so that the voltages, vds and vgs, in the battery charging mode at Pout = 100
resonant frequency of 1⁄2π√LC is approximately one-tenth of
W and Pbat = 100 W are shown in Fig. 15. The measured vds
dropped to zero before corresponding vgs was applied, verifying
f = 100 kHz.
the ZVS operation for all switches.
C. Voltage and Current Stresses of Switches
Switches experience different voltage and current stresses
depending on operation mods, and therefore, switches need to
be selected with considering the largest stress. The currents
flowing through Q1 and Q2 are the sum of iL and iLbat, whereas
those of Q3 and Q4 are only iL, as shown in Figs. 7 and 11. Hence,
the switch current stresses can be determined from iL and iLbat.
The voltage stresses of Q1–Q2 and Q3–Q4 are equal to Vin (or the
voltage of Cin) and Vout−Vin, respectively.
The maximum voltage and current stresses of switches in the
CC–CV battery charging mode and battery discharging mode Fig. 13. Photograph of 200-W prototype.
were theoretically derived using the designed parameters in the
Table IV. Component values.
Table III. Maximum voltage and current values in each operation mode.
Component Value
CC–CV Battery Battery discharging
charging mode mode Q1–Q4 FDD390N15A, Ron = 33.5 mΩ
Switch
Voltage Current Voltage Current L 3.3 μH, Rac = 120 mΩ (at 100 kHz)
[V] [A] [V] [A] Lbat 33 μH, Rdc = 30 mΩ
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Transactions on Power Electronics
30
20 the Vbat regulation, as discussed in Section IV-A.
10
0
The measured output characteristics in the battery
-10 discharging mode are shown in Fig. 17. The characteristics with
30
the fixed values of d exhibited that Pout was dependent on both
vds(Q3) [V]
20
10 d and φd, as indicated by (16). With the optimal control of (19),
0 Pout linearly increased with φd, agreeing with the characteristic
-10
10 shown in Fig. 12(b).
8
iLbat [A]
0
-5 model was derived but is not shown in this paper for the sake of
-10
Time [5 μs/div.]
(a) 100
60
vds(Q1) [V]
40
Load Power, Pout [W] 80
20
0
-20 60
30 d Exp. Cal.
vds(Q3) [V]
20 40
10 0.50 ●
0 0.40 ▲
-10
20 0.35 ■
0
-2 0
iLbat [A]
-4
-6 0 0.05 0.10 0.15 0.20
-8 Phase-Shift Angle, φd
-10
10 (a)
5 24
iL [A]
0
Battery Voltage, Vbat [V]
-5
-10 18
Time [5 μs/div.]
(b)
Fig. 14. Measured key waveforms in (a) battery charging mode at Pout = 100 12 φd Exp.
W and Pbat = 100 W, and (b) battery discharging mode at Pout = 100 W.
0.11 ●
6 Theoretical 0.06 ▲
0 ■
0
0.2
0.4 0.5 0.6 0.7 0.8 0.3
Duty Cycle, d
(b)
Fig. 16. Measured and theoretical output characteristics in battery
charging mode: (a) Pout as a function of φd, (b) Vbat as a function of d.
100
(a) (b) d = 0.50
Load Power, Pout [W]
80
d = 0.55
60 d = 0.60
40 d = 0.65
20
optimized control
0
0.05 0.10 0 0.15 0.20
(c) (d)
Phase-Shift Angle, φd
Fig. 15. ZVS waveforms in battery charging mode at Pout = 100 W and
Pbat = 100 W: (a) Q1, (b) Q2, (c) Q3, (d) Q4. Fig. 17. Measured output characteristics in battery discharging mode.
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Transactions on Power Electronics
100 8
Fixed Pbat Q4
Pbat = 100 W
Q3
95 6 Switching Loss
Efficiency [%]
Q2
Loss [W]
Q1 Joule
90 Pbat Exp. Cal. 4 Loss
Lbat
100 W ●
85 50 W ▲ 2 L
0W ■
Cin
80 Iron Loss
0
0 50 100 150 200 20 60 100
Total Power, Pout + Pbat [W] Load Power, Pout [W]
(a) (a)
100 8 Q4
Fixed Pout Pout = 100 W Q3
95 6 Q2
Efficiency [%]
Loss [W]
Q1 Joule
90 Pout Exp. Cal. 4 Loss
Lbat
100 W ●
85 60 W ▲ L
20 W ■ 2
Cin
80 Iron Loss
0
50 100 0150 200 0 50 100
Total Power, Pout + Pbat [W] Battery Power, Pbat [W]
(b) (b)
Fig. 18. Measured and calculated power conversion efficiencies in battery Fig. 20. Estimated loss breakdowns in battery charging mode at (a) fixed Pbat =
charging mode at (a) fixed Pbat and (b) fixed Pout. 100 W and (b) fixed Pout = 100 W.
100
optimized control in the battery discharging mode is equivalent to a two-stage
converter comprising a boost converter and PS-SCC, as
Efficiency [%]
90 D. Loss Analysis
d = 0.55
d = 0.65
The estimated loss breakdowns based on the theoretical loss
85 d = 0.50 d = 0.60 model in the CC–CV battery charging mode are shown in Fig. 20.
Iron losses were calculated based on Steinmetz's equation [38].
80 The switching loss was assumed zero within the ZVS region
40 60 0
80 20
100 specified in Fig. 9. Switching losses occurred when Pout = 20 W
Load Power, Pout [W] and 60 W [see Fig. 20(a)] because the prototype was designed to
Fig. 19. Measured power conversion efficiencies in battery discharging achieve ZVS operations under the heavy-load condition of Pout >
mode with optimized and fixed-d controls. 80 W, as discussed in Section VI-B. However, the portion of the
switching losses was very minor in comparison with Joule losses.
page length. Losses due to gate driving are excluded from these The Joule loss of L was the most dominant factor in the entire
results as gate drivers were powered by external auxiliary range because of its relatively large resistance due to the skin
power supplies. The measured and calculated efficiencies effect at 100 kHz (Rac = 120 m). Meanwhile, the Joule loss of
showed good agreement, verifying the theoretical loss model, Q2 also took a significant portion because both iL and iLbat flowed
based on which loss breakdowns will be discussed in Section through Q2.
VII-D. The measured efficiencies deteriorated in the light-load
region due to the iron loss. In the medium- to heavy-load E. Transient Response Characteristics
regions, on the other hand, efficiencies were greater than 95%. To investigate the influence of the interdependence between
The efficiency at the full load of 200 W was as high as 95.7%. PS and PWM controls in the CC–CV battery charging mode
The measured power conversion efficiencies in the battery (see Section IV-C), transient response characteristics were
discharging mode are shown in Fig. 19. With the fixed-d control, measured with applying step changes in Iout and Ibat, as shown
efficiencies dropped in the light- and heavy-load regions. The in Fig. 21. Vout and Vbat were regulated to be 48 V and 16 V by
optimal control, on the other hand, improved efficiencies in the PS and PWM controls, respectively, while Iout or Ibat abruptly
entire region, demonstrating the efficacy of the proposed increased from 50 W to 100 W using an electronic load
optimal control scheme. The efficiency at the full load of 100 operating in a constant-current mode. Measured transient
W was as high as 91.7%. The efficiencies under the heavy-load response characteristics are shown in Fig. 21. Vout slightly
conditions in the battery discharging mode were inferior to
those in the battery charging mode because the proposed MPC
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Transactions on Power Electronics
100
Period 1 Period 2 Period 3
80
Pin Pout
60
Power [W]
40
20
0
Pbat
-20
Charging Discharging Charging
-40
0 10 20 30 40 50 60 (b)
Fig. 23. (a) Experimental setup for mode transition test. (b) Resultant
Time [s] voltage, current and power profiles.
Fig. 22. Experimental results of power balance test with MPPT control.
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Transactions on Power Electronics
PWM
Proposed 4 0 2 4 95.7% d Eq. (13) —
PS
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Transactions on Power Electronics
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