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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3071706, IEEE
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Multiport Hybrid DC Circuit Breaker with

Reduced Fault Isolation Time and Soft
Reclosing Capability
Shuo Zhang, Student Member, IEEE, Guibin Zou, Member, IEEE, Xiuyan Wei, Student
Member, IEEE, and Chengquan Zhang, Student Member, IEEE

IGBT Insulated gate bipolar transistor.

Abstract—The hybrid dc circuit breaker is one of the LCS Load commutation switch.
most promising dc circuit breakers (DCCBs). However, its MB Main breaker.
cost is relatively high, and the completion of its fault MHCB Multiport hybrid dc circuit breaker.
isolation is significantly delayed because of the large MMC Modular multilevel converter.
current limiting inductors configured in the multi-terminal
MOV Metal oxide varistor.
dc grid. Besides, due to the utilization of overhead lines,
the probability of temporary faults is much increased,
MTdc Multi-terminal direct current.
which means there is a great possibility that the power OHL Overhead line.
supply can be rapidly restored by reclosing DCCBs. RCB Residual current breaker.
However, the temporary faults must be distinguished from RIB Resistor-isolation breaker.
the permanent faults before the reclosing operation to SM Sub-module.
avoid damaging the fragile power electronic equipment. TMS Traditional mechanical switch.
Therefore, considering the above issues, a novel multiport UFD Ultra-fast disconnector.
hybrid dc circuit breaker (MHCB) is proposed in this paper.
The MHCB mainly has three advantages: the reduced
I. INTRODUCTION
implementation cost by sharing the expensive main
breaker among multiple lines, the reduced fault isolation
time by bypassing the current limiting inductor during
energy dissipation, and the ability to reclose softly.
W ITH the increasing demand for long-distance
high-capacity power transmission and renewable energy
integration, the MMC-based MTdc grid has become a research
Extensive simulations and experiments verify the hotspot worldwide [1], [2]. However, it is vulnerable to dc
effectiveness of the device. In addition, the comparison of faults due to its low impedance at the dc-side, which requires dc
the new device and existed solutions is presented.
faults to be isolated in the timeframe of milliseconds with the
Index Terms—multi-terminal dc grid, multiport hybrid dc
coordination of protections and DCCBs [3], [4].
circuit breaker, shared main breaker, fault isolation time, The DCCBs that have been proposed in the literature can be
overhead line, soft reclosing. mainly divided into three types, including mechanical DCCBs,
solid-state DCCBs, and HCBs [5], [6]. The HCB is considered
NOMENCLATURE one of the most promising DCCBs, which has fast operation
speed and low conduction loss [6]. The topology of the typical
ACCB Alternating current circuit breaker. HCB is illustrated in Fig. 1. It includes an LCS, a UFD, an RCB,
BC Breaker cell. and an MB. The MB comprises several BCs, and each BC
CLI Current limiting inductor. contains many semiconductor switches such as IGBTs and an
CLR Current limiting resistor. arrester [7], [8]. Therefore, the MB is expensive, leading to the
DCCB Direct current circuit breaker. difficulty to configure the HCBs on a large scale in MTdc grids.
DSP Digital signal processor.
EDR Energy dissipation resistor.
ESR Equivalent series resistance.
FIT Fault isolation time.
HCB Hybrid dc circuit breaker.

Manuscript received November 19, 2020; revised January 27, 2021
and March 25, 2021; accepted March 31, 2020. This work was
supported in part by the National Natural Science Foundation of China
under Grant 52077124 and 51677109. (Corresponding author: Guibin
Zou.)
The authors are with the School of Electrical Engineering, Shandong
University, Ji’nan 250061, China (e-mail: 201714182@mail.sdu.edu.cn;
guibinzou@sdu.edu.cn; weixiuyan@sdu.edu.cn;
201914261@mail.sdu.edu.cn).
Fig. 1. Topology of the typical HCB.
During normal operation, the LCS, the UFD, and the RCB in
the HCB are all in the closed state, while the MB is in the open
state. After the fault occurs and the HCB receives the trip signal,
the LCS is first opened, and the fault current starts to be
commutated into the MB. The UFD is opened once the current

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decays to zero. Then, the MB is opened to commutate the fault reasonable topology design in addition to fault isolation. For
current into arresters to dissipate. The semiconductor switches example, the combined HCB in [27] can not only isolate the
in the MB should withstand the protection voltage of arresters fault on any port through the shared MB via the commutation of
during the energy dissipation process. Finally, the fault is diode branches but also balance the load current of each port
physically isolated by opening the RCB. through the embedded multiline current flow controller during
Some researchers have currently proposed several MHCBs normal operation. Similarly, this paper proposes a novel
to significantly reduce the cost by sharing the expensive MB MHCB with multiple functions. In addition to solving the
among multiple adjacent lines, which is an effective and high-cost problem of typical HCBs by sharing the expensive
practical way to achieve full protection of the MTdc grid. Liu et MB, the proposed MHCB can significantly reduce FIT and
al. propose an assembly DCCB in [9], which can greatly reduce energy dissipation pressure of arresters in the MB and reclose
the required number of semiconductor switches. However, it softly without causing large disturbances to the healthy part of
needs to create a short-circuit fault at dc bus lasting about 2 ms MTdc grids.
to achieve the fault isolation. In [10], a dc switchyard is The remainder of the paper is organized as follows. In
proposed, consisting of two MBs and approximately 2n transfer Section II, the topology of the proposed MHCB is introduced.
switches for n protected lines. Compared with the typical HCB, The operation principles of the proposed device are elaborated
its cost is reduced to some extent, while its topology and control in Section III. The performance of the MHCB is verified by
are more complicated. The MHCBs proposed in [11-16] utilize simulations and experiments in Section IV and Section V,
thyristors, diodes, mechanical switches, or their combinations respectively. Besides, the comparison of the MHCB and
to construct paths for the fault current being commutated into existed solutions is presented. Some conclusions are given in
the shared MB. Therefore, the configuration of an MB for each Section VI.
protected line is avoided, and the implementation costs of the
MHCBs can be greatly reduced.
Furthermore, since OHLs are the mainstream form of power
transmission in the MTdc grid, their relatively high fault
possibility, especially temporary faults, must be considered. In
ac systems, the reclosing of ACCB after the fault isolation
dramatically shortens the power outage and improves the
operational reliability [17], [18]. As for the MTdc grid that
transmits power through OHLs, there is also a great possibility
that the power supply of the fault line can be restored rapidly by
reclosing HCBs. In [19], the MB is directly reclosed after the
fault is isolated by HCBs. If the fault is temporary, the voltage
(a)
of the fault line will gradually rise to the rated voltage, and the
power supply can be restored by closing the UFD and the LCS
in turn. Otherwise, the large fault current will be generated,
which causes the fragile power electronic components in the
MTdc grid to undergo two consecutive fault strikes in a short
period and may lead to the protection maloperation. Therefore,
it is necessary to determine whether the fault is temporary or
permanent before reclosing the HCB [18].
To avoid the above reclosing problems, several soft reclosing
methods have been proposed for typical HCBs. In [20], the
SMs in MB are grouped and sequentially turned on to identify
the temporary fault. However, the MB should re-open to
interrupt the fault current if the fault is permanent, leading to (b)
Fig. 2. Topology of the MHCB when it is installed on positive or negative
the increased arrester capacity and cooling system requirements. pole. (a) Positive pole. (b) Negative pole.
The reclosing methods proposed in [18], [21-24] utilize
auxiliary circuits, HCBs, or MMCs to inject traveling wave II. TOPOLOGY OF MHCB
signal into the fault line and distinguish between the temporary
and the permanent faults by the characteristics of the signal The topologies of the proposed MHCB installed on different
such as polarity, propagation time, etc. In [25], Li et al. identify poles are illustrated in Fig. 2, which have n ports and can
the temporary fault by reclosing the RCB and judging whether substitute n typical HCBs, respectively. They both consist of n
the residual voltage exceeds the preset threshold. LCSs, n UFDs, n RCBs, 2n diode branches, n thyristor
In addition, since the large CLIs are usually installed in the branches, an MB, n CLIs, a RIB, an EDR Re, and a CLR Rc. The
MTdc grid to restrain the fault current [26], the FIT will be only difference between the topologies in Fig. 2(a) and Fig. 2(b)
significantly prolonged, which will put higher requirements on is the position of thyristor branches, EDR, CLR, and RIB,
the equipment of the thermal stability and the ability to owing to the different fault current direction of positive and
withstand overcurrent and overvoltage. negative poles. As can be seen from Fig. 1 and Fig. 2, the MB in
The MHCB can be equipped with other functions through the MHCB only needs to interrupt the current in a fixed
direction (from top to bottom in Fig. 2) owing to the

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Fig. 3. Analysis model of the n-terminal dc grid.

configuration of diode branches. Therefore, it can save half of U dc =  Lt + ( Ls1 + Lr1 ) M  i p
the semiconductor switches compared to the MB in the typical 
HCB. The UFD is specially designed to achieve ultra-fast  di
 p1 = ei p (1)
operation speed and can open in about 2 ms in the zero-current  dt
condition [28]. The RCB and the RIB do not have the 
t di pk
i (t ) = I
high-speed requirement and therefore can use TMSs.  prek + t dt

pk
0 dt
III. OPERATION PRINCIPLES where
e = 1 1 11( n −1)
The proposed MHCB has the same operation principles no 
matter it is installed on the positive or negative pole. Since the   di di pn 
T

i p =  p 2 
difference between the fault characteristics of different poles is   dt dt 1( n −1)
the fault current direction, only the positive pole layer of the 
U dc = U dc e
T
MTdc grid is discussed in this part. The equivalent model of the 
n-terminal dc grid illustrated in Fig. 3 is used to analyze the  Lt = diag ( Lt 2 Ltn )( n −1)( n −1) (2)

operation principles of the MHCB.  Ltk = Leqk + Lkk + Lk + Lsk
To simplify the analysis with sufficient accuracy, the 
 1 1
following aspects should be considered: M =  
1) The OHLs are modeled as lumped inductors, and the   
 1 1 ( n −1)( n −1)
equivalent inductance of Line k is denoted by Lk. 
2) The short-circuit fault F occurs on Line 1 at time t0, and it
divides Line 1 into two parts. The equivalent inductances
of the left and the right sides are Ll1 and Lr1, respectively.
3) The MMCk is modeled as a constant voltage source Udc in
series with an inductor Leqk (the equivalent inductor of the
three-phase arm inductors of MMC).
4) The CLI near the MMCk is denoted by Lkk, and the CLI Lsk
of Line k is configured in the MHCB.
5) The pre-fault current ipk(t < t0) of port k is Iprek.
6) The ideal model of the arrester is considered, which means
its voltage will change immediately to the protection
voltage once the fault current is commutated into it. Fig. 4. The fault current paths of the MHCB from time t0 to time t1.
A. Fault Isolation Especially, the current ip1 of the fault port P1 is:
i p1 (t ) = I pre1 + (t − t0 )U dc e  Lt + ( Ls1 + Lr1 ) M  eT
−1
Before the fault occurs, LCS1-LCSn, UFD1-UFDn, (3)
RCB1-RCBn, and RIB of the MHCB are in the closed state,
It is assumed that the MHCB receives the trip signal at time t1.
while thyristor branches T1-Tn and MB are in the open state.
The time interval between time t0 and time t1 is dominated by
Therefore, the load currents only flow through the
the line protection action time. Then, the MB is closed, and the
LCS-UFD-RCB branches in the MHCB.
LCS1 of the fault port P1 is opened at time t2. From this time, the
After the fault F occurs at time t0, the current ipk (k = 1, 2,…, fault current starts to be commutated from the LCS1-UFD1
n) of port k starts to rapidly rise, as shown in Fig. 4, which can branch to the MB. The current commutation process usually
be obtained by solving: lasts about tens of microseconds [14], [15]. The current flowing
through the UFD1 decays to nearly zero at time t3. At this time,
the UFD1 starts to open. The open time of UFD is considered as
2 ms in this paper [28]. After about 2 ms, the operation of the

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UFD1 is completed at time t4. From time t1 to time t4, the fault  C1  − C2 Req ( t − t5 )

current of each port still satisfies (1)-(3). The fault current paths uc (t ) = C 1 − e 
in the MHCB from time t3 to time t4 are illustrated in Fig. 5.  2
 C1 
1 − e 2 eq 5 
− C R (t −t )
iT1 (t ) =
After time t4, the switch status of the UFD1 is checked. If the
C R  
UFD1 is successfully opened, the MB will be opened at time t5,  2 eq
and the trip signal will be applied on the thyristor branch T1  (5)
simultaneously. Then, the fault current in the MB is i (t ) = i (t ) − C1 (t − t )
 p1 p1 5
C2 Ls1
5
commutated from semiconductor switches to arresters to be 
dissipated. Besides, the CLI Ls1 is bypassed due to the turning − C1  1 − 1  1 − e − C2 Req (t −t5 ) 
on of T1. As a result, the energy stored in Ls1 will mainly be  C R  C L 
dissipated by the resistors Rc, Re in the current path  2 eq  2 s1 

Ls1-T1-Rc/(RIB-Re)-Dd1, which increases the fault isolation where

speed and decreases the energy dissipation pressure of the C1 = ( − 1)U dc e ( Lt + Lr1 M ) −1 eT
arresters. The fault current paths of the MHCB during this 
 −1 T 1 (6)
period are illustrated in Fig. 6. C2 = e ( Lt + Lr1 M ) e + L
 s1

After the fault current of the port P1 decreases to zero at time

t6, which indicates the completion of fault isolation, the current
of the CLI Ls1 still freewheels in the current path shown in Fig.
7 due to the large time constant. The current iT1(t) satisfies:
Req
− ( t − t6 )
iT1 (t ) = iT1 (t6 )e Ls1
(7)
where iT1(t6) can be obtained by (5).

Fig. 5. The fault current paths of the MHCB from time t3 to time t4.

Fig. 7. The current freewheeling path of CLI Ls1 in the MHCB.

Fig. 6. The fault current paths of the MHCB from time t5 to time t6.

Before the completion of the energy dissipation process at

time t6, the following equations are satisfied:
U dc = ( Lt + Lr1 M )i p +  U dc eT − uc eT
 Fig. 8. The comparison of simulated and calculated waveforms.
 uc t
i p1 = − R + iL1 = i p1 (t5 ) + t5 ei p dt
After the current in the CLI Ls1 decays to zero at time t7, the
 eq thyristor branch T1 will be blocked automatically. Then, if there
 diL1 is no need to reclose, the fault line can be totally isolated by
 Ls1 = −uc (4) opening the RCB1. Otherwise, the soft reclosing method can be
 dt
performed, which will be discussed in detail in Section III-B.
iL1 (t5 ) = i p1 (t5 )
 It should be noted that the operation of the MHCB during the
 Rc Re fault isolation will not interrupt the power exchange among
 Req = R + R healthy lines. Besides, the operation of the MHCB in this paper
 c e
is not affected by the type of equipment connected to the port.
where ip1(t5) can be obtained by (3), γUdc is the total protection
Therefore, regardless of the topology of MTdc grids, the
voltage of the arresters, γ is the protection coefficient with the
MHCB can be applied to any dc bus with multiple ports.
value ranging from 1 to 2. The expressions of uc(t), iT1(t) and
To verify the effectiveness of the theoretical analysis, the
ip1(t) in (5) can be obtained by solving (4).
simulation waveforms (dashed lines) of ip1(t) and iT1(t) using
the detailed models of MMCs and arresters are compared with

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the calculated waveforms (solid lines), as shown in Fig. 8.

Although there are slight differences between the calculated
and the simulated waveforms, mainly caused by the simple
equivalent models of MMCs and arresters during the
calculation, the calculated results have sufficient accuracy.
B. Soft Reclosing
After the current in the CLI Ls1 decays to zero at time t7, the
RIB starts to open and is opened after tens of milliseconds.
Generally, the temporary faults on OHLs last less than 300 ms
[18], [23]. Therefore, after the fault current on the line decays to
zero at time t6, the MHCB starts to try to reclose at time t8 after
waiting for another 300 ms.
The soft reclose method proposed in this paper is very simple
and easy to implement. The turn-on signal is applied on the
thyristor branch of any healthy line such as T2 at time t8. Then,
the CLR Rc will be connected in the current loop, as illustrated
in Fig. 9. Then, there are two circumstances:
If the fault on the line is permanent, then the steady fault
current will flow through the CLR Rc with the magnitude of
Udc/Rc. Therefore, by choosing a large CLR, the fault current ip1
and the voltage vp1 of the fault port P1 will be limited to small
values. If the fault is temporary, which means the fault has
disappeared when the thyristor branch T2 is turned on, the dc
line will be charged through the CLR Rc, and the voltage of the
port P1 will gradually rise to the rated voltage Udc. Fig. 10. Flowchart of control sequences of the MHCB.

Fig. 9. The equivalent representation of the MHCB in the soft reclosing
stage.
Therefore, the temporary and the permanent faults can be
distinguished by:
t9 = t8 + tset
 (8)
 v p1 (t9 )  ksetU dc
where tset is selected to ensure that the dc line has sufficient
charge time, kset is the reliable coefficient in the range from 0 to
1. If (8) is satisfied, the temporary fault is identified, then the
power supply of the fault line can be restored by closing the
UFD1 and the LCS1 in turn. Otherwise, the permanent fault is
identified, then the small fault current can be interrupted by
opening the RCB1.
C. Flowchart of Control Sequences
The control sequences of the fault isolation and the soft
reclosing are shown in Fig. 10. The FIT in this paper is defined
as the interval between the time t1 the MHCB receives the trip
signal and the time t6 the fault port current decays to zero.
D. Parameter Design
Since the values of CLIs in the MHCB are usually designed
based on the system requirement, they are not mentioned here.
The parameters needed to be designed are the values of the
EDR Re and the CLR Rc.
1) Current Limiting Resistor Rc
During the soft reclosing process in Section III-B, the CLR
Rc should be large enough to limit the fault current and the
transient disturbance once the permanent fault occurs.
Therefore, Rc is selected as 100 kΩ in this paper and the fault
current will be limited to less than 5 A.
2) Energy Dissipation Resistor Re
As shown in Section III-A, during the fault isolation, the
energy stored in the CLI Ls1 is consumed by both the EDR Re
and the CLR Rc. The CLR is selected due to the requirement of
the soft reclosing. Therefore, only the EDR Re can be chosen
considering the fault isolation process. By substituting the
system parameters into (5) and different values of EDR Re, the
relationship between the FIT and the values of EDR Re is
illustrated in Fig. 11.
Fig. 11. The FITs under different values of EDR Re.
As can be seen from Fig. 11, a small value of EDR Re will
lead to a small FIT. However, considering the manufacturing
limitations, its value cannot be too small. Therefore, the EDR

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Re is selected as 10 Ω in this paper.

IV. SIMULATION VERIFICATION

A. Simulation Model
The effectiveness of the proposed MHCB is verified by the
three-terminal asymmetrical monopolar test system built in
PSCAD/EMTDC platform. The topology of the test system is
Fig. 12. Simulation results of fault isolation. (a) Port currents ip1-ip3. (b)
the same as the MTdc grid in Fig. 3 with three terminals. The Port voltages Ep1-Ep3. (c) Currents iMB, iT1 flowing through MB and
detailed model of MMC based on half-bridge SMs are utilized. thyristor branch T1. (d) Voltages uMB, uc across MB and current limiting
Besides, the distributed frequency dependent OHL model is resistor Rc. (e) Absorbed energy of arresters in MB and the sum of the
adopted. The major parameters of the test system are listed in energy absorbed by resistors Re, Rc.
Table I. In this paper, the trip signal is received by the MHCB at B. Simulation of Fault Isolation
3 ms after occurrence of the line fault. The values of kset, tset are
The metallic short-circuit fault occurs in the middle of Line 1
set as 0.1 and 10 ms, respectively.
at 5.0 s. The MHCB receives the trip signal at 5.003 s and
TABLE I
MAJOR PARAMETERS OF SIMULATION MODEL operates as the control sequences in Fig. 10. The simulation
Parameters Values results are illustrated in Fig. 12.
Rated voltage Udc 500 kV As can be seen, the fault current of the fault port P1 arrives at
Rated power of MMC1 - MMC3 500 MW, 250 MW, 750 MW its peak value of 9 kA when the MB is opened at 5.0051 s, and
Capacitance of SMs in MMC 15 mF decays to zero at 5.0114 s. The current of the thyristor branch
Number of SMs per arm in MMC 250 T1 arrives at its peak value of 6.4 kA when the fault current of
Arm inductance 30 mH
Series inductance Lkk of MMCk 10 mH P1 decays to zero. The current freewheel process of CLI Ls1
Lengths of Line 1 – Line 3 100 km, 80 km, 60 km completes at about 5.065 s. During the fault isolation, the
Total protection voltage γUdc of arresters 800 kV energy absorbed by the arresters and the resistors Re, Rc are 19.9
EDR Re 10 Ω MJ and 3.3 MJ, respectively.
CLR Rc 100 kΩ
Open time of UFDs 2 ms C. Simulation of Soft Reclosing
Open time of RCBs and RIB 30 ms
After the current of the fault port P1 decays to zero and wait
for another 300 ms, the MHCB starts to reclose. The control
signal is applied on the thyristor branch T3 at 5.3114 s. The
simulation results under the temporary and the permanent faults
are illustrated in Fig. 13.

Fig. 13. Simulation results of soft reclosing after temporary and

permanent fault occurs. (a) Port voltages vp1 under two fault scenarios.
(b) Port currents ip1 under two fault scenarios.
As can be seen in Fig. 13(a), after the temporary fault occurs,
the port voltage vp1 of P1 gradually rises to 78.9 kV at 5.3214 s,
which is larger than the threshold ksetUdc (50 kV). Therefore, the
temporary fault can be reliably identified by (8). As for the
permanent fault, the port voltage vp1 remains nearly zero after
T3 is turned on, which means the permanent fault can be
reliably identified by (8). Besides, as shown in Fig. 13(b), the
currents of P1 remain less than 10 A under both fault scenarios.
Therefore, it can be concluded from the simulation results that
the soft reclosing of the MHCB can work properly and will not

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cause large current and voltage disturbances no matter whether
the fault is temporary or permanent.
D. Performance Comparison
1) Fault Isolation
To compare the performance of the MHCB and the typical
HCBs in Fig. 1 in fault isolation, the MHCB in the simulation
model of Section IV-A is replaced by three typical HCBs, and
another simulation is conducted with the same fault scenario
configured. The fault port currents using the MHCB and the
typical HCB are both illustrated in Fig. 14.
In Fig. 14, the maximum fault currents of the two solutions
during the fault isolation are the same, but their FITs and the
absorbed energy are different, which are listed in Table II.
As shown in Table II, compared to typical HCB, the adoption
of the MHCB can reduce 21.7% of the FIT. Besides, it will
reduce 28.4% of the absorbed energy of arresters and 16.5% of
the total absorbed energy of arresters and other components.
Since the MHCB only contains a shared MB and avoids the
configuration of an MB for each line, the total cost of the
arresters is greatly further reduced.
Fig. 14. Port currents of the MHCB and the typical HCB.
TABLE II
PERFORMANCE COMPARISON OF MHCB AND HCB IN FAULT ISOLATION
Factors
Solution Absorbed energy of Absorbed energy of
FIT
arresters other components
HCB 10.6 ms 27.8 MJ 0 MJ
MHCB 8.3 ms 19.9 MJ 3.3 MJ (Re and Rc)
2) Soft Reclosing
The reclosing method of the proposed MHCB is compared
with the direct reclosing method in [19], the sequential
reclosing method in [20], and the active injection reclosing
methods in [18] and [21].
Solutions in [19], [20] identify the fault property by closing
the MB. Therefore, the two solutions will cause larger
disturbance than the others. Besides, since the two solutions
need the MB to re-open to interrupt the fault current if the
permanent fault occurs, they need additional arrester capacities
to dissipate the energy. In addition, the solution in [20] should
divide the SMs in MB into different groups and reclose them
one by one, which is hard to control. Solutions in [18], [21]
identify the fault property by detecting the polarity or the
arrival time of the injected traveling wave signal. Therefore,
large sampling frequency and calculation burden of the
measurement unit is required. Besides, the solution in [21]
requires additional cost to configure the auxiliary circuit to
realize the signal injection. As for the soft reclosing method in
this paper, according to Fig. 13(b), it will not cause a large
disturbance even the permanent fault occurs. Besides, since it
only turns on the thyristor branch to identify the temporary and
permanent fault, it is easy to implement and control. In addition,
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it does not require large sampling frequency and complicated
calculation, which means it has low hardware requirement.
3) Economy
The proposed MHCB is compared with the typical HCBs in
Fig. 1 and the solutions proposed in [9], [10], [15] in the
economic aspect. Since the semiconductor component and
arrester are expensive than other components, only their costs
are considered in this part.
It is assumed that these solutions use the IGBT module
5SNA3000K452300 (4.5 kV, 4961 USD), the thyristor
K0900ME600 (6 kV, 435 USD), and the diode
VS-SD1100C20C (2 kV, 85 USD). The cost of arresters is
considered as 15485 USD/MJ. The maximum voltage of the
LCS is considered as 3 kV. Therefore, an LCS requires 2 IGBT
modules without considering redundancy. Since the IGBT
modules in the MB of all solutions should withstand the
protection voltage of arresters (800 kV), a unidirectional MB
(the MHCB in this paper and the solutions in [9], [15]) and a
bidirectional MB (the typical HCB and the solution in [10])
require 178 and 356 IGBT modules, respectively. The diode
branch in this paper and the solution in [15] should also
withstand the arrester voltage and requires 400 diodes. In [9],
an accessory discharging switch requires 84 thyristors and 250
diodes to withstand the rated voltage of the MTdc grid. It
should be noted that only the MHCB in this paper can reduce
the required capacity of arresters among all solutions.
Therefore, based on the simulation results in Table II, only the
arrester capacity in the MHCB is 19.9 MJ, while the arrester
capacity in a single MB of other solutions is considered as 27.8
MJ. According to the above analysis, the component counts and
costs of all solutions for three protected dc lines in the
simulation model of Section IV-A are obtained in Table III.
TABLE III
COMPONENT COUNTS AND COSTS OF DIFFERENT SOLUTIONS
Solutions
Component
MHCB Typical HCBs [9] [10] [15]
IGBT module 184 1074 184 726 184
Diode 2400 0 750 0 2400
Thyristor 402 0 252 0 0
Arrester (MJ) 19.9 83.4 27.8 55.6 27.8
Total cost (MUSD) 1.60 6.62 1.52 4.46 1.55
As shown in Table III, compared with the solutions of typical
HCBs, the investment cost can be reduced by 75.8% by
adopting the proposed MHCB. Besides, although the solution
proposed in this paper requires an additional cost of 5.26%
compared to the lowest cost solution in [9], it has several
features that other solutions do not have, such as the reduced
FIT, the soft reclosing capability, etc. Therefore, its investment
cost is acceptable.
E. Influencing Factors
1) Stray Inductance of Thyristor Branches
In this part, the influence of the stray inductance of thyristor
branches is investigated. Therefore, a lumped inductance is
connected to each thyristor branch to model the stray
inductance effect. In [29], the stray inductance of a 3.3 kV
IGBT module is about 170 nH. Since the stray inductances are
mainly caused by the connecting bus bar, component lead, and
so on, which are similar under the same rating, the stray
inductance of the same rating thyristor is also considered as 170
nH in this paper. Since 243 thyristors are needed for each
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3071706, IEEE
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branch to withstand the transient voltage, the total stray
inductance of a branch is 41.31 μH. Considering the component
redundancy, the stray inductance of 100 μH for a thyristor
branch is added to the simulation model. Another simulation
under the same fault scenario as in Section IV-B is performed.
The comparison of the simulation results with the stray
inductance installed (solid line) or not (dotted line) is shown in
Fig. 15. As can be seen, the key currents iMB, iT1, and the
dissipated energy of arresters and resistors are almost the same
as those under the condition without stray inductance.
Therefore, the influence of the stray inductance on the
performance of the MHCB is very slight.
2) ESR of CLIs
In this part, the influence of the ESR of CLIs is investigated.
According to [30], the ESR of a 75 mH CLI (800 kV, 3.125 kA)
is 0.23 Ω. Therefore, the ESR of the 100 mH CLIs in the
simulation model is considered as 0.3 Ω. The ideal CLI in the
simulation model is replaced by the CLI with an ESR of 0.3 Ω
connected in series. The simulation under the same fault
scenario as in Section IV-B is performed, and the simulation
results are shown in Fig. 16. The waveforms without the stray
inductance are presented in the solid line, while the waveforms
with the stray inductance are indicated by the dotted line.

Fig. 15. Key currents iMB, iT1 and dissipated energy of arresters and
resistors when stray inductances of thyristor branches are considered or
not. (a) Key currents iMB, iT1. (b) Dissipated energy of arresters.
Fig. 16. Key currents iMB, iT1 and dissipated energy of arresters and
resistors when stray inductances of thyristor branches are considered or
not. (a) Key currents iMB, iT1. (b) Dissipated energy of arresters.

Fig. 17. Topology of the experimental platform.

(a)

(b)
(c)
Fig. 18. Photograph of the experimental platform. (a) Voltage power source. (b) Upper computer. (c) Main circuit and control circuit.

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Transactions on Industrial Electronics
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As can be seen, the key currents and the dissipated energy of

arresters and resistors are approximately the same, which
indicates the ESR of CLIs has limited effects on the
performance of the MHCB.

V. EXPERIMENTAL VERIFICATION
A. Experimental Prototype
Based on the topology of the experiment platform shown in
Fig. 17, a prototype as shown in Fig. 18 has been established in
the laboratory. The switches that do not need to be operated in
the experiments such as LCS2, UFD2, etc. in the dotted squares
are not configured. The major parameters of the prototype are
listed in Table IV. The UFDs are opened in the zero-current
state during fault current interruption. Therefore, the open of
UFD in the prototype can be approximated as that the IGBTs
turn off with a delay of 2 ms after the current decays to zero
[27]. Besides, RCBs and RIB can be approximated as IGBTs
turning off with a delay of 30 ms. The conduction of the IGBT
module F is used to simulate the occurrence of the line fault.
Due to the resistance load, the HCB near the load can be
approximated by a IGBT module. In the normal condition, Fig. 19. Experimental results of fault isolation. (a) Port currents ip1-ip3. (b)
LCSs, UFDs, RCBs and RIB are all in closed state, while the Currents flowing through MB of MHCB and typical HCB. (c) Current iT1
MB, the thyristors T1-T3 and the IGBT module F are in open flowing through T1.
state. The current and voltage data are collected by
Analog-to-Digital Converter of DSP and sent to the upper
computer via series communication.
TABLE IV
MAJOR PARAMETERS OF EXPERIMENTAL PROTOTYPE
Parameter Value
Rated voltage Udc 100 V
CLIs Ls1, Ls2, Ls3 5 mH, 2 mH, 5 mH
Equivalent dc line inductors L1, L2, L3 3 mH, 3 mH, 3 mH
Load resistors R1, R2 50 Ω, 50 Ω
Fig. 20. Port voltages vp1 after temporary and permanent fault occurs.
EDR Re 1Ω
CLR Rc 200 Ω As can be seen in Fig. 20, if a temporary fault occurs, the port
MOV in the MB 14D101K voltage vp1 of P1 rises to near the rated voltage; if a permanent
DSP TMS320F28069
fault occurs, the port voltage vp1 of P1 maintains near zero after
B. Experimental Results transient process. Therefore, the temporary fault can be reliably
identified by (8).
1) Fault Isolation
In conclusion, the soft reclose of the MHCB can work well
The fault unit F is closed at 77 ms. The MHCB receives the
no matter the fault is temporary or permanent.
trip signal at 78 ms and starts to isolate the fault at port P1. The
control sequences of the MHCB are illustrated in Fig. 10. The
VI. CONCLUSION
test results of the prototype are illustrated in Fig. 19. Besides,
the MHCB is replaced by typical HCB to test the ability of In this paper, a novel MHCB has been proposed and
MHCB to reduce the FIT. The current flowing through the MB analyzed for the MTdc grid. The proposed MHCB has n ports
of the typical HCB is shown in Fig. 19(b). and can protect a dc bus with n adjacent lines by interrupting
As can be seen from Fig. 19, the maximum value of fault the fault current of each port independent of the others.
current of the fault port P1 is reached at 24.5 A. The fault Therefore, it can substitute n typical HCBs with significantly
isolation processes of the MHCB and the typical HCB complete reduced implementation costs. In addition, the proposed
at 85.2 ms and 87.9 ms, respectively. The FITs of MHCB and MHCB greatly reduces the FIT and the capacities of arresters in
typical HCB are 7.2 ms and 9.9 ms, respectively. Therefore, the MB compared to the typical HCB. Besides, considering the
compared to the typical HCB, the adoption of MHCB can MTdc grid transmitting power through OHLs, the MHCB has
reduce 27.3% of the FIT. the soft reclosing capability, which is easy to implement and
2) Soft Reclosing control, has low hardware requirement, and does not need
At 0.38 s, the MHCB starts to reclose the port P1, and the additional cost.
control signal is applied on the thyristor branch T 3. The port Extensive simulations and experimental tests prove that the
voltages of the fault port P1 under the temporary fault (the fault proposed MHCB can isolate faults on any of the protected ports
unit F is in open state) and the permanent fault (the fault unit F using a shared MB with the reduced FIT and reclose softly
is in closed state) are illustrated in Fig. 20. without introducing large disturbances to the MTdc grid.

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Transactions on Industrial Electronics
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REFERENCES parallel energy absorption module," IEEE Trans. Power Deliv., to be

published. DOI: 10.1109/TPWRD.2020.3015311.
[1] J. Sun, M. Li, Z. Zhang, T. Xu, J. He, H. Wang, and G. Li, "Renewable [23] S. Yang, W. Xiang, X. Lu, W. Zuo, and J. Wen, "An adaptive reclosing
energy transmission by HVDC across the continent: system challenges strategy for MMC-HVDC systems with hybrid DC circuit breakers,"
and opportunities," CSEE J. Power Energy Syst., vol. 3, no. 4, pp. 353-364, IEEE Trans. Power Deliv., vol. 35, no. 3, pp. 1111-1123, Jun. 2020.
Dec. 2017. [24] G. Song, T. Wang, and K. S. T. Hussain, "DC line fault identification
[2] O. Gomis-Bellmunt, J. Sau-Bassols, E. Prieto-Araujo, and M. based on pulse injection from hybrid HVDC breaker," IEEE Trans. Power
Cheah-Mane, "Flexible converters for meshed HVDC grids: from flexible Deliv., vol. 34, no. 1, pp. 271-280, Feb. 2019.
AC transmission systems (FACTS) to flexible DC grids," IEEE Trans. [25] B. Li, J. He, Y. Li, and W. Wen, "A novel DCCB reclosing strategy for the
Power Deliv., vol. 35, no. 1, pp. 2-15, Feb. 2020. flexible HVDC grid," IEEE Trans. Power Deliv., vol. 35, no. 1, pp.
[3] N. Tong, X. Lin, Y. Li, Z. Hu, N. Jin, F. Wei, and Z. Li, "Local 244-257, Feb. 2020.
measurement-based ultra-high-speed main protection for long distance [26] C. Li, A. M. Gole, and C. Zhao, "A fast DC fault detection method using
VSC-MTDC," IEEE Trans. Power Deliv., vol. 34, no. 1, pp. 353-364, Feb. DC reactor voltages in HVdc grids," IEEE Trans. Power Deliv., vol. 33,
2019. no. 5, pp. 2254-2264, Oct. 2018.
[4] S. Zhang, G. Zou, C. Wang, J. Li, and B. Xu, "A non-unit boundary [27] S. Zhang, G. Zou, X. Wei, and C. Zhang, "Combined hybrid DC circuit
protection of DC line for MMC-MTDC grids," Int. J. Electr. Power breaker capable of controlling current flow," IEEE Trans. Ind. Electron.,
Energy Syst., vol. 116, p. 105538, 2020. to be published. DOI: 10.1109/TIE.2020.3034847.
[5] B. Li, J. He, Y. Li, and R. Li, "A novel solid-state circuit breaker with [28] X. Zhang, Z. Yu, R. Zeng, Y. Huang, B. Zhao, Z. Chen, and Y. Yang, "A
self-adapt fault current limiting capability for LVDC distribution state-of-the-art 500-kV hybrid circuit breaker for a dc grid: the world's
network," IEEE Trans. Power Electron., vol. 34, no. 4, pp. 3516-3529, largest capacity high-voltage dc circuit breaker," IEEE Ind. Electron.
Jun. 2019. Mag., vol. 14, no. 2, pp. 15-27, Jun. 2020.
[6] Z. Chen, Z. Yu, X. Zhang, T. Wei, G. Lyu, L. Qu, Y. Huang, and R. Zeng, [29] X. Li, Y. Luo, Y. Duan, B. Liu, Y. Huang, and F. Sun, "Stray inductance
"Analysis and experiments for IGBT, IEGT, and IGCT in hybrid DC extraction of high-power IGBT dynamic test platform and verification of
circuit breaker," IEEE Trans. Ind. Electron., vol. 65, no. 4, pp. 2883-2892, physical model," in 2018 IEEE International Power Electronics and
Apr. 2018. Application Conference and Exposition (PEAC), Nov. 2018, pp. 1-6.
[7] M. Callavik, A. Blomberg, J. Häfner, and B. Jacobson, "The hybrid [30] Dry-type air-core smoothing reactors for HVDC applications, GB/T
HVDC breaker: An innovation breakthrough enabling reliable HVDC 25092-2010, 2010.
grids," ABB Grid Systems, ABB, Zürich, Switzerland, Tech. Rep., 2012.
[8] T. U. J. R.Derakhshanfar and M. H. U.Steiger, "Hybrid HVDC breaker - a Shuo Zhang (S’19) was born in Shandong,
sulution for future HVDC system," presented at the Proc. CIGRE, Paris, China. He received the B.Sc. degree in electrical
France, 2014, pp. 1-11, 2014. engineering from Shandong University, China, in
[9] G. Liu, F. Xu, Z. Xu, Z. Zhang, and G. Tang, "Assembly HVDC breaker 2017. He is currently working toward the Ph.D.
for HVDC grids with modular multilevel converters," IEEE Trans. Power degree in electrical engineering with the School
Electron., vol. 32, no. 2, pp. 931-941, Feb. 2017. of Electrical Engineering at Shandong University,
[10] R. Majumder, S. Auddy, B. Berggren, G. Velotto, P. Barupati, and T. U. Ji’nan, China.
Jonsson, "An alternative method to build DC switchyard with hybrid DC His research interests include HVDC control
breaker for DC grid," IEEE Trans. Power Deliv., vol. 32, no. 2, pp. and protection and power electronics.
713-722, Apr. 2017.
[11] W. Liu, F. Liu, Y. Zhuang, X. Zha, C. Chen, and T. Yu, "A multiport
circuit breaker-based multiterminal DC system fault protection," IEEE J.
Emerg. Sel. Topics Power Electron., vol. 7, no. 1, pp. 118-128, Mar. 2019. Guibin Zou (M’12) was born in Shandong
[12] S. Wang, C. E. Ugalde-Loo, C. Li, J. Liang, and O. D. Adeuyi, Province, China. He received the M.Sc. and
"Bridge-type integrated hybrid DC circuit breakers," IEEE J. Emerg. Sel. Ph.D. degrees in automation of electric power
Topics Power Electron., vol. 8, no. 2, pp. 1134-1151, Jun. 2020. systems from Shandong University, Ji’nan,
[13] J. He, Y. Luo, M. Li, Y. Zhang, Y. Xu, Q. Zhang, and G. Luo, "A China in 2000 and 2009, respectively.
high-performance and economical multiport hybrid direct current circuit Since 2013, he has been a Professor of
breaker," IEEE Trans. Ind. Electron., vol. 67, no. 10, pp. 8921-8930, Oct. electrical engineering with the School of
2020. Electrical Engineering, Shandong University,
[14] A. Mokhberdoran, D. Van Hertem, N. Silva, H. Leite, and A. Carvalho, Ji’nan, China. His research interests include the
"Multiport hybrid HVDC circuit breaker," IEEE Trans. Ind. Electron., vol. protection and control techniques of AC/DC
65, no. 1, pp. 309-320, Jan. 2018. grids, the protection and control of active
[15] S. Zhang, G. Zou, X. Wei, and C. Sun, "Diode-bridge multiport hybrid DC distribution networks, and the distribution system automation.
circuit breaker for multiterminal DC grids," IEEE Trans. Ind. Electron.,
vol. 68, no. 1, pp. 270-281, Jan. 2021. Xiuyan Wei received the B.Sc. degree of applied
[16] E. Kontos, T. Schultz, L. Mackay, L. M. Ramirez-Elizondo, C. M. Franck, physics in Hunan University, Changsha, China, in
and P. Bauer, "Multiline breaker for HVDC applications," IEEE Trans. 2011, and M.Sc. degrees of microelectronics and
Power Deliv., vol. 33, no. 3, pp. 1469-1478, Jun. 2018. solid-state electronics in Xiamen University,
[17] M. Monadi, H. Hooshyar, and L. Vanfretti, "Design and real-time Xiamen, China, in 2014.
implementation of a PMU-based adaptive auto-reclosing scheme for Currently, she is pursuing the Ph.D. degree in
distribution networks," Int. J. Electr. Power Energy Syst., vol. 105, pp. electrical engineering with the School of
37-45, 2019. Electrical Engineering at Shandong University,
[18] S. Zhang, G. Zou, C. Xu, and W. Sun, "A reclosing scheme of hybrid DC Ji’nan, China. Her research interests include
circuit breaker for MMC-HVDC systems," IEEE J. Emerg. Sel. Topics MVDC protection and control.
Power Electron., to be published. DOI: 10.1109/JESTPE.2020.3025598.
[19] X. Ding, G. Tang, M. Han, C. Gao, and G. Wang, "Characteristic
parameters extraction and application of the hybrid DC circuit breaker in Chengquan Zhang received the B.Sc. degree in
MMC-HVDC," Proc. CSEE, vol. 38, no. 01, pp. 309-319+369, Jan. 2018. electrical engineering from Shandong University,
[20] X. Fan and B. Zhang, "DC line soft reclosing sequence for HVDC grid China, in 2019.
based on hybrid DC breaker," J. Eng., vol. 2019, no. 16, pp. 1095-1099, He is currently working toward the M.Sc.
2019. degree in electrical engineering with the school of
[21] S. Zhang, G. Zou, B. Li, B. Xu, and J. Li, "Fault property identification Electrical Engineering at Shandong University,
method and application for MTDC grids with hybrid DC circuit breaker," Ji’nan, China. His research interests include
Int. J. Electr. Power Energy Syst., vol. 110, pp. 136-143, 2019. HVDC protection.
[22] J. Mei, R. Ge, P. Zhu, G. Fan, B. Wang, and L. Yan, "An adaptive
reclosing scheme for MMC-HVDC systems based on pulse injection from

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