Short Course On

Phase-Locked Loops and Their Applications

Day 1, AM Lecture

Integer-N Frequency Synthesizers

Michael Perrott
August 11, 2008

Copyright © 2008 by Michael H. Perrott

All rights reserved.
 What is a Phase-Locked Loop (PLL)?

ref(t) ref(t)
out(t) out(t)
e(t) v(t) e(t) v(t)

ref(t) e(t) Analog v(t) out(t)

Phase
Detect Loop Filter
VCO de Bellescize
Onde Electr, 1932

ƒ VCO efficiently provides oscillating waveform with

variable frequency
ƒ PLL synchronizes VCO frequency to input reference
frequency through feedback
- Key block is phase detector
ƒ Realized as digital gates that create pulsed signals
M.H. Perrott 2
 Integer-N Frequency Synthesizers

ref(t)
div(t)
e(t) v(t)
Fout = N Fref
ref(t) e(t) Analog v(t) out(t)
Phase
Detect Loop Filter
VCO
div(t) Sepe and Johnston
Divider US Patent (1968)

N
ƒ Use digital counter structure to divide VCO frequency
- Constraint: must divide by integer values
ƒ Use PLL to synchronize reference and divider output
Output frequency is digitally controlled
M.H. Perrott 3
 Integer-N Frequency Synthesizers in Wireless Systems
Zin
From Antenna PC board Mixer
and Bandpass trace RF in IF out
Filter Zo Package LNA To Filter
Interface

LO signal
VCO
Reference ref(t) Frequency v(t) out(t)
Frequency Synthesizer

ref(t) e(t) Charge v(t) out(t)

Loop
PFD
Pump Filter
VCO

div(t) Divider

ƒ Design Issues: low noise, fast settling time, low power

M.H. Perrott 4
 Outline of Integer-N Frequency Synthesizer Talk

Fref Fout = N Fref

ref(t) e(t) v(t) out(t)

Loop
PFD
Filter
VCO

div(t) Divider

N
ƒ Overview of PLL Blocks
ƒ System Level Modeling
- Transfer function analysis
- Nonlinear behavior
- Type I versus Type II systems
ƒ Noise Analysis
M.H. Perrott 5
 Popular VCO Structures

LC oscillator
VCO Amp
Vout

-Ramp Vin C L Rp

Ring oscillator

Vout

Vin
-1

ƒ LC Oscillator: low phase noise, large area

ƒ Ring Oscillator: easy to integrate, higher phase noise
M.H. Perrott 6
 Model for Voltage to Frequency Mapping of VCO
LC oscillator
VCO Amp
Vout

-Ramp Vin C L Rp

Fvco

Ring oscillator

Vout
Fout
fc
Vin VCO
Frequency slope=Kv
-1

vin
Vbias
Input Voltage

M.H. Perrott 7
 Model for Voltage to Phase Mapping of VCO

ƒ Time-domain frequency relationship (from previous

slide)

ƒ Time-domain phase relationship

ƒ Intuition of integral relationship between frequency and

phase:
1/Fvco= α

out(t)

out(t)

1/Fvco= α+ε
M.H. Perrott 8
 Frequency-Domain Model for VCO

ƒ Time-domain relationship (from previous slide)

ƒ Corresponding frequency-domain model

Laplace-Domain Frequency-Domain

v(t) out(t) v(t) Φout(t) v(t) Φout(t)

2πKv Kv
s jf
VCO VCO VCO

M.H. Perrott 9
 Divider

ƒ Implementation
Counter
N count value
out div(t)
out(t)

out(t)

div(t)

N=6
ƒ Time-domain model
- Frequency:
- Phase:
M.H. Perrott 10
 Frequency-Domain Model of Divider

ƒ Time-domain relationship between VCO phase and

divider output phase (from previous slide)

ƒ Corresponding frequency-domain model (same as

Laplace-domain)

out(t) div(t) Φout(t) 1 Φdiv(t)

Divider
N
Divider

M.H. Perrott 11
 Phase Detector (PD)

ƒ XOR structure
- Average value of error pulses corresponds to phase error
- Loop filter extracts the average value and feeds to VCO
ref(t)

e(t)

div(t)

ref(t)

div(t)

1
e(t)
-1

M.H. Perrott 12
 Modeling of XOR Phase Detector

ƒ Average value of pulses is extracted by loop filter

- Look at detector output over one cycle:
W

1
e(t)
-1

T/2

ƒ Equation:

M.H. Perrott 13
 Relate Pulse Width to Phase Error

ƒ Two cases:

−π < Φref − Φdiv < 0 0 < Φref − Φdiv < π

T/2 T/2

ref(t) ref(t)

div(t) div(t)

1 1
e(t) e(t)
-1 -1
W W

Φref − Φdiv Φref − Φdiv

W=- π T/2 W= T/2
π

M.H. Perrott 14
 Overall XOR Phase Detector Characteristic
−π < Φref − Φdiv < 0 0 < Φref − Φdiv < π
T/2 T/2

ref(t) ref(t)

div(t) div(t)

1 1
e(t) e(t)
-1 -1
W W

Φref − Φdiv Φref − Φdiv

W=- π T/2 W= T/2
π

avg{e(t)}
gain = -2/π 1 gain = 2/π

Φref - Φdiv
−π −π/2 0 π/2 π
-1

phase detector
range = π
M.H. Perrott 15
 Frequency-Domain Model of XOR Phase Detector

ƒ Assume phase difference confined within 0 to π radians

- Phase detector characteristic looks like a constant gain
element
avg{e(t)}
gain = -2/π 1 gain = 2/π

Φref - Φdiv
−π −π/2 0 π/2 π
-1

ƒ Corresponding frequency-domain model

ref(t) e(t)
PD Φref(t) e(t)
2
π

Φdiv(t) PD gain
div(t)
M.H. Perrott 16
 Loop Filter

ƒ Consists of a lowpass filter to extract average of

phase detector error pulses
ƒ Frequency-domain model

Laplace-Domain Frequency-Domain

e(t) v(t) e(t) v(t) e(t) v(t)

Loop
H(s) H(f)
Filter
H(s)
VCO VCO

ƒ First order example

e(t) R1 v(t)

C1

M.H. Perrott 17
 Overall Linearized PLL Frequency-Domain Model

ƒ Combine models of individual components

Laplace-Domain Model
XOR PD
Loop Filter VCO
Φref(t) e(t) v(t) Φout(t)
2 2πKv
H(s)
π s

Divider
Φdiv(t)
1
N

Frequency-Domain Model
XOR PD
Loop Filter VCO
Φref(t) e(t) v(t) Φout(t)
2 Kv
H(f)
π jf

Divider
Φdiv(t)
1
N

M.H. Perrott 18
 Open Loop versus Closed Loop Response

ƒ Frequency-domain model
XOR PD
Loop Filter VCO
Φref(t) e(t) v(t) Φout(t)
2 Kv
H(f)
π jf

Divider
Φdiv(t)
1
N

ƒ Define A(f) as open loop response

ƒ Define G(f) as a parameterizing closed loop function

- More details later in this lecture

M.H. Perrott 19
 Classical PLL Transfer Function Design Approach

1. Choose an appropriate topology for H(f)

ƒ Usually chosen from a small set of possibilities

2. Choose pole/zero values for H(f) as appropriate for

the required filtering of the phase detector output
ƒ Constraint: set pole/zero locations higher than
desired PLL bandwidth to allow stable dynamics to
be possible

3. Adjust the open-loop gain to achieve the required

bandwidth while maintaining stability
ƒ Plot gain and phase bode plots of A(f)
ƒ Use phase (or gain) margin criterion to infer stability

M.H. Perrott 20
 Example: First Order Loop Filter

ƒ Overall PLL block diagram

XOR PD
Loop Filter VCO
Φref(t) e(t) v(t) Φout(t)
2 Kv
H(f)
π jf

Divider
Φdiv(t)
1
N

ƒ Loop filter

e(t) R1 v(t)

C1

M.H. Perrott 21
 Closed Loop Poles Versus Open Loop Gain
Evaluation of Closed Loop Pole
Phase Margin Locations of G(f)
Im{s}
Open loop 20log|A(f)| C
gain
increased
Dominant
pole pair B

0 dB f
fp
A
C
B
A Re{s}
angle(A(f)) 0
o
-90

A
-120o PM = 59o for A
PM = 45o for B
B
-150o PM = 33o for C

-180o
C

ƒ Higher open loop gain leads to an increase in Q of

closed loop poles
M.H. Perrott 22
 Corresponding Closed Loop Response

Frequency Response of G(f) Step Response of G(f)

C
5 dB C 1.4
B
0 dB B
A
-5 dB A
1

0.6

f 0 t
fp

ƒ Increase in open loop gain leads to

- Peaking in closed loop frequency response
- Ringing in closed loop step response
M.H. Perrott 23
 The Impact of Parasitic Poles

ƒ Loop filter and VCO may have additional parasitic

poles and zeros due to their circuit implementation
ƒ We can model such parasitics by including them in
the loop filter transfer function
ƒ Example: add two parasitic poles to first order filter

e(t) R1 v(t)
Parasitics
C1

M.H. Perrott 24
 Closed Loop Poles Versus Open Loop Gain
Evaluation of Closed Loop Pole
Phase Margin Locations of G(f)
Im{s}
20log|A(f)|
Open loop C
gain
increased
Dominant
pole pair
0 dB f
fp fp2fp3
Non-dominant B
poles
C
B A Re{s}
angle(A(f)) A
-90
o
A 0
o
PM = 72 for A
PM = 51o for B
-165
o B
o
-180
PM = -12o for C
o
-240

o
-315 C

M.H. Perrott 25
 Corresponding Closed Loop Response

Closed Loop Frequency Response Closed Loop Step Response

C

0 dB B
A C

1 B

Frequency Time

ƒ Increase in open loop gain now eventually leads to

instability
- Large peaking in closed loop frequency response
- Increasing amplitude in closed loop step response
M.H. Perrott 26
 Response of PLL to Divide Value Changes
XOR PD
Loop Filter VCO
Φref(t) e(t) v(t) Φout(t)
2 Kv
H(f)
π jf

Divider
Φdiv(t)
1
N

N+1
N
t

ƒ Change in output frequency achieved by changing the

divide value
ƒ Classical approach provides no direct model of
impact of divide value variations
- Treat divide value variation as a perturbation to a linear
system
ƒ PLL responds according to its closed loop response
M.H. Perrott 27
 Response of an Actual PLL to Divide Value Change

ƒ Example: Change divide value by one

Synthesizer Response To Divider Step

93
N (Divide Value)

92.8

92.6

92.4

92.2

92

91.8
40 60 80 100 120 140 160 180 200 220 240

1.87
Output Frequency (GHz)

1.86

1.85

1.84

1.83
40 60 80 100 120 140 160 180 200 220 240
Time (microseconds)

M.H. Perrott
- PLL responds according to closed loop response! 28
 What Happens with Large Divide Value Variations?
ƒ PLL temporarily loses frequency lock (cycle slipping
occurs)
Synthesizer Response To Divider Step
96
N (Divide Value)
95

94

93

92
40 60 80 100 120 140 160 180 200 220 240
Output Frequency (GHz)

1.92

1.9

1.88

1.86

1.84

40 60 80 100 120 140 160 180 200 220 240

Time (microseconds)

- Why does this happen?

M.H. Perrott 29
 Recall Phase Detector Characteristic

avg{e(t)}
gain = -2/π 1 gain = 2/π

Φref - Φdiv
−π −π/2 0 π/2 π
-1

ƒ To simplify modeling, we assumed that we always

operated in a confined phase range (0 to π)
- Led to a simple PD model
ƒ Large perturbations knock us out of that confined
phase range
- PD behavior varies depending on the phase range it
happens to be in

M.H. Perrott 30
 Cycle Slipping
ƒ Consider the case where there is a frequency offset
between divider output and reference
- We know that phase difference will accumulate
ref(t)

div(t)

ƒ Resulting ramp in phase causes PD characteristic to

be swept across its different regions (cycle slipping)
avg{e(t)}
gain = -2/π 1 gain = 2/π

Φref - Φdiv
−π −π/2 0 π/2 π
-1

M.H. Perrott 31
 Impact of Cycle Slipping

ƒ Loop filter averages out phase detector output

ƒ Severe cycle slipping causes phase detector to
alternate between regions very quickly
- Average value of XOR characteristic can be close to
zero
- PLL frequency oscillates according to cycle slipping
- In severe cases, PLL will not re-lock
ƒ PLL has finite frequency lock-in range!

XOR DC characteristic
cycle slipping
1

Φref - Φdiv
−π π 3π nπ (n+2)π
-1

M.H. Perrott 32
 Back to PLL Response Shown Previously
ƒ PLL output frequency indeed oscillates
- Eventually locks when frequency difference is small enough
Synthesizer Response To Divider Step
96
N (Divide Value)

95

94

93

92
40 60 80 100 120 140 160 180 200 220 240
Output Frequency (GHz)

1.92

1.9

1.88

1.86

1.84

40 60 80 100 120 140 160 180 200 220 240

Time (microseconds)

- How do we extend the frequency lock-in range?

M.H. Perrott 33
 Phase Frequency Detectors (PFD)

ƒ Example: Tristate PFD

up(t)
1 D Q
ref(t) Q
R
e(t)

R
1 D Q
down(t)
div(t) Q

Ref(t)

Div(t)

Up(t)

Down(t)

1
E(t)
0
-1
M.H. Perrott 34
 Tristate PFD Characteristic
ƒ Calculate using similar approach as used for XOR
phase detector avg{e(t)}

1
gain = 1/(2π)

−2π
Φref - Φdiv
2π

−1

phase detector
range = 4π

ƒ Note that phase error characteristic is asymmetric

about zero phase
- Key attribute for enabling frequency detection
M.H. Perrott 35
 PFD Enables PLL to Always Regain Frequency Lock

ƒ Asymmetric phase error characteristic allows positive

frequency differences to be distinguished from
negative frequency differences
- Average value is now positive or negative according to
sign of frequency offset
- PLL will always relock
Tristate DC characteristic
cycle slipping

−2π
Φref - Φdiv
0 2π 4π 2nπ

lock
-1

M.H. Perrott 36
 Another PFD Structure

ƒ XOR-based PFD
D Q

ref(t) D Q Q
ref/2(t) R
Q e(t)

div(t) D Q div/2(t)
Q D SQ
Q

Divide-by-2 Phase Frequency

Detector Detector

ref(t)

div(t)

ref/2(t)

div/2(t)
1
e(t)
-1

M.H. Perrott 37
 XOR-based PFD Characteristic

ƒ Calculate using similar approach as used for XOR phase

detector
avg{e(t)}
gain = 1/π
1

−3π
Φref - Φdiv
−2π 0 π 2π 4π 5π

−1

phase detector
range = 2π

ƒ Phase error characteristic asymmetric about zero phase

- Average value of phase error is positive or negative during
cycle slipping depending on sign of frequency error

M.H. Perrott 38
 Linearized PLL Model With PFD Structures

ƒ Assume that when PLL in lock, phase variations are

within the linear range of PFD
- Simulate impact of cycle slipping if desired (do not
include its effect in model)
ƒ Same frequency-domain PLL model as before, but
PFD gain depends on topology used

Tristate: α=1
PFD XOR-based: α=2
Loop Filter VCO
Φref(t) α e(t) v(t) Φout(t)
Kv
H(f)
2π jf

Divider
Φdiv(t)
1
N

M.H. Perrott 39
 Type I versus Type II PLL Implementations

ƒ Type I: one integrator in PLL open loop transfer

function
- VCO adds on integrator
- Loop filter, H(f), has no integrators
ƒ Type II: two integrators in PLL open loop transfer
function
- Loop filter, H(f), has one integrator
Tristate: α=1
PFD XOR-based: α=2
Loop Filter VCO
Φref(t) α e(t) v(t) Φout(t)
Kv
H(f)
2π jf

Divider
Φdiv(t)
1
N

M.H. Perrott 40
 VCO Input Range Issue for Type I PLL Implementations

ƒ DC output range of gain block versus integrator

Gain Block Integrator
0 0
K
K s

ƒ Issue: DC gain of loop filter often small and PFD

output range is limited
- Loop filter output fails to cover full input range of VCO
VDD
No Output Range
Integrator of Loop Filter
Gnd

ref(t) e(t) Loop v(t) out(t)

PFD Filter
VCO

Divider

N[k]
M.H. Perrott 41
 Options for Achieving Full Range Span of VCO
ƒ Type I
- Add a D/A converter to provide coarse tuning
ƒ Adds power and complexity
ƒ Steady-state phase error inconsistently set
ƒ Type II
- Integrator automatically provides DC level shifting
ƒ Low power and simple implementation
ƒ Steady-state phase error always set to zero
Type I Type II

Output Range Output Range

Course of Loop Filter of Loop Filter
Tune D/A
VDD VDD
No Contains
Integrator Integrator
Gnd Gnd

e(t) Loop v(t) e(t) v(t)

C.P. Loop
Filter C.P.
Filter

M.H. Perrott 42
 A Common Loop Filter for Type II PLL Implementation

ƒ Use a charge pump to create the integrator

- Current onto a capacitor forms integrator
- Add extra pole/zero using resistor and capacitor
ƒ Gain of loop filter can be adjusted according to the
value of the charge pump current
ƒ Example: lead/lag network

e(t) i(t) v(t)

Charge
Pump
R1
C1
C2

M.H. Perrott 43
 Charge Pump Implementations

ƒ Switch currents in and out:

Single-Ended Differential

Icp Icp Icp

up(t)
Iout(t)
Iout(t)

down(t) e(t) e(t)

Icp 2Icp

M.H. Perrott 44
 Modeling of Loop Filter/Charge Pump

ƒ Charge pump is gain element

ƒ Loop filter forms transfer function

Charge Loop
Pump Filter
e(t) v(t)
Icp H(s)

ƒ Example: lead/lag network from previous slide

M.H. Perrott 45
 PLL Design with Lead/Lag Filter

ƒ Overall PLL block diagram

Tristate: α=1
PFD XOR-based: α=2 Charge
Pump Loop Filter VCO
Φref(t) α e(t) v(t) Kv Φout(t)
Icp H(f)
2π jf

Divider
Φdiv(t)
1
N

ƒ Loop filter

ƒ Set open loop gain to achieve adequate phase margin

- Set f lower than and f
z p higher than desired PLL bandwidth
M.H. Perrott 46
 Closed Loop Poles Versus Open Loop Gain
Evaluation of Closed Loop Pole
Phase Margin Locations of G(f)
Im{s}
Open loop 20log|A(f)|
gain C
increased

Dominant
B pole pair
0 dB f
fz fp A
Non-dominant
C pole
B
A Re{s}
angle(A(f)) A BC 0
o
120
PM = 54oo for B
PM = 53 for A
PM = 55o for C A
o
-140

o
B
-160

o
-180 C

ƒ Open loop gain cannot be too low or too high if

reasonable phase margin is desired
M.H. Perrott 47
 Impact of Parasitics When Lead/Lag Filter Used

ƒ We can again model impact of parasitics by including

them in loop filter transfer function

e(t) i(t) v(t)

Charge Parasitics
Pump
R1
C1
C2

ƒ Example: include two parasitic poles with the lead/lag

transfer function

M.H. Perrott 48
 Closed Loop Poles Versus Open Loop Gain
Evaluation of Closed Loop Pole
Phase Margin Locations of G(f)
Im{s}
Open loop 20log|A(f)| C
gain Dominant
increased pole pair

B
0 dB f
fz fp fp2 fp3
Non-dominant
poles A
C
B Re{s}
A
angle(A(f)) A BC 0
o
120
A
o
o
PM = 46 for A
-140
PM = 38o for B
B
o
-160

o
-180 C
PM = -7o for C

ƒ Closed loop response becomes unstable if open loop

gain is too high
M.H. Perrott 49
 Negative Issues For Type II PLL Implementations

Peaking caused by Step Responses for a Second Order

|G(f)| undesired pole/zero pair G(f) implemented as a Bessel Filter
1.4

Normalized Amplitude
Type II: fz/fo = 1/3
fcp fz Type II: fz/fo = 1/8

1 1
Type I

0.6

0 f 0
fz fo 1 2 3 4
Frequency (Hz) Normalized time: t*fo

ƒ Parasitic pole/zero pair causes

- Peaking in the closed loop frequency response
ƒ A big issue for CDR systems, but not too bad for wireless
- Extended settling time due to parasitic “tail” response
ƒ Bad for wireless systems demanding fast settling time
M.H. Perrott 50
 Summary of Integer-N Dynamic Modeling

ƒ Linearized models can be derived for each PLL block

- Resulting transfer function model of PLL is accurate for
small perturbations in PLL
- Linear PLL model breaks down for large perturbations
on PLL, such as a large step change in frequency
ƒ Cycle slipping is key nonlinear effect

ƒ Key issues for designing PLL are

- Achieve stable operation with desired bandwidth
- Allow full range of VCO with a simple implementation
ƒ Type II PLL is very popular to achieve this

M.H. Perrott 51
Noise Analysis of Integer-N Synthesizers
 Frequency Synthesizer Noise in Wireless Systems

Zin
From Antenna PC board Mixer
and Bandpass trace RF in IF out
Filter Zo Package LNA To Filter
Interface

LO signal
VCO
Reference Frequency
Frequency Synthesizer
Phase
Noise

f
fo

ƒ Synthesizer noise has a negative impact on system

- Receiver – lower sensitivity, poorer blocking performance
- Transmitter – increased spectral emissions (output spectrum
must meet a mask requirement)
ƒ Noise is characterized in frequency domain
M.H. Perrott 53
 Noise Modeling for Frequency Synthesizers

Sout(f)
Phase
Extrinsic noise Noise
PLL dynamics (from PLL)
set VCO Intrinsic
carrier frequency noise f
vn(t) fo
vc(t) vin(t) out(t)

To PLL

ƒ PLL has an impact on VCO noise in two ways

- Adds extrinsic noise from various PLL circuits
- Highpass filters VCO noise through PLL feedback dynamics
ƒ Focus on modeling the above based on phase deviations
- Simpler than dealing directly with PLL sine wave output
M.H. Perrott 54
 Phase Deviation Model for Noise Analysis

Note: Kv units are Hz/V Frequency-domain view

Sout(f)
Phase
Extrinsic noise Noise
PLL dynamics (from PLL)
set VCO Intrinsic
carrier frequency f
vn(t) noise Φvn(t) fo
vc(t) vin(t) 2πKv Φout out(t)
2cos(2πfot+Φout(t))
s
To PLL

ƒ Model the impact of noise on instantaneous phase

- Relationship between PLL output and instantaneous phase

- Output spectrum (we will derive this in a later lecture)

M.H. Perrott 55
 Phase Noise Versus Spurious Noise

ƒ Phase noise is non-periodic Sout(f)

1
SΦout(f)
dBc/Hz
f
-fo fo
- Described as a spectral density relative to carrier power

ƒ Spurious noise is periodic Sout(f)

fspur
1 1 dspur 2
dBc 2 fspur
f
-fo fo
- Described as tone power relative to carrier power

M.H. Perrott 56
 Sources of Noise in Frequency Synthesizers
Reference Reference Charge Pump VCO Noise
Jitter Feedthrough Noise
-20 dB/dec

f f f f
1/T
T

ref(t) e(t) Charge v(t)

Loop
PFD
Pump Filter
VCO

div(t) Divider
Divider
Jitter
N
f

ƒ Extrinsic noise sources to VCO

- Reference/divider jitter and reference feedthrough
- Charge pump noise
M.H. Perrott 57
 Modeling the Impact of Noise on Output Phase of PLL
Divider/Reference Reference Charge Pump
Jitter Feedthrough Noise VCO Noise

S Φjit(f) S Espur(f) S Ιcpn(f) S Φvn(f)

-20 dB/dec

f f f f
0 0 1/T 0 0

Φjit[k] espur(t) Ιcpn(t) Φvn(t)

Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ Determine impact on output phase by deriving

transfer function from each noise source to PLL
output phase
- There are a lot of transfer functions to keep track of!
M.H. Perrott 58
 Simplified Noise Model
PFD-referred VCO-referred
Noise Noise
S En(f) S Φvn(f)

-20 dB/dec

f f
0 1/T 0

en(t) Φvn(t)
Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ Refer all PLL noise sources (other than the VCO) to

the PFD output
- PFD-referred noise corresponds to the sum of these
noise sources referred to the PFD output
M.H. Perrott 59
 Impact of PFD-referred Noise on Synthesizer Output
PFD-referred VCO-referred
Noise Noise
S En(f) S Φvn(f)

-20 dB/dec

f f
0 1/T 0

en(t) Φvn(t)
Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ Transfer function derived using Black’s formula

M.H. Perrott 60
 Impact of VCO-referred Noise on Synthesizer Output
PFD-referred VCO-referred
Noise Noise
S En(f) S Φvn(f)

-20 dB/dec

f f
0 1/T 0

en(t) Φvn(t)
Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ Transfer function again derived from Black’s formula

M.H. Perrott 61
 A Simpler Parameterization for PLL Transfer Functions
PFD-referred VCO-referred
Noise Noise
S En(f) S Φvn(f)

-20 dB/dec

f f
0 1/T 0

en(t) Φvn(t)
Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ Define G(f) as Always has a gain

of one at DC

- A(f) is the open loop transfer function of the PLL

M.H. Perrott 62
 Parameterize Noise Transfer Functions in Terms of G(f)

ƒ PFD-referred noise

ƒ VCO-referred noise

M.H. Perrott 63
 Parameterized PLL Noise Model
PFD-referred VCO-referred
Noise Noise
S En(f) S Φvn(f)

-20 dB/dec

f f
0 1/T 0
en(t) Φvn(t)

π 1-G(f)
fo α N G(f) fo

Φnpfd(t) Φnvco(t)

Φn(t)
Divider Control Φc(t) Φout(t)
of Frequency Setting
(assume noiseless for now)

ƒ PFD-referred noise is lowpass filtered

ƒ VCO-referred noise is highpass filtered
ƒ Both filters have the same transition frequency values
- Defined as f o
M.H. Perrott 64
 Impact of PLL Parameters on Noise Scaling
PFD-referred VCO-referred
Noise Noise 2
π
S En(f) S Φvn(f) α N S e n (f)

Radians2/Hz
-20 dB/dec
S Φvn(f)
f f
0 1/T 0
en(t) Φvn(t) f
0

π 1-G(f)
fo α N G(f) fo

Φnpfd(t) Φnvco(t)

Φn(t)
Divider Control Φc(t) Φout(t)
of Frequency Setting
(assume noiseless for now)

ƒ PFD-referred noise is scaled by square of divide value

and inverse of PFD gain
- High divide values lead to large multiplication of this noise
ƒ VCO-referred noise is not scaled (only filtered)
M.H. Perrott 65
 Optimal Bandwidth Setting for Minimum Noise
PFD-referred VCO-referred
Noise Noise 2
π
S En(f) S Φvn(f) α N S e n (f)

Radians2/Hz
-20 dB/dec
S Φvn(f)
f f
0 1/T 0
en(t) Φvn(t) f
0 (fo)opt
π 1-G(f)
fo α N G(f) fo

Φnpfd(t) Φnvco(t)

Φn(t)
Divider Control Φc(t) Φout(t)
of Frequency Setting
(assume noiseless for now)

ƒ Optimal bandwidth is where scaled noise sources meet

- Higher bandwidth will pass more PFD-referred noise
- Lower bandwidth will pass more VCO-referred noise
M.H. Perrott 66
 Resulting Output Noise with Optimal Bandwidth
PFD-referred VCO-referred
Noise Noise 2
π
S En(f) S Φvn(f) α N S e n (f)

Radians2/Hz
-20 dB/dec
S Φvn(f)
f f
0 1/T 0
en(t) Φvn(t) f
0 (fo)opt
π 1-G(f)
fo α N G(f) fo
S Φnpfd(f)

Radians2/Hz
Φnpfd(t) Φnvco(t)
S Φnvco(f)
Φn(t)
Divider Control Φc(t) Φout(t)
of Frequency Setting
(assume noiseless for now) f
0 (fo)opt

ƒ PFD-referred noise dominates at low frequencies

- Corresponds to close-in phase noise of synthesizer
ƒ VCO-referred noise dominates at high frequencies

M.H. Perrott
- Corresponds to far-away phase noise of synthesizer 67
 Analysis of Charge Pump Noise Impact
Charge Pump VCO Noise
Noise
S Ιcpn(f) S Φvn(f)

-20 dB/dec

PFD-referred
f f
Noise 0 0

en(t) Ιcpn(t) Φvn(t)

Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ We can refer charge pump noise to PFD output by

simply scaling it by 1/Icp

M.H. Perrott 68
 Calculation of Charge Pump Noise Impact
Charge Pump VCO Noise
Noise
S Ιcpn(f) S Φvn(f)

-20 dB/dec

PFD-referred
f f
Noise 0 0

en(t) Ιcpn(t) Φvn(t)

Φref [k] α e(t) v(t) KV Φout(t)
Icp H(f)
π jf
Charge Loop
VCO
PFD Pump Filter
Φdiv[k]
1
N
Divider

ƒ Contribution of charge pump noise to overall output noise

- Need to determine impact of I cp on SIcpn(f)

M.H. Perrott 69
 Impact of Transistor Current Value on its Noise

Id
Ibias

id2bias id2 W
M1 M2 L
Cbig
current current
bias source

ƒ Charge pump noise will be related to the current it

creates as

ƒ Recall that gdo is the channel resistance at zero Vds

- At a fixed current density, we have

M.H. Perrott 70
 Impact of Charge Pump Current Value on Output Noise

ƒ Recall

ƒ Given previous slide, we can say

- Assumes a fixed current density for the key transistors

in the charge pump as Icp is varied
ƒ Therefore

- Want high charge pump current to achieve low noise

- Limitation set by power and area considerations
M.H. Perrott 71
 Impact of Synthesizer Noise on Transmitters
Sx(f) Sy(f)
reduction
of SNR
out-of-band
emission

f f
fIF fRF
x(t) y(t)

out(t) Sout(f) close-in

phase noise
far-away
Synthesizer phase noise
f
fLO

ƒ Synthesizer noise can be lumped into two categories

- Close-in phase noise: reduces SNR of modulated signal
- Far-away phase noise: creates spectral emissions outside
the desired transmit channel
ƒ This is the critical issue for transmitters
M.H. Perrott 72
 Impact of Remaining Portion of Transmitter
Sx(f) Sy(f)
reduction
of SNR
out-of-band
emission

f f Band Select
fIF fRF
Filter
x(t) y(t)
To
PA Antenna
out(t) Sout(f) close-in
phase noise
far-away
Synthesizer phase noise
f
fLO

ƒ Power amplifier
- Nonlinearity will increase out-of-band emission and create
harmonic content
ƒ Band select filter
- Removes harmonic content, but not out-of-band emission
M.H. Perrott 73
 Why is Out-of-Band Emission A Problem?

Transmitter
Interfering
1 Channel

( Desired
Channel)
Relative
Power
Difference
(dB)

Desired
Transmitter Channel
2 Base
Station
( Interfering
Channel )

ƒ Near-far problem
- Interfering transmitter closer to receiver than desired
transmitter
- Out-of-emission requirements must be stringent to
prevent complete corruption of desired signal
M.H. Perrott 74
 Specification of Out-of-Band Emissions
Maximum
RF Output
Emission Integration
(dBm) M0 dBm Bandwidth
= R Hz
M1 dBm
M2 dBm
M3 dBm
f
fRF

Channel Spacing
= W Hz

ƒ Maximum radiated power is specified in desired and

adjacent channels
- Desired channel power: maximum is M dBm 0
- Out-of-band emission: maximum power defined as
integration of transmitted spectral density over
bandwidth R centered at midpoint of each channel offset
M.H. Perrott 75
 Calculation of Transmitted Power in a Given Channel
R Hz R Hz

Sx(fmid) Sx(fmid)

fmid fmid

ƒ For simplicity, assume that the spectral density is flat

over the channel bandwidth
- Actual spectral density of signal often varies with
frequency over the bandwidth of a given channel
ƒ Resulting power calculation (single-sided Sx(f))

ƒ Express in dB ( Note: dB(x) = 10log(x) )

M.H. Perrott 76
 Transmitter Output Versus Emission Specification
Piecewise Constant Approximation
of Transmitter Output Spectrum Emission Specification
RF Output Maximum
(dBm) RF Output
Y0 dBm Emission
Channel Integration
Spacing (dBm)
M0 dBm Bandwidth
= W Hz = R Hz
Y0+X1 dBm M1 dBm
Y0+X2 dBm M2 dBm
Y0+X3 dBm M3 dBm
f f
fRF fRF
Channel Spacing Channel Spacing
= W Hz = W Hz

ƒ Assume a piecewise constant spectral density profile

for transmitter
- Simplifies calculations
ƒ Issue: emission specification is measured over a
narrower band than channel spacing
- Need to account for bandwidth discrepancy when doing
calculations
M.H. Perrott 77
 Correction Factor for Bandwidth Mismatch
Piecewise Constant Approximation
of Transmitter Output Spectrum Emission Specification
RF Output Maximum
(dBm) RF Output
Y0 dBm Emission
Channel Integration
Spacing (dBm)
M0 dBm Bandwidth
= W Hz = R Hz
Y0+X1 dBm M1 dBm
Y0+X2 dBm M2 dBm
Y0+X3 dBm M3 dBm
f f
fRF fRF
Channel Spacing Channel Spacing
= W Hz = W Hz

ƒ Calculation of maximum emission in offset channel 1

M.H. Perrott 78
 Condition for Most Stringent Emission Requirement
Piecewise Constant Approximation
of Transmitter Output Spectrum Emission Specification
RF Output Maximum
(dBm) RF Output
Y0 dBm Emission
Channel Integration
Spacing (dBm)
M0 dBm Bandwidth
= W Hz = R Hz
Y0+X1 dBm M1 dBm
Y0+X2 dBm M2 dBm
Y0+X3 dBm M3 dBm
f f
fRF fRF
Channel Spacing Channel Spacing
= W Hz = W Hz

ƒ Out-of-band emission requirements are function of

the power of the signal in the desired channel
- For offset channel 1 (as calculated on previous slide)

- Most stringent case is when Y 0 maximum

M.H. Perrott 79
 Table of Most Stringent Emission Requirements
Piecewise Constant Approximation
of Transmitter Output Spectrum Emission Specification
RF Output Maximum
(dBm) RF Output
Y0 dBm Emission
Channel Integration
Spacing (dBm)
M0 dBm Bandwidth
= W Hz = R Hz
Y0+X1 dBm M1 dBm
Y0+X2 dBm M2 dBm
Y0+X3 dBm M3 dBm
f f
fRF fRF
Channel Spacing Channel Spacing
= W Hz = W Hz

Channel Mask Emission Requirements

Offset Power (Most Stringent)
0 M0 dBm Y0 = M0 (for most stringent case)
1 M1 dBm X1 = M1-M0 + dB(W/R) dB
2 M2 dBm X2 = M2-M0 + dB(W/R) dB
3 M3 dBm X3 = M3-M0 + dB(W/R) dB

M.H. Perrott 80
 Impact of Synthesizer Noise on Transmitter Output
IF Input RF Output M0 dBm
(dBm) (dBm)

M0+X2 dBm
f f
fIF fRF
foffset

Synthesizer IF RF
Spectrum 0 dBc
To
PA Antenna
(dBc)
Band Select
Filter
X2 dBc LO
f
fLO
foffset

ƒ Consider a spurious tone at a given offset frequency

- Convolution with IF signal produces a replica of the
desired signal at the given offset frequency

M.H. Perrott 81
 Impact of Synthesizer Phase Noise (Isolated Channel)
IF Input RF Output M0 dBm
(dBm) (dBm)

M0+X2 dBm
f f
fIF fRF
foffset

Synthesizer IF RF
Spectrum 0 dBc
To
PA Antenna
(dBc)
Band Select
Filter
X2 dBc LO
f
fLO
foffset

ƒ Consider phase noise at a given offset frequency

- Convolution with IF signal produces a smeared version
of the desired signal at the given offset frequency
ƒ For simplicity, approximate smeared signal as shown
M.H. Perrott 82
 Impact of Synthesizer Phase Noise (All Channels)
IF Input RF Output M0 dBm
(dBm) (dBm)
M0+X1 dBm
M0+X2 dBm
M0+X3 dBm
f f
fIF fRF
Channel Spacing
= W Hz
Synthesizer IF RF
Spectrum 0 dBc
To
PA Antenna
(dBc)
X0 dBc Band Select
X1 dBc Filter
X2 dBc LO
X3 dBc
f
fLO
Channel Spacing
= W Hz

ƒ Partition synthesizer phase noise into channels

- Required phase noise power (dBc) in each channel is
related directly to spectral mask requirements
ƒ Exception is X0 – set by transmit SNR requirements
M.H. Perrott 83
 Synthesizer Phase Noise Requirements
Synthesizer IF RF
Spectrum 0 dBc
To
PA Antenna
(dBc)
X0 dBc Band Select
X1 dBc Filter
X2 dBc LO
X3 dBc
f
fLO
Channel Spacing
= W Hz
ƒ Impact of channel bandwidth (offset channel 1)

ƒ Overall requirements (most stringent, i.e., Y0 = M0)

Channel Emission Requirements Maximum Synth. Phase Noise
Offset (Most Stringent) (Most Stringent)
0 Y0 = M0 set by required transmit SNR
1 X1 = M1-M0 + dB(W/R) dB X1 - dB(W) dBc/Hz
2 X2 = M2-M0 + dB(W/R) dB X2 - dB(W) dBc/Hz
3 X3 = M3-M0 + dB(W/R) dB X3 - dB(W) dBc/Hz
M.H. Perrott 84
 Example – DECT Cordless Telephone Standard

ƒ Standard for many cordless phones operating at 1.8 GHz

ƒ Transmitter Specifications
- Channel spacing: W = 1.728 MHz
- Maximum output power: M = 250 mW (24 dBm)
o
- Integration bandwidth: R = 1 MHz
- Emission mask requirements

M.H. Perrott 85
 Synthesizer Phase Noise Requirements for DECT

ƒ Using previous calculations with DECT values

Channel Mask Maximum Synth. Noise Maximum Synth. Phase Noise
Offset Power Power in Integration BW at Channel Offset
0 24 dBm set by required transmit SNR
1.728 MHz -8 dBm X1 = -29.6 dBc -92 dBc/Hz
3.456 MHz -30 dBm X2 = -51.6 dBc -114 dBc/Hz
5.184 MHz -44 dBm X3 = -65.6 dBc -128 dBc/Hz

ƒ Graphical display of phase noise mask

Synthesizer
Spectrum
(dBc)
-92 dBc/Hz

-114 dBc/Hz

-128 dBc/Hz

fLO f

Channel Spacing = 1.728 MHz

M.H. Perrott 86
 Critical Specification for Phase Noise

ƒ Critical specification is defined to be the one that is

hardest to meet with an assumed phase noise rolloff
- Assume synthesizer phase noise rolls off at -20
dB/decade
ƒ Corresponds to VCO phase noise characteristic
ƒ For DECT transmitter synthesizer
- Critical specification is -128 dBc/Hz at 5.184 MHz offset
Synthesizer 0 dBc Phase Noise
Spectrum Rolloff: -20 dB/dec
(dBc)
-92 dBc/Hz
Critical
Spec.
-114 dBc/Hz

-128 dBc/Hz

fLO f

Channel Spacing = 1.728 MHz

M.H. Perrott 87
 Receiver Blocking Performance
Band Select Filter Must
RF Input IF Output
(dBm) Pass All Channels (dBm) Channel Filter
-39 Bandwidth
-58
-73

f f
fRF fIF
Band Select Channel
Filter Filter
To
LNA IF Processing
Stage
Synthesizer
Spectrum 0 dBc
(dBc/Hz)
Synthesizer
f
fLO

ƒ Radio receivers must operate in the presence of large

interferers (called blockers)
ƒ Channel filter plays critical role in removing blockers
ƒ Passes desired signal channel, rejects interferers
M.H. Perrott 88
 Impact of Nonidealities on Blocking Performance
Band Select Filter Must
RF Input IF Output
(dBm) Pass All Channels (dBm) Channel Filter
-39 Bandwidth
-58 Synthesizer Noise
-73 and Mixer/LNA Distortion
Produce Inband Interference

f f
fRF fIF
Band Select Channel
Filter Filter
To
LNA IF Processing
Stage
Synthesizer
Spectrum Phase Noise
0 dBc (dBc/Hz)
(dBc/Hz)
Synthesizer Spurious Noise
(dBc)
f
fLO

ƒ Blockers leak into desired band due to

- Nonlinearity of LNA and mixer (IIP3)
- Synthesizer phase and spurious noise
ƒ In-band interference cannot be removed by channel filter!
M.H. Perrott 89
 Quantifying Tolerable In-Band Interference Levels
Band Select Filter Must
RF Input IF Output
(dBm) Pass All Channels (dBm) Channel Filter
-39 Bandwidth
-58 Synthesizer Noise
-73 Min SNR: 15-20 dB and Mixer/LNA Distortion
Produce Inband Interference

f f
fRF fIF
Band Select Channel
Filter Filter
To
LNA IF Processing
Stage
Synthesizer
Spectrum Phase Noise
0 dBc (dBc/Hz)
(dBc/Hz)
Synthesizer Spurious Noise
(dBc)
f
fLO

ƒ Digital radios quantify performance with bit error rate (BER)

- Minimum BER often set at 1e-3 for many radio systems
- There is a corresponding minimum SNR that must be achieved
ƒ Goal: design so that SNR with interferers is above SNRmin
M.H. Perrott 90
 Impact of Synthesizer on Blockers
RF Input IF Output
(dBm) (dBm)

Y dB

f f
fRF fIF
foffset
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

LO
f
fLO

ƒ Synthesizer passes desired signal and blocker

- Assume blocker is Y dB higher in signal power than
desired signal

M.H. Perrott 91
 Impact of Synthesizer Spurious Noise on Blockers
RF Input IF Output
(dBm) (dBm)

Y dB
X dB
SNR: -X-Y dB

f f
fRF fIF
foffset
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

Spurious X dBc
Tone
LO
f
fLO
foffset

ƒ Spurious tones cause the blocker (Y dB) (and desired)

signals to “leak” into other frequency bands
- In-band interference occurs when spurious tone offset
frequency is same as blocker offset frequency

M.H. Perrott
- Resulting SNR = -X-Y dB with spurious tone (X dBc) 92
 Impact of Synthesizer Phase Noise on Blockers
RF Input IF Output
(dBm) (dBm)

Y dB
X dB
SNR: -X-Y dB

f f
fRF fIF
foffset
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

X dBc LO
f
fLO
foffset

ƒ Same impact as spurious tone, but blocker signal is

“smeared” by convolution with phase noise
- For simplicity, ignore “smearing” and approximate as
shown above

M.H. Perrott 93
 Blocking Performance Analysis (Part 1)
RF Input In-Channel
(dBm) IF Output
(dBm)
Y dB

SNR: -X-Y dB

f f
fRF fIF
foffset
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

X dBc LO
f
fLO
foffset

ƒ Ignore all out-of-band energy at the IF output

- Assume that channel filter removes it
- Motivation: simplifies analysis
M.H. Perrott 94
 Blocking Performance Analysis (Part 2)
RF Input In-Channel
(dBm) IF Output Channel Filter
(dBm) Bandwidth
Y1 dB = W Hz
Y2 dB
Inband Interference
SNRmin: 15-20 dB Produced by
Synth. Phase Noise
f f
fRF fIF
Channel Spacing
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

X0 dBc
X1 dBc
X2 dBc LO
f
fLO
Channel Spacing

ƒ Consider the impact of blockers surrounding the

desired signal with a given phase noise profile
- SNR must be maintained
min
- Evaluate impact on SNR one blocker at a time
M.H. Perrott 95
 Blocking Performance Analysis (Part 3)
RF Input In-Channel
(dBm) IF Output Channel Filter
(dBm) Bandwidth
Y1 dB = W Hz
Y2 dB
Inband Interference
SNRmin: 15-20 dB Produced by
Synth. Phase Noise
f f
fRF fIF
Channel Spacing
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

X0 dBc
X1 dBc
X2 dBc LO
f Derive using
fLO
Channel Spacing
the relationship
SNR = -X-Y dB >= SNRmin
Channel Relative Blocking Maximum Synth. Noise
Offset Power Power at Channel Offset
0 0 dB X0 = -SNRmin dBc
1 Y1 dB X1 = -SNRmin-Y1 dBc
2 Y2 dB X2 = -SNRmin-Y2 dBc
3 Y3 dB X3 = -SNRmin-Y3 dBc

M.H. Perrott 96
 Blocking Performance Analysis (Part 4)
RF Input In-Channel
(dBm) IF Output Channel Filter
(dBm) Bandwidth
Y1 dB = W Hz
Y2 dB
Inband Interference
SNRmin: 15-20 dB Produced by
Synth. Phase Noise
f f
fRF fIF
Channel Spacing
Synthesizer
Spectrum RF IF
(dBc) 0 dBc

X0 dBc
X1 dBc
X2 dBc LO Convert power to
f
fLO spectral density
Channel Spacing

Channel Relative Blocking Maximum Synth. Noise Maximum Synth. Phase

Offset Power Power at Channel Offset Noise at Channel Offset
0 0 dB X0 = -SNRmin dBc X0 - dB(W) dBc/Hz
1 Y1 dB X1 = -SNRmin-Y1 dBc X1 - dB(W) dBc/Hz
2 Y2 dB X2 = -SNRmin-Y2 dBc X2 - dB(W) dBc/Hz
3 Y3 dB X3 = -SNRmin-Y3 dBc X3 - dB(W) dBc/Hz

M.H. Perrott 97
 Example – DECT Cordless Telephone Standard

ƒ Receiver blocking specifications

- Channel spacing: W = 1.728 MHz
- Power of desired signal for blocking test: -73 dBm
- Minimum bit error rate (BER) with blockers: 1e-3
ƒ Sets the value of SNRmin
ƒ Perform receiver simulations to determine SNRmin
ƒ Assume SNRmin = 15 dB for calculations to follow
- Strength of interferers for blocking test

M.H. Perrott 98
 Synthesizer Phase Noise Requirements for DECT
RF Input
(dBm) In-Channel
-33 dBm IF Output Channel Filter
(dBm) Bandwidth
-39 dBm
-58 dBm W = 1.73 MHz
-73 dBm Inband Interference
SNRmin: 15 dB Produced by
Synth. Phase Noise
f f
fRF fIF
Channel Spacing
Synthesizer = 1.73 MHz
Spectrum RF IF
(dBc) 0 dBc

X0 dBc
X1 dBc
X2 dBc LO
X3 dBc
f
fLO
Channel Spacing
= 1.73 MHz
Channel Relative Blocking Maximum Synth. Noise Maximum Synth. Phase
Offset Power Power at Channel Offset Noise at Channel Offset
0 0 dB X0 = -15 dBc -77 dBc/Hz
1.728 MHz Y1 = 15 dB X1 = -30 dBc -92 dBc/Hz
3.456 MHz Y2 = 34 dB X2 = -49 dBc -111 dBc/Hz
5.184 MHz Y3 = 40 dB X3 = -55 dBc -117 dBc/Hz
M.H. Perrott 99
 Graphical Display of Required Phase Noise Performance

ƒ Mark phase noise requirements at each offset frequency

Synthesizer
Spectrum
(dBc)
0 dBc
Phase Noise
Rolloff: -20 dB/dec

-92 dBc/Hz Critical

Spec.
-111 dBc/Hz
-117 dBc/Hz

fLO f

Channel Spacing = 1.728 MHz

ƒ Calculate critical specification for receive synthesizer

- Critical specification is -117 dBc/Hz at 5.184 MHz offset
ƒ Lower performance demanded of receiver synthesizer than
transmitter synthesizer in DECT applications!
M.H. Perrott 100
 Summary of Noise Analysis of Integer-N Synthesizers

ƒ Key PLL noise sources are

- VCO noise (we will cover in detail tomorrow)
- PFD-referred noise
ƒ Charge pump noise, reference noise, etc.

ƒ Setting of PLL bandwidth has strong impact on noise

- High PLL bandwidth suppresses VCO noise
- Low PLL bandwidth suppresses PFD-referred noise
ƒ Noise performance required of PLL depends on
application
- Wireless transmitter: must meek spectral mask
- Wireless receiver: must suppress blockers and achieve
good SNR for received signal
M.H. Perrott 101