Scribd Logo
Upload

Welcome to Scribd!

  • Memory and Programmable Logic 7-1

    Uploaded by

    李亞竹
    14 views13 pages
    This document discusses memory and programmable logic. It introduces random access memory (RAM), which can be read from and written to, and read-only memory (ROM), which can only be read from. It also discusses programmable logic devices like PLDs, PLAs, and FPGAs. RAM is described as storing information in words of bits and undergoing write and read operations through address and data lines. The timing of read and write cycles is also illustrated with diagrams. Finally, it distinguishes between volatile and non-volatile memory types.

    Original Description:

    Original Title

    chapter_7_A

    Copyright

    © © All Rights Reserved

    Available Formats

    PPTX, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    This document discusses memory and programmable logic. It introduces random access memory (RAM), which can be read from and written to, and read-only memory (ROM), which can only be read from. It also discusses programmable logic devices like PLDs, PLAs, and FPGAs. RAM is described as storing information in words of bits and undergoing write and read operations through address and data lines. The timing of read and write cycles is also illustrated with diagrams. Finally, it distinguishes between volatile and non-volatile memory types.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    14 views13 pages

    Memory and Programmable Logic 7-1

    Uploaded by

    李亞竹
    This document discusses memory and programmable logic. It introduces random access memory (RAM), which can be read from and written to, and read-only memory (ROM), which can only be read from. It also discusses programmable logic devices like PLDs, PLAs, and FPGAs. RAM is described as storing information in words of bits and undergoing write and read operations through address and data lines. The timing of read and write cycles is also illustrated with diagrams. Finally, it distinguishes between volatile and non-volatile memory types.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 13

    Chapter 7

    Memory and Programmable Logic (A)

     原編者 : 嚴茂旭 副教授


     修改 : 盧晃瑩

    Memory and Programmable Logic


    7-1
    7-1 Introduction

    • Memory
    – information storage
    – a collection of cells store binary information

    • RAM – Random-Access Memory


    – read operation
    – write operation

    • ROM – Read-Only Memory


    – read operation only
    – a programmable logic device

    Memory and Programmable Logic


    7-2
    7-1 Introduction

    • Programmable Logic Device (PLD)

    – ROM
    – PLA – programmable logic array
    – PAL – programmable array logic
    – FPGA – field-programmable gate array
    » programmable logic blocks
    » programmable interconnects

    Memory and Programmable Logic


    7-3
    7-1 Introduction

    Memory and Programmable Logic


    7-4
    7-1 Introduction

    Memory and Programmable Logic


    7-5
    7-1 Introduction

    Memory and Programmable Logic


    7-6
    7-2 Random-Access Memory

    • A memory unit
    – stores binary information in groups of bits (words)
    – 8 bits (a byte), 2 bytes, 4 bytes
    • Block diagram

    Memory and Programmable Logic


    7-7
    7-2 Random-Access Memory
    • A 1024  16 Memory

    Memory and Programmable Logic


    7-8
    7-2 Random-Access Memory
    Write and Read Operations
    • Write operation
    • Apply the binary address to the address lines
    • Apply the data bits to the data input lines
    • Activate the write input

    • Read operation
    • Apply the binary address to the address lines
    • Activate the read input

    Memory and Programmable Logic


    7-9
    7-2 Random-Access Memory
    Timing Waveforms
    • The operation of the memory unit is controlled by an external de
    vice.

    • The access time


    – the time required to select a word and read it.

    • The cycle time


    – the time required to complete a write operation.

    • Read and write operations must be synchronized with an externa


    l clock.

    Memory and Programmable Logic


    7-10
    7-2 Random-Access Memory
    Timing Waveforms
    • CPU clock – 50 MHz
    • The access/cycle time < 50 ns
    • A write cycle

    Memory and Programmable Logic


    7-11
    7-2 Random-Access Memory

    Timing Waveforms
    • A read cycle

    Memory and Programmable Logic


    7-12
    7-2 Random-Access Memory

    Types of Memories
    • Volatile
    – Lose stored information when power is turned off
    – SRAM, DRAM

    • Non-volatile
    – Retains its stored information after power is turned on
    – ROM
    – EPROM, EEPROM
    – Flash memory

    Memory and Programmable Logic


    7-13

    You might also like