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Input: 2 Bool
Output: 1 Bool
1 Boolean state – x
2 split tasks :
A1 for computing the output ‘out’
A2 for updating ‘x’
Single mode extended-state machine with
3 mode-switches
Synchronous Latch Component
The Latch component is nondeterministic and fine-state, and its output does not wait either of its input variables
Synchronous 1 Bit Binary Counter Synchronous 3 Bit Binary Counter
An Xor (Exclusive-Or) gate has two Boolean inputs in1 and in2, and a Boolean output out. The output is 1 when
exactly one of its two inputs are 1 and is 0 otherwise. Define the combinational component SyncXor to capture
this desired functionality by composing And, Or, and Not gates.
Design a 1-bit synchronous adder 1BitAdder by composing instances of And, Or, Not, and Xor gates. The component
1BitAdder has three input variables x, y, and carry-in and two output variables z and carry-out. In each round, the value
encoded by the two output bits z and carry-out, where z is the least significant bit, should equal the sum of the values of
three input variables. Then, design a 3-bit synchronous adder 3BitAdder by composing three instances of the component
1BitAdder. The component 3BitAdder has input variables x0, x1, x2, y0, y1, y2, and carry-in and has output variables z0, z1,
z2, and carry-out. In each round, the 4-bit number encoded by the output variables z0, z1, z2, and carry-out should equal
the sum of the 3-bit number encoded by the input variables x0, x1, and x2, the 3-bit number encoded by the input
variables y0, y1, and y2, and the input value of carry-in.
Solution: The combinational circuit 1BitAdder, uses 2 instances of SyncAnd, one instance of SyncOr and 2 instances of
SyncOr.
The output of z is 1 when an odd number of the input variables equal 1 and the coutput carry-out is 1 when 2 or more of
the input variables equals 1