90

Capitolul 4

CAPITOLUL 4

&LUFXLWH

ORJLFH FRPELQD LRQDOH

&LUFXLWHOH

ORJLFH

FRPELQD LRQDOH

FOF

VXQW

FLUFXLWH

I U

PHPRULH

LQGHSHQGHQWH GH SURSULLOH VW UL DQWHULRDUH FDUDFWHUL]DWH SULQ IDSWXO F LHLUH VXQW FRPELQD LL ORJLFH DOH VHPQDOHORU GH DFHVWHD GLQ XUP 6FKHPD H[LVW  EORF D XQXL FLUFXLW ORJLF FRPELQD LRQDO HVWH GDW vQ

VHPQDOHOH GH

intrare, existnd numai atta timp ct

ILJ  LDU

IXQF LLOH GH LHLUH DOH DFHVWXLD SRW IL VFULVH VXE IRUPD

yk = yk (x1, x2, ... , xn), cu k = 1, 2, ... , m.

x1 x2
. . . . . .

(4.1)
y1 C. L. C.
. . .

y2 ym

xn Fig. 4.1. Schema bloc a unui c.l.c.

,QGHSHQGHQ D ID VLPXOWDQ

GH WLPS D UHOD LLORU  DU SXWHD IL LQWHUSUHWDW

FD XQ U VSXQV

LQVWDQWDQHX L VLPXOWDQ DO LHLULORU FLUFXLWXOXL ORJLF FRPELQD LRQDO OD R PRGLILFDUH D LQWU ULORU DFHVWXLD XQ FOF UHSUH]LQW vQ F GLYHUVH HIHFWXO XQ DQVDPEOX DVWIHO GH SRU L ORJLFH LQIRUPD LLOH ORJLFH DOH Q UHDOLWDWH VLWXD LD HVWH SX LQ PDL FRPSOLFDW  LQkQG VHDPD GH IDSWXO F HOHPHQWDUH GH SRU L LQWHUFRQHFWDWH vQWUH HOH UH]XOW PRGXUL vQFkW

SUH]HQWH OD LQWU UL SDUFXUJ GH UHJXO  vQ GUXPXO ORU F WUH LHLUL XQ QXP U YDULDELO ORJLFH HOHPHQWDUH PRGLILF ULL YDORULORU LQWU ULORU FOF VH SURSDJ F WUH LHLUL vQ LQWHUYDOH GH WLPS GLIHULWH vQWRWGHDXQD

multipli de tpd.
OXQJ

FHD PDL VFXUW cale intrare-LHLUH SDUFXUJH a SRU L LDU FHD PDL b SRU L vQVHDPQ F YHFWRUXO LHLULORU YD vQFHSH V YDULH]H OD XQ LQWHUYDO de timp atpd GXS PRGLILFDUHD YHFWRUXOXL GH LQWUDUH L VH YD VWDELOL]D DELD GXS XQ interval de timp btpd de la momentul respectiv. Prin urmare, n intervalul (b-a)tpd YHFWRUXO GH LHLUH vQUHJLVWUHD] YDULD LL QHFRQIRUPH FX UHOD LD  FXQRVFXWH VXE GHQXPLUHD GH KD]DUG FRPELQD LRQDO sau hazard logic. (OLPLQDUHD LQFRQYHQLHQWHORU SH FDUH OH LPSOLF KD]DUGXO ORJLF SRDWH IL UHDOL]DW ILH vQ DVLJXUDUHD XQRU vQWkU]LHUL

3UHVXSXQkQG F

numai printr-R

SURLHFWDUH ULJXURDV

FDUH FRQVW

SUREOHPH LPSRUWDQWH L DQXPH DQDOL]D L VLQWH]D FOF

XUP UHWH VWDELOLUHD PRGXOXL GH IXQF LRQDUH D DFHVWXLD ILH SULQ FRQVWUXLUHD WDEHOXOXL GH IXQF LRQDUH ILH SULQ VFULHUHD IRUPHL DQDOLWLFH D IXQF LHL GH LHLUH

GHGXFHP GLQ DSURDSH vQ DSURDSH XUP ULQG WUDQVIRUP ULOH VHPQDOHORU GH LQWUDUH H[SUHVLD DQDOLWLF D IXQF LHL GH LHLUH

SDLL SUH]HQWD L vQ FRORDQHOH WDEHOXOXL 

7DE  7DEHOXO GH IXQF LRQDUH DO FOF GLQ ILJ 

EXCLUSIV (XOR).

 %% $" !   # " #    

egale pe toate tranzitoriu.
F LOH

91

intrare-LHLUH

ILH

SULQ

FLWLUHD

LQIRUPD LLORU

GH

OD

LHLUHD

FLUFXLWXOXL QXPDL GXS

WHUPLQDUHD LQWHUYDOXOXL

(b-a)tpd

FRUHVSXQ] WRU

procesului

 $QDOL]D L VLQWH]D FLUFXLWHORU ORJLFH FRPELQD LRQDOH

Q OHJ WXU FX FLUFXLWHOH ORJLFH FRPELQD LRQDOH VH SXQ GH UHJXO GRX

4.1.1. Analiza circuitelor logice combinD LRQDOH

$QDOL]D FOF SRUQHWH GH OD VFKHPD ORJLF FXQRVFXW D FLUFXLWXOXL L

SpUH

H[HPSOX SRUQLQG GH OD VFKHPD ORJLF

D XQXL FOF VLPSOX ILJ 

Y = AB + AB
A AB Y = AB + AB B AB

(4.2)

A B

Fig. 4.

6FKHPD ORJLF

D XQXL ;25

&RQVWUXLUHD WDEHOXOXL GH IXQF LRQDUH HVWH DFXP H[WUHP GH VLPSO

L XUPHD]

B 0 0 1 1

A 0 1 0 1

AB

AB

A B  AB

1 1 0 0

1 0 1 0

0 0 1 0

0 1 0 0

0 1 1 0 -

5HFXQRDWHP IXQF LD GH LHLUH L WDEHOXO GH IXQF LRQDUH DO FLUFXLWXOXL 6$8

92

Capitolul 4

4.1.2. Sinteza circuitelRU ORJLFH FRPELQD LRQDOH

6LQWH]D FOF FLUFXLWXO L SRUQHWH GH OD IXQF LD SH FDUH WUHEXLH V R vQGHSOLQHDVF vL SURSXQH RE LQHUHD XQHL YDULDQWH PLQLPDOH D VWUXFWXULL DFHVWXLD

(WDSHOH VLQWH]HL VXQW GHILQLUHD IXQF LHL IXQF LLORU GH LHLUH PLQLPL]DUHD L

n final, desenarea schemei circuitului.

'XS PRGXO vQ FDUH HVWH VFULV IXQF LD LPSOHPHQWDUHD VH SRDWH IDFH vQ GLYHUVH YDULDQWH GLQWUH FDUH PHQ LRQ P D FX RULFH FRPELQD LH GH FLUFXLWH ORJLFH HOHPHQWDUH

b) numai cu circuite NAND; c) numai cu circuite NOR.

6SUH H[HPSOX FRQVLGHUkQG IXQF LD

Y = AB

(4.3)
UHDOL] P VLQWH]D FLUFXLWXOXL

L WDEHOXO HL GH IXQF LRQDUH WDE  QH SURSXQHP V FRUHVSXQ] WRU vQ PDL PXOWH YDULDQWH
7DE 

7DEHOXO GH DGHY U DO IXQF LHL ;25

B 0 0 1 1

A 0 1 0 1

Y 0 1 1 0

a) Sinteza utiliznd mai multe tipuri de circuite logice elementare

3RUQLQG GH OD WDE  REVHUY P F IXQF LHL HVWH FHD H[SULPDW GH UHOD LD IRUPD FDQRQLF  )LLQG R GLVMXQFWLY GHMD )&' D PLQLPDO  IRUP

implementarea ei conduce la circuitul din fig. 4.2.

3URFHGkQG VLPLODU GDU XWLOL]kQG IRUPD FDQRQLF

Y = (A + B) A + B ,

FDUH vQ XUPD LPSOHPHQW ULL FRQGXFH OD FLUFXLWXO GLQ ILJ 

FRQMXQFWLY

)&& RE LQHP

(4.4)

A+B A B
A A+B B
)LJ  2 DOW YDULDQW GH LPSOHPHQWDUH D ;25

Y = (A + B) A + B

-ului

D F UHL LPSOHPHQWDUH SRDWH IL UHDOL]DW

din fig. 4.4.

+Vcc A

D F UHL LPSOHPHQWDUH SRDWH IL I FXW

fig. 4.5.
A Y

FLUFXLWH ORJLFH FRPELQD LRQDOH XWLOL]DWH vQ HOHFWURQLFD GLJLWDO 

 %% $" !   # " #    

E 6LQWH]D QXPDL FX SRU L 1$1' $SOLFkQG 'H 0RUJDQ DVXSUD )&' UHO  RE LQHP

93

Y = AB + AB = AB AB ,

( )( )

(4.5)
QXPDL FX 1$1' XUL L FRQGXFH OD FLUFXLWXO

Fig. 4.4. Implementarea XOR-ului numai cu NAND-uri

F 6LQWH]D QXPDL FX SRU L 125

ASOLFkQG 'H 0RUJDQ DVXSUD )&& UHO  RE LQHP

Y = (A + B) A + B = A + B + A + B ,

) (

QXPDL FX 125 XUL L FRQGXFH OD FLUFXLWXO GLQ

)(

(4.6) -

B Fig. 4.5. Implementarea XOR-ului numai cu NOR-uri

Q FHOH FH XUPHD]  QH SURSXQHP SUH]HQWDUHD VLQWH]HL FHORU PDL LPSRUWDQWH

94

Capitolul 4

4.2. Detectorul de paritate

'HWHFWRUXO GH SDULWDWH HVWH XQ FLUFXLW ORJLF FRPELQD LRQDO FDUH DU

e rolul de a

determina paritatea sau imparitatea

ORJLF (O DUH OD ED]

QXP UXOXL GH YDULDELOH GH LQWUDUH HJDOH FX 

XQHOH SURSULHW L DOH IXQF LHL 6$8-EXCLUSIV (XOR). Din motive legate de simplitatea expunerii, vom considera pentru nceput poarta XOR cu doX LQWU UL ILJ 

A B

Y = A B = AB + AB
)LJ  3RDUWD ORJLF ;25

'XS

FXP

VH SRDWH REVHUYD GLQ WDEHOXO GH DGHY U DO IXQF LHL ;25 GH  U LPSDU GH LQWU UL HVWH  ORJLF L  ORJLF

YDULDELOH WDE  OD LHLUHD FLUFXLWXOXL GLQ ILJ  VH RE LQH  ORJLF FkQG LQWU ULOH

sunt diferite (01 sau 10, deci un nuP

6SXQHP F

- cnd

LQWU ULOH FRLQFLG  VDX  GHFL XQ QXP U SDU GH LQWU UL HVWH ORJLF FLUFXLWXO ;25 FX GRX LQWU UL HVWH XQ GHWHFWRU GH SDULWDWH LPSDU 

sau, mai simplu, un detector de imparitate.

PrezeQW
XUPHD] P vQ FRQWLQXDUH FkWHYD SURSULHW L DOH IXQF LHL ORJLFH ;25 FDUH D IL IRORVLWH OD VLQWH]D GHWHFWRUXOXL GH LPSDULWDWH FX PDL PXOWH LQWU UL

Proprietatea nr. 1 DVRFLDWLYLWDWHD IXQF LHL ;25 Y = (A B) C = A (B C). (4.7) Demonstra LH Y = (A B) C = (AB + AB) C = (AB + AB )C + (AB + AB ) C = ... =
= ABC + AB C + ABC + ABC = A (BC + B C) + A (BC + BC) = A (B C) + A (B C) = A (B C) .
RULFDUH DU IL QXP UXO GH LQWU UL DO XQHL SRU L ;25 LHLUHD

Proprietatea nr. 2
<  GDF

XQ QXP U LPSDUSDU GH YDULDELOH GH LQWUDUH HVWH

egal cu 1): (4.8) (4.9)

1  ... 1 0  ... 0 = 0 ; 1 0 
 
 
nr. par de "1" nr. oarecare de "0"

1  ... 1 0   0 = 1 . 1 0 
 
...  
nr. impar de "1" nr. oarecare de "0"
'HPRQVWUD LD VH ED]HD] 3HQWUX R PDL EXQ HGLILFDUH DVXSUD DFHVWHL SURSULHW

SH WDEHOXO GH DGHY U DO IXQF LHL ;25 WDE  L SRW IL FRQVWUXLWH WDEHOXUL

GH DGHY U DOH IXQF LHL ;25 FX  L  YDULDELOH Y WDE 

Proprietatea nr. 3 comandat):

(utilizarea XOR-ului ca circuit inversor/neinversor (4.10) (4.11)

vQ ILJ  D L E FDUH FXPXODWH

,OXVWUDUHD UHOD LLORU  L  HVWH SUH]HQWDW

A 1 = A 1 + A 1 = A ; A 0 = A 0 + A 0 = A .

conduc la schema circuitului inversor / neinversor comandat din fig. 4.7 c.

< DX IRVW RE LQXWH SHQWUX FLUFXLW GRX

SH WRDWH F LOH LQWUDUH LHLUH IDSW FDUH IDFH V

7DE 

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0

0 1 1 0 1 0 0 1 0 1 1 0 1 0 0 1

0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0

0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0

0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0

2 3%%4 ' $8 !) 4 2 1 ( & 9 8 9 '7 64) 2 ' 5 3 ' 0) '

A 1 (a) Circuitul inversor A A 0

95

Y=A

(b) Circuitul neinversor

1 P= 0
)LJ  ,OXVWUDWLY

A Y= A

(c) Circuitul inversor / neinversor comandat

SHQWUX SURSULHW LOH IXQF LHL ;25

4.2.1. Detectorul de paritate LPSDU

FX  YDULDELOH GH LQWUDUH

3RUQLQG GH OD WDEHOXO GH DGHY U WDE  vQ FDUH YDORULOH ORJLFH GLQ FRORDQHOH LQkQG VHDPD GH SURSULHW YDULDQWH GH LPSOHPHQWDUH vQ ILJ  SUH]LQW GLVSDU DYDQWDMXO XQRU vQWkU]LHUL HJDOH FX Wpd SHULFROXO KD]DUGXOXL ORJLF LOH  L  DOH ;25 XOXL UH]XOW

Varianta prH]HQWDW -

7DEHOXO GH DGHY U DO GHWHFWRUXOXL GH LPSDULWDWH

Var. intrare

Y=[(A B) C] D

Y=(A B) (C D) YAB= A B YCD= C D Y= YAB YCD 0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0

YAB= A B

YABC= YAB C

Y= YABC D

96

Capitolul 4

+Vcc YAB YABC Y A B C D

+Vcc YAB Y YCD

A B C D

Fig. 4.8. Schema detectorului de SDULWDWH LPSDU - YDULDQWD 

Fig. 4.9. Schema detectorului de SDULWDWH LPSDU - varianta 2

4.2.2. Detectorul de paritate comandat

Q VLQWH]D GHWHFWRUXOXL HVWH QHFHVDU V VH LQ VHDPD GH XUP WRDUHOH FRQGL LL LPSDU  ILJ  vQ GHWHFWRU EDUH GH GH

1) Transformarea deteFWRUXOXL
SDULWDWH SDU  WUHEXLH UHDOL]DW FRPDQG  vQ PDQLHUD SUH]HQWDW

GH

SDULWDWH

SULQ VFKLPEDUHD YDORULL ORJLFH D XQHL VLQJXUH vQ ILJ  ILH 

2) Indiferent de regimul de "imparitate" sau "paritate" n care lucrHD]

GHWHFWRUXO LHLUHD DFHVWXLD WUHEXLH V ORJLF vQ PRPHQWXO GHWHF LHL 5H]XOW

WDE  (VWH GHFL QHFHVDU

pentru regimul de "imparitate", Y = Y , iar pentru regimul de "paritate", Y= Y (v.

XWLOL]DUHD SURSULHW LL  GH PDQLHUD GLQ ILJ 

+Vcc A B C D YAB Y YCD P Fig. 4.10. Schema detectorului de paritate comandat Y

ntr-DGHY

U

Y, pentru P = 0 (detector de imparitate); Y = Y P = Y, pentru P = 1 (detector de paritate).

3HQWUX FRQILUPDUHD DFHVWRU UH]XOWDWH SHQWUX 3 SUH]HQW P WDEHOXO GH DGHY U

(4.12)
 DO

detectorului de paULWDWH
HVWH DG XJDW

FRPDQGDW $FHVW WDEHO UHLD SUDFWLF GH GRX  L D GRXD RDU SULQ DSOLFDUHD UHOD LHL 

RUL SULPHOH   Q ILQDO

FRORDQH L XOWLPD GLQ WDE  R GDW FRORDQD < RE LQXW

SHQWUX 3

a detectorului de paritate o constituie controlul de 2 DSOLFD LH LPSRUWDQW paritate al transmisiunilor de date FDSDELO V GHWHFWH]H HURULOH GH WUDQVPLVLH L V
GHFODQH]H R SURFHGXU GH FRUHF LH D DFHVWRUD LQIRUPD L $VWIHO FRQVLGHUkQG F

FRPSXQH GLQ FXYLQWH D FkWH  EL L ILJ  ILHF UXL FXYkQW L VH DGDXJ

2 3%%4 ' $8 !) 4 2 1 ( & 9 8 9 '7 64) 2 ' 5 3 ' 0) '

7DE  7DEHOXO GH DGHY U DO GHWHFWR

97

rului de paritate comandat

D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Y 0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0 0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0

P 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Y 0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 1 0 1 0 0 1

a care se transmite prin magistrala de date se

OD HPLVLH (

98

Capitolul 4

un al 5-OHD ELW GH FRQWURO OD SDULWDWH IXUQL]DW GH F WUH XQ GHWHFWRU GH SDULWDWH FX  LQWU UL '3-I. n acest mod, pe celH  OLQLL GH WUDQVPLWHUH D LQIRUPD LHL YRP DYHD vQ
ILHFDUH PRPHQW FkWH XQ FXYkQW GH FRG IRUPDW GLQ  EL L vQ FRPSRQHQ D FXYkQWXOXL UHVSHFWLY H[LVWkQG vQWRWGHDXQD XQ QXP U SDU GH EL L HJDOL FX  ORJLF
0$*,675$/

E Mesaj A B C D Pa DP-I Mesaj A B C D Pb

Ya

Yb

Decizie

DP-II

Fig. 4.10. Detectarea erorilor de tUDQVPLVLH D LQIRUPD LLORU ELQDUH

/D UHFHSWRUXO 5 H[LVW XQ DOW GHWHFWRU GH SDULWDWH FX  LQWU UL '3 ,, OD LHLUHD

F UXLD VH YD RE LQH  ORJLF vQ FD]XO vQ FDUH WUDQVPLVLD GH GDWH D IRVW FRUHFW SDU GH  ORJLF SH FHOH  OLQLL L  ORJLF GDF DFHVW GLQ XUP

QXP U

DFHDVWD D IRVW SHUWXUEDW  (YLGHQW vQ D LQIRUPD LHL

FD] VH LD GHFL]LD EORF ULL H[HFX LHL L D FRUHF LHL HURULL DS UXWH SULQ

PHWRGH VSHFLILFH FXP DU IL WUDQVPLWHUHD UHSHWDW

4.3. Multiplexoare
Multiplexoarele (MUX-urile) sunt circuite loJLFH FRPELQD LRQDOH trecerea datelor de la una din cele n LQWU UL VSUH LHLUHD XQLF  ILJ 
A0 A1
. . .

FDUH SHUPLW

Ap-1

I0 I1
. . . . . .

08;

In-1
)LJ  6FKHPD EORF JHQHUDO D XQXL PXOWLSOH[RU

FRG DGUHV  DYkQG 6H REVHUY FRPELQD LLORU

VXFFHVLY DO LQWU ULORU F WUH LHLUH

n cazul MUX-XOXL FX Q p=2 (A0, A1).

LPSOHPHQW P vQ ILJ 
7DE 

XQXL 08; FX  LQWU UL WDE  VFULHP IRUPD FDQRQLF

2 3%%4 ' $8 !) 4 2 1 ( & 9 8 9 '7 64) 2 ' 5 3 ' 0) '

6HOHF LD LQWU ULL FDUH XUPHD] D DYHD DFFHV OD LHLUH VH IDFH SULQWU QXP UXO F URU GH LQWU UL XUPHD] HVWH V HJDO

99

-un cuvnt de
FX QXP UXO DFFHVXO

p EL L
F Q GH   DGUHV

DGLF D

ORJLFH

DSDUL LH

DXWRUL]H]H

4.3.1. Circuitul de multiplexaUH FX  LQWU

 LQWU UL ,0

UL
UXO EDUHORU GH DGUHV HVWH

, I1, I2, I3 QXP

3RUQLQG GH OD GHILQL LD PXOWLSOH[RUXOXL FRQVWUXLP WDEHOXO GH IXQF LRQDUH DO GLVMXQFWLY  UHO  L R

7DEHOXO GH IXQF LRQDUH DO XQXL 08; FX  LQWU UL

E 1 0 0 0 0
A0

A1 x 0 0 1 1

A0 x 0 1 0 1
A1
A0

I0 x I0 x x x

I1 x x I1 x x
E

I2 x x x I2 x

I3 x x x x I3
+Vcc

Y 0 I0 I1 I2 I3

A1

I0

I1

I2

I3

Fig. 4.12. MUX-XO FX  LQWU

UL

100

Capitolul 4

Y = E (A1A 0 I 0 + A1A 0 I1 + A1A 0 I 2 + A1A 0 I3 ).





P0 P1
F VFKHPD vQ VWDUHD / 

(4.13)
FX R LQWUDUH GH DXWRUL]DUH

P2
HVWH 3HQWUX

P3
SUHY ]XW L

E ENABLE

LQWU ULORU L EDUHORU GH DGUHV  LHLUHD VH IL[HD]

2EVHUY P

DFWLY

E = 1 , indiferent de sW ULOH ORJLFH DOH vQ  ORJLF L 08;-ul este inactivat.

4.4. Demultiplexoare
WUDQVPLWHUHD GDWHORU GH OD R LQWUDUH XQLF  OD XQD GLQ FHOH P LHLUL VHOHFWDWH SULQWU FXYkQW GH FRG DGUHV  6FKHPD EORF D XQXL '08; FX P LHLUL L S EDUH GH DGUHV SUH]HQWDW vQ ILJ  P 

Circuitele de demultiplexare (DMUX-urile) sunt c.l.c. care permit -un

p

) este

A0 A1

. . . . . .

Ap-1

DMUX

Y0 Y1
. . . . . .

Ym-1
)LJ  6FKHPD EORF JHQHUDO D XQXL '08;

4.4.1. Circuitul de demultiplexare cX  LHLUL

&LUFXLWXO GH GHPXOWLSOH[DUH FX P DGUHV $0  LHLUL <0

,Y1, Y2, Y3), are p=2 bare de

,A1).
7DE  7DEHOXO GH IXQF LRQDUH DO XQXL '08; FX  LHLUL

A1 0 0 1 1

A0 0 1 0 1

I I I I I

Y0 I 0 0 0

Y1 0 I 0 0

Y2 0 0 I 0

Y3 0 0 0 I

IXQF LLOH GH LHLUH

L VH RE LQH YDULDQWD GH LPSOHPHQWDUH GLQ ILJ 

D GRX

G H%%I B $S !D I G F C A T S T BR QID G B P H B ED B

Y0 = I A1 A 0 , Y1 = I A1A 0 , Y2 = I A1 A 0 , Y3 = I A1 A 0 ,
A1 A0 +Vcc I Y0 Y1 Y2 Y3 Fig. 4.14. DMUX-XO FX  LHLUL

101

Pornind dH OD WDEHOXO GH IXQF LRQDUH DO XQXL DVWIHO GH FLUFXLW WDE  VH VFULX (4.14)

4.5. Comparatoare numerice

Comparatoarele numerice sunt c.l.c. care permit determinarea valorii relative
QXPHUH H[SULPDWH vQ FRG ELQDU 6FKHPD EORF D XQXL FRPSDUDWRU GH Q EL L HVWH SUH]HQWDW vQ ILJ 

A0 A1
. . . . . .

A<B
&203$5$725

An-1 B0 B1
. . .

A=B A>B

. . .

Bn-1 Fig. 4.15. Schema bloc a XQXL FRPSDUDWRU GH Q EL L

102

Capitolul 4

4.5.1. Comparatorul numeric de un bit

&RPSDUDWRUXO QXPHULF GH XQ ELW SUH]LQW VFKHPD EORF GLQ ILJ 

Ak < Bk Ak
&203$5$725

Ak = Bk Ak > Bk

fik (Ak inferior lui Bk) fek (Ak egal cu Bk) fsk (Ak superior lui Bk)

Bk

Fig. 4.16. Schema bloc a comparatorului de 1 bit

&RPSDUDUHD FHORU GRX QXPHUH GH FkWH XQ ELW ILHFDUH SHUPLWH

definirea

XUP WRDUHORU IXQF LL Y WDE 

IXQF LD GH LQIHULRULWDWH

f i k = A k Bk

 FDUH LD YDORDUHD ORJLF

 QXPDL FkQG

Ak<Bk DGLF DWXQFL FkQG $k  L %k=1; - IXQF LD GH HJDOLWDWH f e k = A k B k

 FDUH LD YDORDUHD ORJLF

 QXPDL F

nd

Ak=Bk DGLF ILH $k=Bk=0, fie Ak=Bk=1 logic; - IXQF LD GH VXSHULRULWDWH f s k = A k B k  Ak>Bk.

FDUH LD YDORDUHD ORJLF

 QXPDL FkQG

A k B k = 1 pentru A k < B k ; Sintetic, putem scrie: A k B k = 1 pentru A k = B k ; A B = 1 pentru A > B , k k k k

UHOD LL FDUH QH DMXW V FRQVWUXLP WDEHOXO GH IXQF LRQ

(4.15)

are al comparatorului de 1 bit,

tab. 4.7.
Tab. 4.7
7DEHOXO GH IXQF LRQDUH DO FRPSDUDWRUXOXL GH  ELW

fik Ak 0 0 1 1 Bk 0 1 0 1

fek

fsk

Ak Bk
0 1 0 0 Ak<Bk

Ak

Bk

Ak B k
0 0 1 0 Ak>Bk

1 0 0 1 Ak=Bk

3RUQLQG GH OD WDEHOXO GH IXQF LRQDUH WDE  vQ FDUH FRORDQHOH   L  UHSUH]LQW LHLULOH FRPSDUDWRUXOXL GH  ELW SHQWUX FHOH  VLWXD LL SRVLELOH UH]XOWDWH vQ XUPD FRPSDU ULL VH RE LQH YDULDQWD GH LPSOHPHQWDUH GLQ ILJ 

avea A<B este necesar ca: sau A3 < B3, sau A3 = B3 L $2 < B2, sau A3 = B3 L $2 = B2 L $1 < B1, sau A3 = B3 L $2 = B2 L $1 = B1 L $0 < B0.
5H]XOW IXQF LD

G H%%I B $S !D I G F C A T S T BR QID G B P H B ED B

+Vcc fik Ak Bk fek fsk
)LJ  6FKHPD ORJLF D FRPSDUDWRUXOXL GH  ELW

103

 &RPSDUDWRUXO QXPHULF GH  EL L

6H SRDWH RE LQH SULQ LQWHUFRQHFWDUHD D SDWUX FRPSDUDWRDUH GH XQ ELW &HOH GRX QXPHUH GH FkWH  EL L ILHFDUH VH SRW VFULH DVWIHO

3URFHVXO FRPSDU ULL vQFHSH FX EL LL FHL PDL VHPQLILFDWLYL $VWIHO SHQWUX D

A = 23A3+22A2+21A1+20A0 ; B = 23B3+22B2+21B1+20B0.

Fi = fi3 +fe3fi2+fe3fe2fi1+fe3fe2fe1fi0. Pentru A = B ete necesar ca: A3 = B3 L $2 = B2 L $1 = B1 L $0 = B0.

5H]XOW IXQF LD

(4.16)

Fe = fe3fe2fe1fe0. Pentru A > B este necesar ca: sau A3 > B3, sau A3 = B3 L $2 > B2, sau A3 = B3 L $2 = B2 L $1 > B1, sau A3 = B3 L $2 = B2 L $1 = B1 L $0 > B0.
5H]XOW IXQF LD QWUXFkW UHOD LLOH   L  QX SRW IL DGHY UDWH VLPXOWD RULFDUH GLQ FHOH  UHOD LL HVWH DGHY UDW GDF FHOHODOWH GRX

(4.17)

Fs = fs3+fe3fs2+fe3fe2fs1+fe3fe2fe1fs0.

(4.18) n, se poate scrie (4.19)

VXQW IDOVH

Fi = Fe Fs;

104

Capitolul 4

Fe = Fi Fs;

(4.20) (4.21)
RE LQHUHD D GRX GLQ UHOD LLOH   L , GLQWU XQD GLQ UHOD LLOH

Fs = Fi Fe . PriQ XUPDUH WHRUHWLF HVWH VXILFLHQW

 D WUHLD UH]XOWkQG FX QXPDL GRX

LQYHVRDUH L R SRDUW

  VDX  3UDFWLF VH LPSOHPHQWHD]

WRDWH UHOD LLOH   L 

pentUX D QX DS
fi3 fe3 fi2 fe3 fe2 fi1 fe3 fe2 fe1 fi0 fe3 fe2 fe1 fi0 Fi'

UHD GLIHUHQ H GH WLPSL GH SURSDJDUH

Fi A<B Fi Fe Fi' Fs'' a)

)LJ 

fe3 fe2 fe1 fi0 Fe' b)b b)

Fe A=B

Fs A>B

c)
6FKHPHOH ORJLFH VLPSOLILFDWH DOH IXQF LLORU GH LHLUH DOH FRPSDUDWRUXOXL GH  EL L

n fig. 4.18 este pre]HQWDW

FX REVHUYD LD F

LPSOHPHQWDUHD IXQF LLORU )L ILJ  D L )H ILJ  E

FLUFXLWXO FRUHVSXQ] WRU OXL )V SRDWH IL UHDOL]DW GH PDQLHUD GLQ ILJ D

HYLGHQW FX DOWH P ULPL GH LQWUDUH VDX GH PDQLHUD GLQ ILJ  F Y UHOD LD 

Fi, FH

)V

VXQW

LQWU UL

GH

H[WHQVLH

OD

FDUH

VH

FRQHFWHD]

LHLULOH

FRPSDUDWRUXOXL GH  EL L GH UDQJ LQIHULRU 9DULDQWD LQWHJUDW D FRPSDUDWRUXOXL QXPHULF GH  EL L HVWH FLUFXLWXO LQWHJUDW

SN 7485, fig. 4.19.

A0 A1 A2 A3 +Vcc 10 12 13 15 16 3 I A=B 2 IA<B IA>B 8 GND
61

B0 B1 B2 B3 9 11 14 1 6 A=B


Fe1 Fi1 Fs1

7 A<B 5 A>B

Fig. 4.19. Schema comparatorului inWHJUDW GH  EL L

QXPHULF GH  EL L ILJ 

n fig. 4. L  SXWHP REVHUYD PRGXO vQ FDUH VXQW FRQHFWDWH LQWU provin de la rangul inferior al comparatorului numeric integrat SN 7485.
$VWIHO LQWUDUHD FRUHVSXQ] WRDUH IXQF LHL GH HJDOLWDWH $ H[LVW

+VCC (1 logic), simulndu-se astfel

Y WDE  6LPLODU LQWU ULOH

VXSHULRULWDWH $!% VXQW FRQHFWDWH OD PDV  VLPXOkQG DEVHQ D RULF UHL LQHJDOLW

provenite de la rangul inferior.

6XPDWRDUHOH VXQW VXEVLVWHPH ORJLFH FRPELQD LRQDOH FDUH DVLJXU - direct sau indirect - HIHFWXDUHD WXWXURU RSHUD LLORU DULWPHWLFH GLQWU-un sistem de calcul.

G H%%I B $S !D I G F C A T S T BR QID G B P H B ED B

 &RPSDUDWRUXO QXPHULF GH  EL L
&RQHFWkQG vQ FDVFDG GRX

105

FRPSDUDWRDUH 61  RE LQHP XQ FRPSDUDWRU

A0 A1 A2 A3

B0 B1 B2 B3

A4 A5 A6 A7

B4 B5 B6 B7

+Vcc 10 12 13 15 9 11 14 1 16 6 3 A=B I 7 2 A=B A<B I 5 4 A<B SN 7485 A>B I 8 A>B GND

&203 

+Vcc 10 12 13 15 9 11 14 1 16 6 Fe2 A=B Fe1 Fe1 3 IA=B 7 Fi2 Fi1 Fi1 2 COMP. 2 A<B IA<B Fs1 Fs1 4 SN 7485 5 Fs2 IA>B A>B 8 GND

)LJ 

6FKHPD XQXL FRPSDUDWRU GH  EL L VLQWHWL]DW FX  [ 61 

ULOH FDUH OD

% VH FRQHFWHD]

HJDOLWDWHD EL LORU GH UDQJ LQIHULRU FDUH GH IDSW QX IXQF LLORU GH LQIHULRULWDWH $% L L

FRUHVSXQ] WRDUH

4.6. Sumatoare

A0 A1
. . . . . . . . .

S0 S1
680$725

An-1 B0 B1
. . . . . .

. . .

Sn-1 Cn-1

Bn-1
)LJ  6FKHPD EORF JHQHUDO D XQXL VXPDWRU

106

Capitolul 4

SchemD EORF D XQXL VXPDWRU GH  QXPHUH ELQDUH D FkWH Q EL L HVWH SUH]HQWDW n fig. 4.21, unde s-au notat cu Si , i=0,1, ..., n- EL LL FRUHVSXQ] WRUL VXPHL LDU FX &i
WUDQVSRUWXO F WUH UDQJXO XUP WRU

4.6.1. Semisumatorul
6HPLVXPDWRUXO UHDOL]HD] VXPD D GRX QXPHUH ELQDUH GH FkWH  ELW I U D LQH VHDPD GH WUDQVSRUWXO GH OD ELWXO LPHGLDW LQIHULRU FD VHPQLILFD LH 3RUQLQG GH OD WDEHOXO GH DGHY U DO XQXL VHPLVXPDWRU GH  ELW WDE  VH RE LQ UHOD LLOH GH FDOFXO  L  D VDX OD QLYHO GH VFKHP
7DE 

D F URU LPSOHPHQWDUH FRQGXF

e la schema din fig. 4.22

EORF ILJ  E

7DEHOXO GH DGHY U DO VHPLVXPDWRUXOXL GH  ELW

Ai 0 0 1 1

Bi 0 1 0 1

Rezultatul
DGXQ ULL

00 01 01 10

Suma (Si) 0 1 1 0

Transport (Ci) 0 0 0 1
( 4.22) (4.23) Ai Bi

Si = A i Bi ; Ci = Ai Bi . +Vc Ai Bi Si 1/2 Ci Ci S i
D VFKHPD ORJLF

b) schema bloc

Fig. 4.22. Semisumatorul de 1 bit

4.6.2. Sumatorul complet de 1 bit

L WUDQVSRUWXO &i-1

Spre deosebire de semisumator, sumatorul complet de 1 bLW LD vQ FRQVLGHUD LH de la bitul imediat inferior, conform schemei bloc din fig. 4.23.

LQWU UL

UHOD LH FDUH VH SRDWH RE LQH L GLUHFW GLQ WDE  VFULLQG 6iFCD 'LQ DFHODL WDEHO VH SRDWH GHGXFH L &i

VH RE LQH LDU GXS

REVHUY P F

G H%%I B $S !D I G F C A T S T BR QID G B P H B ED B

Ai Bi Ci-1
6

107

Ci S i Fig. 4.23. Schema bloc a sumatorului complet de 1 bit

7DEHOXO GH IXQF LRQDUH DO VXPDWRUXOXL FRPSOHW GH  ELW HVWH WDE 

Tab. 4.9

7DEHOXO GH IXQF LRQDUH DO VXPDWRUXOXL FRPSOHW GH  ELW

,QWU

UL

Ai 0 0 0 0 1 1 1 1

Bi 0 0 1 1 0 0 1 1

Ci-1 0 1 0 1 0 1 0 1

Suma 00 01 01 10 01 10 10 11

,HLUL

Si 0 1 1 0 1 0 0 1

Ci 0 0 0 1 0 1 1 1

&D L vQ FD]XO VHPLVXPDWRUXOXL LHLUHD 6i

este suma modulo 2 a celor 3 (4.24) . (4.25)

S i = A i B i C i 1 =

= A i Bi C i 1 + A i B i Ci 1 + A i Bi Ci 1 + A i B i C i 1 ,
:

C i = A i B i C i 1 + A i Bi C i 1 + A i B i C i 1 + A i B i C i 1 .

*UXSkQG VXFFHVLY ILHFDUH GLQ SULPLL WUHL WHUPHQL DL UHOD LHL  FX XOWLPXO

Ci = BiCi-1 + AiCi-1 + AiBi,

(4.26) (4.27) (4.28)

QHJDUHD UHOD LHL  L DSOLFDUHD OXL 'H 0RUJDQ YRP DYHD

Ci = A i Bi + A i Ci 1 + Bi Ci 1 . Notnd primii trei termeni din Si cu Di: D i = A i Bi C i 1 + A i B i Ci 1 + A i Bi Ci 1 ,

DFHWLD VH SRW RE LQH GLQ SURGXVXO ORJLF DO OXL

Ci cu (Ai + Bi + Ci-1):

108

Capitolul 4

Di = (Ai + Bi + Ci-1) Ci . ntr-DGHY

5H]XOW U LQWURGXFkQG

(4.29)

Ci GLQ

UHOD LD  vQ  L HIHFWXkQG RSHUD LLOH VH

RE LQH H[SUHVLD  F 6i se poate scrie: S i = D i + A i B i C i 1 =

= A i Ci + B i Ci + C i 1 Ci + A i B i C i 1 . ImpOHPHQWDUHD UHOD LLORU  L  FRQGXFH complet de 1 bit, fig. 4.24.
Ai Bi Ci-1 Ci +Vcc

(4.30)
OD VLQWH]D VFKHPHL VXPDWRUXOXL

Si

Ci
Ci

)LJ 

6FKHPD ORJLF

D VXPDWRUXOXL FRPSOHW GH  ELW

 6XPDWRUXO FRPSOHW GH  EL L

6H RE LQH SULQ LQWHUFRQHFWDUHD D  VXPDWRDUH FRPSOHWH GH  ELW DD FXP HVWH

ilustrat n fig. 4.25. ntruct implementarea unui astfel de sumator cu ajutorul

FLUFXLWHORU ORJLFH HOHPHQWDUH HVWH GHRVHELW GH ODERULRDV  YRP XWLOL]D SHQWUX LOXVWUDUH VXPDWRUXO FRPSOHW GH  EL L LQWHJUDW &'%  D F UXL VFKHP FHD SUH]HQWDW vQ ILJ  EORF HVWH LGHQWLF FX

transformarea unui cod binar n altul.

6FKHPD EORF D XQXL FRQYHUWRU GH Q  P EL L HVWH SUH]HQWDW vQ ILJ 

RE LQH GLQ ILJ  SHQWUX Q

*UD\ VH RE LQH GLQ FRGXO ELQDU QDWXUDO DVWIHO

a b%%c V $g !X c a ` W U h g h Vf ecX a V d b V YX V

+Vcc 5 14 A3 B3 1
6

109

A2 B2 3 C2
6

16

A1 B1 08 7 4 CDB483 C1
6

A0 B 010 11 C0 13 C-1 9 S0 12

C3

15 S3
)LJ 

2 S2

6 S1

6FKHPD EORF D VXPDWRUXOXL FRPSOHW GH  EL L

4.7. Convertoare de cod

&RQYHUWRDUHOH GH FRG VXQW FLUFXLWH ORJLFH FRPELQD LRQDOH FDUH SHUPLW

I0 Cod binar I1
LQL LDO
. . . . . .

Convertor de cod
LQL LDO

. . .

In-1
)LJ 

O0 O1 Cod binar final Om-1

. . .

6FKHPD EORF JHQHUDO

D XQXL FRQYHUWRU GH FRG

4.7.1. Convertorul de cod binar natural Gray

Schema bloc a unui coQYHUWRU
P SH  EL L GLQ

cod binar natural n cod Gray se

vQ ILJ 

 L HVWH SUH]HQWDW

B0 Cod binar B1 natural B2 B3

G0

Convertor de cod

G1 Cod binar reflectat G2 (Gray) G3

Fig. 4.27. Schema bloc a convertorului de cod "binar natural - Gray"

'XS FXP UH]XOW L GLQ WDEHOXO GH DGHY U WDE 

10, codul binar reflectat

GLQ  vQ  ORFD LL

G0 - UHSHW

SULPHOH  ORFD LL DOH OXL %0 GXS

FDUH VH UHIOHFW

110

Capitolul 4

G1 - UHSHW G2 - repeW G3 - UHSHW

7DE 

SULPHOH  ORFD LL DOH OXL %1 GXS SULPHOH  ORFD LL DOH OXL %2 GXS %3

FDUH VH UHIOHFW FDUH VH UHIOHFW

GLQ  vQ  ORFD LL GLQ  vQ  ORFD LL

.
ELQDU QDWXUDO

7DEHOXO GH DGHY U DO FRQYHUWRUXOXL GH FRG

- Gray"

B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

Binar natural B2 B1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1

Gray B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 G3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 G2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 G1 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 G0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0

Pornind de la tab. 4. DOF 4.28.

B1B0 B3B2
00 01 11 10 00 01 11

WXLP GLDJUDPHOH 9. SHQWUX * 3

, G2, G1 L *0, fig.

B1B0
10

B3B2
00 01

00

01

11

10

1 1 (a)

1 1

1 1

1 1

11 10

G3 = B3

(b)

G 2 = B2 B3 + B2 B3 = B2 B3

)LJ 

'LDJUDPHOH 9. FRUHVSXQ] WRDUH IXQF LLORU GH LHLUH DOH FRQYHUWRUXOXL

D F URU LPSOHPHQWDUH FRQGXFH OD VFKHPD GLQ ILJ 

SUH]HQWDW

a b%%c V $g !X c a ` W U h g h Vf ecX a V d b V YX V

B1B0 B3B2
00 01 11 10 00 01 11 10

111

B1B0 B3B2 1 1
00 01 11 00 01 11 10

1 1 1 1

1 1 1 1

1 1

1 1 1 1

10

G1 = B1B2 + B1B2
(c)

G 0 = B1 B 0 + B1 B0
(d)

= B1 B2

= B 0 B1

Fig. 4.28. Diagramele VK coreVSXQ]

'XS

WRDUH IXQF LLORU GH LHLUH DOH FRQYHUWRUXOXL FRQWLQXDUH

G 3 = B3; G 2 = B2 B3; G1 = B1 B2 ; G 0 = B0 B1,

+ Vcc B3 B2 B1 B0 G3 G2 G1 G0

PLQLPL]DUH RE LQHP XUP WRDUHOH H[SUHVLL

(4.31)

)LJ 

6FKHPD ORJLF

PLQLPDO

a convertorului de cod "binar natural - Gray"

4.7.2. Convertorul de cod "Gray - binar natural"

Schema bloc a unui convertor din cod Gray n cod binar natural este
vQ ILJ  LDU WDEHOXO GH DGHY U HVWH WDE 

G0 Cod binar G1 reflectat G2 (Gray) G3

Convertor de cod

B0 B1 Cod binar B2 natural B3

Fig. 4.30. Schema bloc a convertorului de cod "Gray - binar natural"

112

Capitolul 4

7DE 

7DEHOXO GH DGHY U DO FRQYHUWRUXOXL GH FRG

*UD\

- binar natural"

G3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

Cod Gray G2 G1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1

G0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

Cod binar natural B2 B1 0 0 0 0 0 1 0 1 1 1 1 1 1 0 1 0 1 1 1 1 1 0 1 0 0 0 0 0 0 1 0 1

B0 0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0

OD XUP WRUXO DUWILFLX FXQRVFXW ILLQG IDSWXO F UHOD LLORU  XUP WRDUHOH VXPH PRGXOR 

ntruct aplicarea procedeului de la 4.7.1 este destul de laborLRDV  DSHO P A A B = B  FDOFXO P FX DMXWRUXO

G 2 G 3 , G1 G 2 G 3 , G 0 G1 G 2 G 3 .
2E LQHP

(4.32)

G 3 = B3 ; G 2 G 3 = B2 B3 B3 ;  

0

B3 = G 3 ; B2 = G 2 G 3 ; B1 = G1 G 2 G 3 ;

G1 G 2 G 3 = B1 B2 B2 B3 B3 ;  
  

0 0

(4.33)

G 0 G1 G 2 G 3 = B0 B1 B1 B2 B2 B3 B3 ;  
  
  

0 0 0

B0 = G 0 G1 G 2 G 3 .

ImplementaUHD

UHOD LLORU  FRQGXFH OD VFKHPD ORJLF

D FRQYHUWRUXOXL GH FRG

"Gray - binar natural din fig. 4.31.

DGUHV  FRQVWLWXLQG GH IDSW VXEVLVWHPH DOH XQRU FLUFXLWH LQWHJUDWH SH VFDU 06, VDX ODUJ

atunci cnd numai una din cele n LQWU

7DE 

a b%%c V $g !X c a ` W U h g h Vf ecX a V d b V YX V

+Vcc G3 G2 G1 G0 B3 B2 B1 B0
)LJ  6FKHPD ORJLF D FRQYHUWRUXOXL GH FRG *UD\

113

- binar natural"

4.8. Codificatoare
Codificatoarele sunt circuite lRJLFH
FRPELQD LRQDOH FX

LQWU UL L

LHLUL GH PHGLH

/6, FXP DU IL FRQYHUWRDUHOH GH FRG FLUFXLWHOH 520 3/$ HWF vQ ILJ 

Schema bloc a unui codificator este pUH]HQWDW

I1 I2 .
. .

A0 A2
. . .
&'

. . .

. . .

In
)LJ  6FKHPD EORF JHQHUDO

Am-1
D XQXL FRGLILFDWRU

 &RGLILFDWRUXO GH DGUHV

&RGLILFDWRUXO GH DGUHV

VLPSOX
OD LHLUH XQ FXYkQW ELQDU GH

VLPSOX IXUQL]HD]

EL L

UL DOH VDOH HVWH DFWLYDW 

7DEHOXO GH DGHY U DO FRGLILFDWRUXOXL GH DGUHV

,175

5,

I1 1 0 0 0 0 0 0

I2 0 1 0 0 0 0 0

I3 0 0 1 0 0 0 0

I4 0 0 0 1 0 0 0

I5 0 0 0 0 1 0 0

I6 0 0 0 0 0 1 0

I7 0 0 0 0 0 0 1

A2 0 0 0 1 1 1 1

ADRESE A1 0 1 1 0 0 1 1

A0 1 0 1 0 1 0 1

114
5H]XOW F QXP UXO FXYLQWHORU IXUQL]DWH OD LHLUH HVWH

Capitolul 4

n=2m-1
 EL

L HVWH HJDO FX

QXP UXO LQWU ULORU 3HQWUX H[HPSOLILFDUH QH SURSXQHP V DGUHV FX Q  LQWU UL GHFL FXYkQWXO GH DGUHV UHDOL] P VLQWH]D XQXL FRGLILFDWRU GH YD IL IRUPDW GLQ P

i.

3RUQLQG GH OD WDEHOXO GH DGHY U WDE  VH GHGXF H[SUHVLLOH IXQF LLORU GH LHLUH UHO   L  L VH RE LQH YDULDQWD GH LPSOHPHQWDUH GLQ ILJ 

A0 = I1 + I3 + I5 + I7 ; A1 = I2 + I3 + I6 + I7 ; A2 = I4 + I5 + I6 + I7 .
I1 I2 I3 I4 I5 I6 I7 +Vcc

(4.34) (4.35) (4.36)

A0

A1

A2

)LJ 

6FKHPD ORJLF

D FRGLILFDWRUXOXL GH DGUHV

2EVHUYD LH HVWH LQWHU]LV

DFWLYDUHD VLPXOWDQ

D PDL PXOWRU OLQLL GH LQWUDUH

deoarece se pot crea confuzii. De exempOX DFWLYDUHD VLPXOWDQ D OLQLLORU ,1 L ,2 JHQHUHD] FXYkQWXO GH FRG $2=0, A1=1, A0=1 (011) care corespunde de fapt, ntr-o IXQF LRQDUH QRUPDO  DFWLY ULL OXL ,3. n cazul n care nu se poate evita activarea VLPXOWDQ D PDL PXOWRU LQWU UL VH IRORVHVF FLUcuite de codificare (codare) prioritare.
I1 I2 I3 I4 I5 I6 I7

+Vcc

A0

A1

A2

)LJ 

2 DOW

YDULDQW

GH LPSOHPHQWDUH D FRGLILFDWRUXOXL GH DGUHV

SRDWH RE LQH DSOLFkQG UHOD LLORU   L  SULQFLSLXO GXEOHL QHJD LL L XQD GLQ UHOD LLOH OXL 'H 0RUJDQ

UHDOL]DWH vQ WHKQRORJLH 06, FDUH DFWLYHD]

cuvntul de cod aplicat la intrare (m=2n). Schema bloc a unui decodifLFDWRU HVWH SUH]HQWDW
A0 A1 .
. . . . .
'&'

ELQDU HVWH DSOLFDW HVWH SUH]HQWDW

LHLUH L YDULDQWD GH LPSOHPHQWDUH GLQ ILJ 

a b%%c V $g !X c a ` W U h g h Vf ecX a V d b V YX V

2 DOW YDULDQW GH LPSOHPHQWDUH D &' FX  LQWU UL L  LHLUL GH DGUHV

115
VH

A 0 = I 1 + I 3 + I 5 + I 7 = I1 I 3 I 5 I 7

(4.37) (4.38) (4.39)

A1 = I 2 + I 3 + I 6 + I 7 = I 2 I 3 I 6 I 7 A 2 = I 4 + I5 + I 6 + I 7 = I 4 I5 I6 I7
6H RE LQH VFKHPD SUH]HQWDW vQ ILJ 

4.9. Decodificatoare
'HFRGLILFDWRDUHOH VXQW FLUFXLWH ORJLFH FRPELQD LRQDOH FX Q LQWU UL L P LHLUL XQD VDX PDL PXOWH LHLUL vQ IXQF LH GH vQ ILJ 

. . .

Y0 Y1 .
. .

An-1
)LJ  6FKHPD EORF JHQHUDO

Ym-1
D XQXL GHFRGLILFDWRU

 'HFRGLILFDWRUXO GH DGUHV

'HFRGLILFDWRUXO GH DGUHV OD LQWU UL FX Q  LQWU UL L P  DFWLYHD] OLQLD GH LHLUH D F UHL DGUHV FRGLILFDW

6FKHPD EORF D XQXL GHFRGLILFDWRU GH DGUHV vQ ILJ 

 LHLUL

A0
'&'

Y0 Y1 Y2 Y3

A1

)LJ 

6FKHPD EORF D XQXL GHFRGLILFDWRU FX  LQWU UL L  LHLUL

'LQ WDEHOXO GH DGHY U WDE  VH RE LQ H[SUHVLLOH  DOH IXQF LLORU GH

116
7DE  7DEHOXO GH DGHY U DO GHFRGLILFDWRUXOXL FX  LQWU UL L  LHLUL

Capitolul 4

A1 0 0 1 1

A0 0 1 0 1

Y0 1 0 0 0

Y1 0 1 0 0

Y2 0 0 1 0

Y3 0 0 0 1 (4.40)

Y0 = A1A 0 ; Y1 = A1A 0 ; Y2 = A1A 0 ; Y3 = A1A 0

A1 A0 +Vcc

Y0 Y1 Y2 Y3

)LJ 

6FKHPD ORJLF

D GHFRGLILFDWRUXOXL FX  LQWU UL L  LHLUL

4.9.2. Decodificatorul BCD-zecimal

3UHVFXUWDUHD %&' VHPQLILF vQ OLPED URPkQ ]HFLPDO FRGDW ELQDU  vQ ILJ 

Schema bloc a unui decodificator BCD-]HFLPDO HVWH SUH]HQWDW

A0 A1 A2 A3 Y0 Y1
. . . . . .

'&'

Y9

Fig. 4.38. Schema bloc a decodificatorului BCD - zecimal

6SUH GHRVHELUH GH FRGXO ELQDU QDWXUDO %&' QX LQFOXGH FRPELQD LLOH ELQDUH       FRPELQD LL      L 

ce corespund numerelor zecimale

vQ VWDUHD

HVWH SUH]HQWDW

u v%%w p $ !r w u t q i p ywr u p x v p sr p

  6H VSXQH F GHFRGLILFDWRUXO UHMHFWHD] GDWHOH IDOVH LQWHJUDW )XQF LRQDUHD GHFRGLILFDWRUXOXL GLQ ILJ  vQ YDULDQW vQ WDE 
7DEHOXO GH DGHY U DO GHFRGLILFDWRUXOXL %&' 7DE 

117

$SDUL LD RULF UHLD GLQ FHOH  FRPELQD LL GH LQWUDUH H[FOXVH GXFH WRDWH LHLULOH

- CDB 442)

- zecimal
Y6 Y7 Y8 Y9

A3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Y0

Y1

Y2

Y3

Y4

Y5

0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1

4.9.3. Decodificatorul BCD - 7 segmente

Decodificatorul BCD -  VHJPHQWH SUH]LQW
A0 A1 A2 A3
VFKHPD EORF GLQ ILJ 

DCD BCD - 7 sgm

.... ....

Fig. 4.39. Schema bloc a unui decodificator BCD - 7 segmente

118
DFFHSW XQ FRG GH LQWUDUH %&' L SURGXFH LHLULOH DGHFYDWH SHQWUX

Capitolul 4
VHOHFWDUHD

segmentelor unui digit cu 7 segmente utilizat pentru reprezentarea numerelor zecimale 0, 1, .., 9. 'DF FHOH  LHLUL DOH GHFRdificatorului sunt active n stare sus, ele se
QRWHD] FX D E  J L YRU FRPDQGD XQ GLVSOD\ FX  VHJPHQWH ILJ  D vQ FDUH vQ FRQH[LXQH

LED-XULOH VH DIO
'DF

catod comun (KC), fig. 4.40 b.

FX UXL /(' XUL VH DIO

LHLULOH GHFRGLILFDWRUXOXL VXQW DFWLYH vQ VWDUH MRV HOH VH QRWHD]

a , b,..., g L YRU FRPDQGD XQ GLJLW DOH F (AC), fig. 4.40 c.

vPSUHXQ

vQ FRQH[LXQH

anod comun

(VWH XRU GH vQ HOHV IDSWXO F  vQ FRQGL LLOH vQ FDUH /(' XULOH DX FDWR]LL OHJD L

.& L FRQHFWD L OD PDV  VLQJXUXO SRWHQ LDO FDUH DSOLFkQGX

-se pe anozi,

poate deschide LED-urile, este +VCC, deci 1 logic.

8Q UD LRQDPHQW VLPLODU SRDWH IL I FXW SHQWUX FRQH[LXQHD $&

a f e d g c b
. . .

b
. . . . . .

b
. . .

AC (la +VCC) (a) (b) Fig. 4.40. Display-ul cu 7 segmente

D QRWDUHD VHJPHQWHORU E VFKHPD HOHFWULF SHQWUX .& F VFKHPD HOHFWULF SHQWUX $&

(c)

4.9.3.1. Decodificatorul BCD - 7 segmente cu componente discrete

&D L vQ FD]XO FHORUODOWH FLUFXLWH ORJLFH FRPELQD LRQDOH VWXGLDWH SUH]HQW QH SURSXQHP V UHDOL] P VLQWH]D XQXL GHFRGLILFDWRU %&' WDEHOXO GH DGHY U DO SkQ n - 7 segmente cu WDE GLQ 

componente discrete.
Q DFHVW VFRS DOF WXLP LQWUDUH GHFRGLILFDWRUXOXL ]HFLPDOH WUHFkQG vQ SULPD FRORDQ FRPELQD LLOH FRORDQ ORJLFH GH QXPHUHOH ]HFLPDOH GH OD  OD  vQ FRORDQHOH  FRUHVSXQ] WRDUH QXPHUHORU LHLULOH

SULPD

FRG ELQDU QDWXUDO LDU vQ XUP WRDUHOH  FRORDQH

a, b, , g, active
D

n 1 logic.
6H FRPSOHWHD]  OLQLH FX OLQLH FHOH  FRORDQH FRUHVSXQ] WRDUH IXQF LLORU GH LHLUH DVWIHO vQFkW VHJPHQWHOH DFWLYDWH V IRUPH]H FLIUD vQVFULV vQ SULPD FRORDQ WDE  FRQIRUP FRUHVSRQGHQ HL GLQ ILJ 

vizualizare presupune aprinderea LED-urilor a, b, c, d, e

ORJLF D OLQLLORU GH LHLUH OLQLH FRUHVSXQ] WRDUH D WDEHOXOXL SHQWUX DOH FRPSOHWHD] 6H SULPD  FX  FRUHVSXQ] WRDUH LHLULL SURFHGHD]

numerelor de la 0 la 9.

vQ

PDUF P SULQ [ vQ WDE 

u v%%w p $ !r w u t q i p ywr u p x v p sr p

7DE  7DEHOXO GH DGHY U DO GHFRGLILFDWRUXOXL %&'

119

7 segmente

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

a 1 0 1 1 0 1 1 1 1 1 x x x x x x

b 1 1 1 1 1 0 0 1 1 1 x x x x x x

c 1 1 0 1 1 1 1 1 1 1 x x x x x x

d 1 0 1 1 0 1 1 0 1 1 x x x x x x

e 1 0 1 0 0 0 1 0 1 0 x x x x x x

f 1 0 0 0 1 1 1 0 1 1 x x x x x x

g 0 0 1 1 1 1 1 0 1 1 x x x x x x

'H H[HPSOX FRPELQD LHL ELQDUH  vL FRUHVSXQGH vQ ]HFLPDO FLIUD  D F UHL L

f, deci activarea prin 1

3ULQ XUPDUH VH H[FHSWkQG ORFD LD

GHFRGLILFDWRUXOXL ORJLF

g FDUH U
VLPLODU

PkQH vQ  ORJLF WRDWH FRPELQD LLOH ELQDUH FRUHVSXQ] WRDUH

Fig. 4.41. Vizualizarea cifrelor zecimale pe un display cu 7 segmente

3HQWUX FRPELQD LLOH ELQDUH FDUH FRUHVSXQG QXPHUHORU GH OD  OD  LQWHU]LVH %&' VWDUHD LHLULORU GHFRGLILFDWRUXOXL HVWH LQGLIHUHQW  VLWXD LH SH FDUH R

120

Capitolul 4

ObVHUY de minimizare.

P F

IXQF LLOH GH LHLUH

a, b, , g FRUHVSXQ]

WRDUH FHORU  VHJPHQWH LQHP VHDPD vQ SURFHVXO

VXQW LQFRPSOHW GHILQLWH Y  IDSW GH FDUH YD WUHEXL V 6H FRPSOHWHD] FRQVWDW F

GLDJUDPHOH 9HLWFK .DUQDXJK DOH FHORU  IXQF LL GH LHLUH ILJ

 L VH DOHJH PLQLPL]DUHD GH WLS FRQMXQFWLY GHRDUHFH GLQ DQDOL]D GLDJUDPHORU VH ORFD LLOH FDUH FRQ LQ  ORJLF VXQW PDL SX LQH

A1A0 A3A2
00 01 11 10 00 01

(a)
11 10

A1A0 A3A2
00 01 00 01

(b)
11 10

0 0 x x x x x x

0 x x x x

0 x x

11 10

A1A0 A3A2
00 01 11 10 00 01

(c)
11 10

A1A0 A3A2
00 01 00 01

(d)
11 10

0 0 x x 0 x x x x

x x

x x

11 10

(e) A1A0 A3A2

00 01 11 10 00 01 11 10

(f) A1A0 A3A2

00 01 00 01 11 10

0 0 x 0 x

0 0 x x x x

11 10

x x

x x

)LJ  'LDJUDPHOH 9. FRUHVSXQ] WRDUH FHORU  VHJPHQWH

u v%%w p $ !r w u t q i p ywr u p x v p sr p

(g) A1A0 A3A2
00 01 11 10 00 01 11 10

121

0 0

x x

x x

)LJ  'LDJUDPHOH 9. FRUHVSXQ] WRDUH FHORU  VHJPHQWH FRQWLQXDUH

2EVHUYD LH /RFD LLOH OLEHUH GLQ GLDJUDPHO DU IL WUHEXLW vQVFULV XXULQ YDORDUHD ORJLF

e VK sunt cele n care n mod normal

 'LQ PRWLYH GH VLPSOLWDWH D GHVHQXOXL L

D JUXS ULORU ORFD LLOH UHVSHFWLYH DX IRVW O VDWH OLEHUH

A3

A2

A1

A0

A3

A2

A1 aFMC

bFMC

gFMC

)LJ  6FKHPD VLQWHWL]DW

D GHFRGLILFDW

orului BCD 7 segmente

122

Capitolul 4

Expresiile formelor minimale conjunctive sunt:

a FMC = A3 + A 2 + A1 + A0 A 2 + A1 + A 0 ; bFMC = A 2 + A1 + A0 A 2 + A1 + A0 ;

( (
(

)(

)(

(4.41)

g FMC = A3 + A 2 + A1 A 2 + A1 + A0 , iar implementarea lor conduce la schema decodificatorului BCD 7 segmente din fig. 4.43.

)(

4.9.3.2. Decodificatorul BCD -  VHJPHQWH vQ YDULDQW

2 YDULDQW D GHFRGLILFDWRUXOXL %&'

LQWHJUDW

7 segmente o constituie circuitul -se din acest motiv utilizarea unui display cu 7 segmente cu anod comun, fig. 4.40 c.
LQWHJUDW &'%  DOH F UXL LHLUL VXQW DFWLYH vQ  ORJLF YWDE  LPSXQkQGX
7DE  7DEHOXO GH IXQF LRQDUH DO GHFRGLILFDWRUXOXL %&'

- 7 segmente integrat (CDB 447)

,(,5,

ZECIMAL SAU
)81& ,$

,175

5,

LT RBI
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 x 1 0 1 x x x x x x x x x x x x x x x x 0 x

A3 A2 A1 A0

BI / RBO ( b ) a
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0 1 0 0 1 0 1 0 0 0 1 1 1 0 1 1 1 1 0

b
0 0 0 0 0 1 1 0 0 0 1 1 0 1 1 1 1 1 0

c
0 0 1 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 0

d
0 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0

e
0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 1 1 0

f
0 1 1 1 0 0 0 1 0 0 1 1 0 0 0 1 1 1 0

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 x 0 x

0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 x 0 x

0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 x 0 x

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 x 0 x

1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 0

BI(b) RBI(b) LT(b)

UHDOL]HD]

FRPELQD LLORU ORJLFH GH LQWUDUH LQWHU]LVH vQ %&' FH FRUHVSXQG QXPHUHORU ]HFLPDOH     QX DX SUDFWLF QLFL R VHPQLILFD LH

PHPRULH IL[ WHDUV

GHFRGLILFDWRU GH DGUHV

OLQLL GH DGUHV  DOH F URU FRPELQD LL ORJLFH DFWLYHD] LHLUH

Codificatorul are la intrare cele m linii (de cuvnt) activate succesiv, fiecare linie wp, cu p=0, 1, , m- ILLQG FDSDELO SULQ DFWLYDUH V FLWHDVF L V WUDQVPLW OD LHLULOH 20, O1, , Ok-1, cte un cuvnt format din k EL L

u v%%w p $ !r w u t q i p ywr u p x v p sr p

Nota (b): RI / RBO (Blanking Input / Ripple Blanking Output); BI - n "aer" sau la "1" GDF GRULP IXQF LLOH GH LHLUH 15; RBI - vQ DHU VDX OD  GDF DILDUHD OXL  QX HVWH GRULW  LT (Lamp Test Input).
Din fig. 4.44
VH REVHUY PDL F R YL]XDOL]DWH SX LQ DJUHDELO D

123

VHJPHQWHOH DFWLYDWH SHQWUX RE LQHUHD FLIUHORU  L  DFHVWRUD LDU FHOH FRUHVSXQ] WRDUH

10

11

12

13

14

15

Fig. 4.44. Formarea cifrelor zecimale cu ajutorul celor 7 segmente

4.10. Memorii ROM

Memoria ROM (Read Only Memory = memorie numai cu citire) este o
vQ VHQVXO F 520 RGDW IL vQVFULV SULYLW LQIRUPD LD vQ HD DFHDVWD QX PDL SRDWH IL FD XQ FRQYHUWRU GH FRG IRUPDW GLQWU VDX PRGLILFDW  FL QXPDL FLWLW  0HPRULD SRDWH

-un

L XQ FRGLILFDWRU ILJ 

m=2n linii de cuvnt A0 A1 DCD An-1 wm-1 Fig. 4.45. Schema bloc a memoriei ROM
'HFRGLILFDWRUXO DUH OD LQWUDUH XQ YHFWRU GH DGUHV

w0 w1 CD

n linii
DGUHV

O0 O1 Ok-1

cuvinte a m k cte
EL L

VXFFHVLY FHOH

format din n variabile (n m=2n linii de

124

Capitolul 4

Intuitiv, codificatorul ar putea fi imaginat sub forma unui dulap cu m sertare, fig. 4.46, n fiecare sertar aflndu-se cte k ELOH DOEH L QHJUH VLPEROL]kQG YDORrile
ORJLFH  UHVSHFWLY  'XS GHILQLWLY  FH DX IRVW XPSOXWH FX ELOH VHUWDUHOH VXQW vQFXLDWH L FKHLD HVWH DUXQFDW  DVWIHO vQFkW FRQILJXUD LD DOE QHJUX D ELOHORU GLQ VHUWDUH U PkQH

L0 L1 w0 w1 Lm-1

wm-1

Ok-1
)LJ  2 SUH]HQWDUH LQWXLWLY

O1 O0
D FRGLILFDWRUXO

ui memoriei ROM

Activarea uneia dintre liniile de intrare wp

VH DSULQG

YD IDFH FD vQ VHUWDUXO FRUHVSXQ] WRU

FRPELQD LD DOE QHJUX GHFL  L  ORJLF D ELOHORU GLQ VHUWDUXO UHVSHFWLY YD

XQ EHF DVWIHO vQFkW SULQ LQWHUPHGLXO RJOLQ]LORU /0

, L1, Lm-1, putea fi

FLWLW

SRDWH IL UHSHWDW

OD LHLULOH 20

OD LQILQLW I U

, O1, , Ok-1

2SHUD LD GH FLWLUH D FRQ LQXWXOXL RULF UXL VHUWDU

D DIHFWD vQ DFHVW PRG FRQ LQXWXO VHUWDUXOXL

&DSDFLWDWHD & D XQHL PHPRULL 520 HVWH GHWHUPLQDW

GH QXP UXO GH EL L DL

matricei de memorare, care pentru m linii de cuvnt a cte k EL L ILHFDUH HVWH C=mk=2nk. (4.42) 'DWHOH IXUQL]DWH OD LHLUHD FRGLILFDWRUXOXL VXE IRUPD D m cuvinte a cte k EL L
ILHFDUH UHSUH]LQW vQIRUPD LD vQPDJD]LQDW vQ FRGLILFDWRU vQVFULHUHD LQIRUPD LHL vQ FRGLILFDWRU Q IXQF LH GH ORFXO XQGH VH UHDOL]HD] 'XS GLVWLQJHP PHPRULL 520 SURJUDPDELOH OD SURGXF WRU UHVSHFWLY vQ WHKQRORJLH LQWHJUDW ELSRODU VDX XQLSRODU  GH OD XQ WLS GH PHPRULH 520 OD

- la utilizator.

WLSXO WHKQRORJLHL GH IDEULFD LH XWLOL]DWH PHPRULLOH 520 SRW IL UHDOL]DWH

(YLGHQW VWUXFWXUD FRGLILFDWRUXOXL GLIHU

altul.

LQIRUPD LD PHPRUDW

520 ELSRODUH SURJUDPDELOH OD SURGXF WRU L DQXPH DFHD SDUWH FDUH FRUHVSXQGH XQHL

linii de cuvnt oarecare, wp. Schema FRQ LQH k repetoare pe emiter realizate cu tranzistoarele T0, T1, , Tk-1.
3URFHVXO GH IDEULFD LH DO FLUFXLWXOXL LQWHJUDW FDUH vQJOREHD] PHPRULD 520

DX SULPLW VXILFLHQWH FRPHQ]L SHQWUX R DQXPLW

, l1, , lk-1, dintre bazele tranzistoarelor L OLQLD Zp i nu este reluat, din motive de rentabilitate, dect n momentul n care sFRQILJXUD LH GH  L  ORJLF D PDWULFHL WRDUH ORFD LLORU vQ FDUH VH GRUHWH vQVFULHUHD LQIRUPD LHL  FRQ LQ  ORJLF

HVWH RSULW vQDLQWH GH UHDOL]DUHD OHJ WXULORU O0

de memorare. Zonele li FRUHVSXQ]

YRU U PkQH QHPHWDOL]DWH

ORJLF YRU IL PHWDOL]DWH LDU FHOH FH FRUHVSXQG ORFD LLORU FDUH WUHEXLH V

PHWDOL]DW 

apropiat de +VCC

DFHVWXLD L RE LQHUHD vQ HPLWHUXO V X D SRWHQ LDOXOXL

deci 1 logic.

%% $ !  

125

4.10.1. Memorii ROM bipolare

0HPRULLOH 520 ELSRODUH VH FDUDFWHUL]HD] SULQ WLPSL UHGXL GH DFFHV OD GH RUGLQXO ]HFLORU GH QDQRVHFXQGH

 0HPRULL 520 ELSRODUH SURJUDPDELOH OD SURGXF Q ILJ  SUH]HQW P D

WRU

m-a parte din structura codificatorului unei memorii

+VCC wp lk-1 Tk-1 l1 T1 l0 T0

Ok-1

O1

O0
WRU

Fig. 4.47. A m-D SDUWH GLQ FRGLILFDWRUXO PHPRULHL 520 ELSRODUH SURJUDPDELOH OD SURGXF
'H H[HPSOX DVWIHO GDF OD LHLUHD 20

doriP
Zp YD

FLWLP

ORJLF

]RQD XQXL

vQFkW

DFWLYDUHD

OLQLHL

vQVHPQD

DSOLFDUHD

SRWHQ LDO

O0

va fi

FRUHVSXQ] WRU OXL  ORJLF SH ED]D WUDQ]LVWRUXOXL 7 0

, saturarea (4.43)

VO 0 = VCC VCE0sat = VCC 0,1V VCC ,

126
'DF OD DFHHDL LHLUH 20 GRULP V

Capitolul 4
RE LQHP  ORJLF OHJ WXUD O0 YD U PkQH D OLQLHL Zp

QHPHWDOL]DW  DVWIHO vQFkW LQGLIHUHQW GH SRWHQ LDOXO VDX YDORDUHD ORJLF

tranzistoarul T0

YD U PkQH SHUPDQHQW EORFDW L SRWHQ LDOXO PDVHL VH YD WUDQVIHUD OD

LHLUH SULQ UH]LVWHQ D GLQ HPLWHU 5H]XOW 3URJUDPDUHD PHWDOL]DUH GXS PHPRULHL 520

VO 0 = 0V , deci 0 logic.
HVWH SULQ XUPDUH R HWDS Zp D SURFHVXOXL GH

IDEULFD LH OHJ WXULOH GLQWUH ED]HOH WUDQ]LVWRDUHORU L OLQLLOH

fiind realizate prin

OLEHUH PHPRULH 520

DSOLFDUHD SH FKLS XO VHPLFRQGXFWRU D XQHL P WL FDUH ODV

numai acele zone li FDUH XUPHD] este SURJUDPDELO SULQ PDVF .

D IL PHWDOL]DWH 6H VSXQH F

DFHDVW

4.10.1.2. Memorii ROM bipolare programabile la utilizator Acest tip de memorie este cunoscut sub denumirea de PROM (Programmable ROM). Q ILJ  SUH]HQW P DFHD SDUWH D FRGLILFDWRUXOXL FDUH FRUHVSXQGH OLQLHL Zp. (OHPHQWHOH GH PHPRULH VXQW SHOLFXOH IX]LELOH VXE LUL GH FURP-nichel (f0, f1, , fk-1) care pot fi arse prin trecerea unui curent de programare Ip, avnd o
LQWHQVLWDWH GH RUGLQXO ]HFLORU VDX VXWHORU GH PLOLDPSHUL L R GXUDW $FHVW FXUHQW LD QDWHUH  SULQ DSOLFDUHD XQHL GH FkWHYD ]HFL GH GLIHUHQ H PLOLVHFXQGH DQXPLWH GH SRWHQ LDO vQWUH LHLUHD FRUHVSXQ] WRDUH ORFD LHL GH PHPRULH UHVSHFWLYH L PDV  Y ILJ

4.48, n timp ce linia wp HVWH DFWLYDW

+VCC R fk-1 Dk-1 wP Ip Ok-1 O1 O0 R f1 D1 R f0 D0

Fig. 4.48. A m-a parte din codificatorul memoriei ROM bipolare programabile la utilizator
Q WLPSXO RSHUD LHL GH FLWLUH D PHPRULH FRUHVSXQG UH]LVWHQ HOH IX]LELOHORU 5 DUVH YRP DYHD vQ  FRUHVSXQ] WRDUH WLPS FH

ORJLF

i ROM, wp VH DFWLYHD]
SRWHQ LDOXO OD FHOHODOWH LHLUL 9CC YRP 

L OD LHLULOH FH

transferat prin
DYHD  ORJLF

(VOi=VCEsat+VDiON=0,1+0,7=0,8V9 Evident, reprogramarHD XQHL DVWIHO GH PHPRULL HVWH LPSRVLELO

dect ai memoriilor bipolare (sute de nanosecunde).

codificatorului, fig. 4.49. Este vorba despre k LQYHUVRDUH drivere au grilele conectate la linia de cuvnt wp.
TL k 1 wP TD k 1 Ok-1 TD1 O1 TL1

Fig. 4.49. A m-a parte din codificDWRUXO PHPRULHL 520 XQLSRODUH SURJUDPDELOH OD SURGXF
3URJUDPDUHD OD SURGXF WRU VH IDFH SULQ IXUQL]DWH GH F WUH XWLOL]DWRU L FRQVW JURV OD WUDQ]LVWRDUHOH FH XUPHD] D IL PDVF  SH ED]D XQHL K $FHVWHD YRU

indiferent de nivelul logic al lui wp

,HLULOH FRUHVSXQ] WRDUH OLQLHL Z p PRPHQWXO DFWLY ULL

SRWHQ LDOXO 9DD SULQ WUDQ]LVWRUXO VDUFLQ

WUDQ]LVWRUXO GULYHU UHVSHFWLY Y IXQF LRQDUHD LQYHUVRUXOXL 1026 VWDWLF 

SH FDOH HOHFWULF  VDX ($520 (OHFWULFDOO\ $OWHUDEOH 520 GH PRGLILFDUH SH FDOH HOHFWULF 

SUH]HQWDW

%% $ !  

127

4.10.2. Memorii ROM unipolare

0HPRULLOH 520 XQLSRODUH DX FDSDFLW L PDUL GDU WLPSL GH DFFHV PDL VODEL

4.10.2.1. Memorii ROM unipolare programabile la produF

&D L vQ FD]XULOH DQWHULRDUH SUH]HQW P QXPDL R

WRU GLQ VWUXFWXUD

SDUWH

1026 VWDWLFH DOH F URU

+VDD
TL 0

TD0

O0
WRU

U L ORJLFH EORFDWH

vQ UHDOL]DUHD XQXL VWUDW L]RODWRU DO SRU LL PDL GH]DFWLYDWH OD LHLULOH U PkQH FRUHVSXQ] WRDUH YRU WUDQVIHUkQGX 

-se

UHVSHFWLY GHFL  ORJLF WUDQ]LVWRDUH PDVHL ILLQG IXUQL]D OD

FHORUODOWH

logic n
SULQ

SRWHQ LDOXO

WUDQVIHUDW

LHLUH

4.10.2.2. Memorii ROM unipolare programabile la utilizator Acest tip de memorLL 520 VH vPSDUWH vQ GRX FDWHJRULL L DQXPH - (3520 (UDVDEOH 3520 3520 FX SRVLELOLWDWH GH WHUJHUH - E23520 (OHFWULFDOO\ (UDVDEOH 3520 3520 FX SRVLELOLWDWH

GH WHUJHUH

520 FX SRVLELOLWDW

4.10.2.2.1. Memorii EPROM

0HPRULLOH (3520 SUH]LQW R VWUXFWXU D FRGLILFDWRUXOXL LGHQWLF FX FHD vQ ILJ 

128
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Capitolul 4
GH PHPRULLOH 520 XQLSRODUH SURJUDPDELOH OD SURGXF WRU D WUDQ]LVWRDUHORU GULYHU $FHVWHD VXQW SUHY ]XWH FX R vQ LQWHULRUXO VWUDWXOXL GH R[LG VLPEROL]D OD FLUFXLWXO H[WHULRU L SODVDW GH FDQDOXO YLUWXDO SUH]HQWDW VWUXFWXUD IL]LF L

vQ FRQVWUXF LD VSHFLDO JULOD SULQFLSDO ILJ  DP

IORWDQW  QHFRQHFWDW Q

FH VHSDU

rea unui astfel de

tranzistor.
VDS _ - VGS + Gf + S G D n n

p
SB
D 6WUXFWXUD IL]LF )LJ  7UDQ]LVWRUXO GULYHU FX JULO

b) Simbolul
IORWDQW

nscrierea unui 1 logic ntr-R

WUDQ]LVWRUXO QHJDWLYH LPSRVLELO GULYHU UHVSHFWLY YRU SULQ $FHVWHD UHVSLQJH

ORFD LH

PHPRULHL

VH

YD

IDFH ED]

GH]DFWLYkQG L YRU IDFH

vQF UFDUHD HOHFWURQLL

SRU LL

flotante cu sarcini electrice

GH VH ID

GLQ

VXEVWUDWXO

LQGXFHUHD FDQDOXOXL LQGLIHUHQW GH SRWHQ LDOXO DSOLFDW SH JULOD GH OXFUX

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-VXUV

PDUL FX  SH GUHQ  L D XQHL WHQVLXQL JULO

ce prin aplicarea -VXUV SR]LWLYH

FX  SH JULO  Q DFHVWH FRQGL LL DUH ORF SHQHWUDUHD FDQDOXOXL GHFL IRUPDUHD vQ FDQDO

foarte aproape de zona drenei, a unei regiuni libere de sarcini electrice care se
FRPSRUW FD XQ L]RODWRU Y FXUVXO GH '&( QWUH H[WUHPLW LOH DFHVWHL UHJLXQL vQ OXQJXO FDQDOXOXL VH DSOLF HOHFWULF LQWHQV FDUH DFFHOHUHD] JULOD IORWDQW  IRUPkQG XQ SUDFWLF vQWUHDJD WHQVLXQH 9DS OXkQG QDWHUH XQ FkPS HOHFWURQLL GLQ FDQDO F WUH GUHQ  2 SDUWH GLQWUH DFHWL GH VDUFLQL XQ HOHFWULFH  ORJLF QHJDWLYH ORFD LD FDUH GH]DFWLYHD] D SHQWUX D VWU SXQJH VWUDWXO GH R[LG L D DMXQJH SH OD FRUHVSXQ] WRDUH VH UHDOL]HD]

HOHFWURQL SULPHVF HQHUJLH VXILFLHQW QRU WUDQ]LVWRUXO UHVSHFWLY vQVFULLQG

SUDFWLF

memoriei EPROM.
WHUJHUHD LQIRUPD LLORU GLQ ORFD LLOH PHPRULHL (3520 SULQ H[SXQHUHD OD UDGLD LL XOWUDYLROHWH D JULOHORU WUDQ]LVWRDUHORU GULYHU VLWXDWH vQ GUHSWXO XQHL IHUHVWUH GLQ FXDU GH SH VXSUDID D FLUFXLWXOXL LQWHJUDW (O HQHUJLD QHFHVDU

ectronii de pe grilele

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SHQWUX D VWU SXQJH vQ

VHQV LQYHUV SHOLFXOHOH GH R[LG FDUH GHVSDUW JULOHOH IORWDQWH GH VXEVWUDWXO GH ED]  UHYHQLQG DVWIHO vQ VXEVWUDW L UHDFWLYkQG WUDQ]LVWRDUHOH GULYHU 0HPRULD (3520 HVWH DFXP JDWD SHQWUX R QRX vQVFULHUH

UHSUH]LQW 

ultraviolete n timpul procesulXL GH WHUJHUH Memoria E23520 UHDOL]HD] R WHUJHUH UHODWLY UDSLG D LQIRUPD LLORU VWRFDWH combinnd o modificare a structurii fizice a tranzistorului driver cu utilizarea unui
SURFHGHX HOHFWULF VLPSOX GH WHUJHUH $VWIHO VWUDWXO GH R[LG FDUH VHSDU JULOD IORWDQW GH VXEVWUDWXO GH ED] HVWH PXOW PDL VXE LUH F WUH ]RQD GUHQHL DWLQJkQG YDORUL GH RUGLQXO P

GUHQ

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unui 1 logic.

GH DGUHV  P

RE LQHP R FDSDFLWDWH D PHPRULHL &

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%% $ !  
4.10.2.2.2. Memoria E2PROM Memoria E23520 ((3520 VDX ($520 HOLPLQ
vQ FD]XO PHPRULHL (3520 GXUDWHOH PDUL GH H[SXQHUH OD

129

LQFRQYHQLHQWXO SH FDUH

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UDGLD LL

nscrierea

VH IDFH SULQ DSOLFDUHD WUDQVYHUVDO ID QRUXOXL HOHFWURQLF FDUH GH]DFWLYHD]

GH SHOLFXOD GH R[LG vQWUH VWU SXQJHUHD L LPSOLFLW WUDQ]LVWRUXO

L JULOD GH OXFUX D XQHL WHQVLXQL GH FFD 9 FDUH GHWHUPLQ IRUPDUHD D PHPRULHL

SULQ LQYHUVDUHD SRODULW

LL WHQVLXQLL QHFHVDUH vQVFULHULL

4.10.3. Organizarea unei memorii ROM de 8Kb

3RUQLQG GH OD VFKHPD EORF D PHPRULHL 520 GLQ ILJ  L OXkQG Q   OLQLL  EL L .E

10

 OLQLL GH FXYkQW L R OXQJLPH D FXYkQWXOXL GH FRG N PN  .EL L  EL L .LORELW

Q DFHVW H[HPSOX GHFRGLILFDWRUXO DU WUHEXL V

SUH]LQWH  OLQLL GH LHLUH

A8 A6 A4

A9 A7 A5 A3

DCD 1 din 128

Matrice de memorare 128 x 64 bi i       I 7 I 0 I 7 I 0 I 7 I 0

A2 A0

A1

MUX
7

MUX
1

MUX
0

CS

O7

O1

O0

Fig. 4.51. Structura unei memorii ROM de 8Kb

130

Capitolul 4

O organizare mai judLFLRDV

XWLOL]DWH HVWH FHD SUH]HQWDW Q DFHDVW

GLQ SXQFWXO GH YHGHUH DO QXP UXOXL GH SRU L

vQ ILJ 

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, A9 FDUH DFWLYHD]

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, A1, A0 VXQW GHVWLQDWH VHOHF LHL VXFFHVLYH D FkWH  GLQ FHL  , O1, , O7, v. tab.

4.17.
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Linia
VHOHFWDW

w0

29 A9 0 0 0 0 0 0

28 A8 0 0 0 0 0 0 1

... ... ... ... ... ... ... ... ...

23 A3 0 0 0 1 1 1 1

22 A2 0 0 1 0 0 1 1

21 A1 0 0 1 0 0 1 1

20 A0 0 1 1 0 1 1 1

,QWU

ULOH 08;

-urilor

FDUH DX DFFHV OD LHLUL

I0 I1 I7 I0 I1 I7 I7

w1

w127

FRG GH  EL L D IRVW FLWLW OD LHLUHD PHPRULHL 520

Astfel, pentrX FRPELQD LD ELQDU $9A8 A3A2A1A0   EL LL GH $9A8 A3   YRU DFWLYD OLQLD GH LHLUH Z0 a decodificatorului, care va VHOHFWD OD UkQGXO HL XQ SULP FXYkQW GH FRG GH  EL L WUDQVPL kQGX-l la cele 8x8 LQWU UL DOH 08;-urilor. Liniile de DGUHV $2A1A0  YWDE  YRU SHUPLWH FHORU  LQWU UL ,0 V DFFHDG OD LHLULOH 08;-XULORU L SUHVXSXQkQG F EDUD GH VHOHF LH CS (Chip Select) = 0  SULPXO FXYkQW GH  EL L 27 O1O0 YD DYHD DFFHV OD LHLULOH memoriei ROM. 8UP WRDUHD FRPELQD LH GH DGUHV $9A8 A3A2A1A0   YD S VWUD linia w0 DFWLY $9A8 A3   L YD SHUPLWH DFFHVXO F WUH LHLUL DO XUP WRDUHORU  LQWU UL ,1) ale MUX-urilor (A2A1A0=001). Cel de-al doilea cuvnt de
DGUHV

PURFHVXO FRQWLQX
OD LHLUH

SkQ

FkQG XOWLPLL  EL L GLQ FHL  GH SH OLQLD Z0 VXQW FLWL L

FRPELQD LD ORJLF $9A8 A3A2A1A0=00 1000, care va activa 8UPHD] linia de cuvnt w1 VHOHFWkQG DVWIHO XQ QRX VHW GH  EL L FDUH YRU DMXQJH OD LHLUHD memoriei RO0 VXE IRUPD DOWRU  FXYLQWH D FkWH  EL L ILHFDUH DPG

EL L ILHFDUH VXQW ILH FLUFXLWH FX FROHFWRUXO vQ JRO ILH FLUFXLWH ORJLFH FX  VW UL DPEHOH YDULDQWH SHUPL kQG FXSODUHD PHPRULHL 520 SH R PDJLVWUDO GH GDWH vQ ILJ  6LPEROL]DUHD XQHL PHPRULL 520 GH .EL L HVWH SUH]HQWDW

GDW

GH OLQLL GH LQWUDUH L OXQJLPHD FDSDFLW

multor memorii.

FUHWHUH D QXP UXOXL GH FXYLQWH GH FRG

cuvntului, fig. 4.53.

10 (A0,,A9) 10

%% $ !  
CS

131

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10 (A0,,A9)

ROM 1024 x 8

Fig. 4.52. Simbolizarea memoriei ROM de 8Kb

 ([WLQGHUHD FDSDFLW

&XQRVFXW ILLQG IDSWXO F

LL PHPRULLORU 520

GLPHQVLXQHD FDSDF

GH SURGXVXO GLQWUH QXP UXO GH FXYLQWH GH FRG P

itatea) unei memorii ROM este n  (unde n UHSUH]LQW QXP UXO

F H[WLQGHUHD D PDL

k D FXYkQWXOXL GH FRG GH LHLUH UH]XOW

LL VH SRDWH UHDOL]D SULQ LQWHUFRQHFWDUHD OD LQWUDUH OD LHLUH VDX PL[W

 ([WLQGHUHD OD LQWUDUH D FDSDFLW ([WLQGHUHD OD LQWUDUH GH DGUHV  D

LL PHPRULHL 520 LL PHPRULHL 520 LPSOLF R

FDSDFLW

L S VWUDUHD QHVFKLPEDW

D OXQJ

imii k a

_ CS ROM-0 1024 x 8 _ CS ROM-1 1024 x 8 _ CS ROM-2 1024 x 8 _ CS ROM-3 1024 x 8

10 A10 A11 DCD 1/4 10

8 (D0,,D7)

10

)LJ  ([WLQGHUHD OD LQWUDUH D FDSDFLW

LL PHPRULHL 520

132
6H REVHUY DFWLYDUHD VXFFHVLY GH F WUH FRPELQD LLOH GH FRG

Capitolul 4
DOH OLQLLORU

VXSOLPHQWDUH GH DGUHV  $10 L $11

 DO F UHL FRQ LQXW GH  FXYLQWH GH FRG D FkWH  EL L ILHFDUH YD DYHD DFFHV OD LHLUH 8UPHD] DFWLYDUHD PHPRULHL 520 /D LHLUHD FLUFXLWXOXL VH RE LQ [[EL L

, a celor 4 memorii ROM de cte 8Kb fiecare. $VWIHO SHQWUX FRPELQD LD GH DGUHV $11A10  YD IL DFWLYDW PHPRULD 520-1 (A11A10
 DPG [EL L [.EL L

 ([WLQGHUHD OD LHLUH D FDSDFLW ([WLQGHUHD OD LHLUH D FDSDFLW

LL PHPRULHL 520 R FUHWHUH D OXQJLPLL FXYLQWHORU GH FRG

LL PHPRULHL 520 LPSOLF D QXP UXOXL

cuvntului de cod k
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S VWUDUHD

QHVFKLPEDW

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paralel.
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 ([WLQGHUHD PL[W ([WLQGHUHD PL[W D FDSDFLW

D FDSDFLW

LL PHPRULHL 520 FUHWHUHD VLPXOWDQ D

LL PHPRULHL 520 LPSOLF

m FkW L D OXQJLPLL k a cuvintelor, fig. 4.54. 6H REVHUY DFWLYDUHD VLPXOWDQ  SHQWUX $10=0, a memoriilor ROM- L 520 XUPDW GH DFWLYDUHD PHPRULLORU 520- L 520-3, pentru A10=1.
_ CS A0,,A9 A10 10 10 ROM-0 1024 x 8 _ CS ROM-1 1024 x 8 _ CS ROM-2 1024 x 8 _ CS ROM-3 1024 x 8 8

QXP UXOXL GH FXYLQWH GH FRG

10

8 8

D0,,D15

10

)LJ  ([WLQGHUHD PL[W

D FDSDFLW

LL PHPRULHL 520

vQ ILQDO V

VHFYHQ LDOH

- HIHFWXDUHD WUDQVIRUP ULORU GH DGUHV L vQPDJD]LQDUHD n microprogramare; - LPSOHPHQWDUHD FLUFXLWHORU ORJLFH FRPELQD LRQDOH FX
LQWU UL L LHLUL I U D PDL IL QHFHVDU PLQLPL]DUHD

lucru ridicate, utilizarea memoriilor fixe programabile la utilizator (PROM, EPROM, E23520 SRDWH GHYHQL LPSURSULH VDX QHHFRQRPLF 
'H ORJLFH DVHPHQHD vQ VLWXD LLOH FRPSOH[H vQ FDUH HVWH VH QHFHVDU IDEULF FRQVWUXLUHD vQ XQRU FLUFXLWH FRPELQD LRQDOH FDUH QX WHKQRORJLH LQWHJUDW 

implementarea acestora ar conduce la utilizarea mai multor circuite integrate

LQWHUFRQHFWDWH vQWUH HOH RFXSkQG XQ VSD LX PDL PDUH SH FLUFXLWXO LPSULPDW FX XQ FRQVXP VSRULW L R ILDELOLWDWH PDL UHGXV  Q WRDWH DFHVWH VLWXD LL ariile logice programabile SULQ PDVF OD SURGXF WRU (Programmable Logic Array = PLA VDX SH FDOH HOHFWULF Field PLA = FPLA) la XWLOL]DWRU UHSUH]LQW &D L vQ R VROX LH VDOYDWRDUH PHPRULHL 520 3/$  )3/$ VH FRPSXQH GLQWU GH FD]XO

decodificator format dintr-R PDWULFH SURJUDPDELO GH SRU L dintr-o PDWULFH SURJUDPDELO GH SRU L 6$8 SUHFXP L programabile.
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logic.
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termenilor produs de forma:

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PHPRUDUHD LQVWUXF LXQLORU L GDWHORU vQ VLVWHPHOH GH FDOFXO L DXWRPDWHOH PLFURLQVWUXF LXQLORU XQ QXP U PDUH GH

- FRQYHUVLD GH FRG vQ YHGHUHD DIL ULL SH  VHJPHQWH VDX SULQ  SXQFWH - reali]DUHD XQRU WDEHOH GH IXQF LL - JHQHUDUHD XQRU VHFYHQ H GH LPSXOVXUL HWF

4.11. Arii logice programabile

Q FD]XO XQRU DSOLFD LL FX XQ QXP U PDUH GH YDULDELOH GH LQWUDUH L YLWH]H GH

-un

, XQ FRGLILFDWRU IRUPDW DPSOLILFDWRDUH LHLUH

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134

Capitolul 4

Pk = i n I n + jn I n ,
0
FX N     L

15

(4.44)


i n = jn = 0  GDF LQWUDUHD HVWH QHSURJUDPDW i n = jn  GDF LQWUDUHD HVWH SURJUDPDW  i n = jn = 1  GDF

I0 I0 I1 I1 I 0
I1
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I15 I15
I15

P0

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--SI-1 -------- SI-47 P1 P47 SAU-0

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Sr = t k Pk ,
0
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47

tk tk

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3k 3k

este inactiv (programat); este activ (neprogramat);

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Q ILJ  DP SUH]HQWDW R VFKHP

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pelicule fuzibile de crom-

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g h%%i $m !d i g f n m n l kid g j h ed

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Capitolul 4
DMXWRUXO XQXL

SURJUDPDWRU FDUH SHUPLWH VHOHF LD L DUGHUHD SULQ LPSXOVXUL GH FXUHQW D IX]LELOHORU D F URU vQWUHUXSHUH HVWH QHFHVDU  &RPSDUDWLY FX R PHPRULH 520 FX DFHODL QXP U GH LQWU UL  L GH LHLUL  3/$  )3/$ HVWH PXOW PDL HFRQRPLF  SUH]HQWkQG R FDSDFLWDWH PXOW PDL PLF   FXYLQWH [  EL L ID GH 

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de intrare, prinFLSDOHOH
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