02-05-2022

Analog -t o-D ig it al Converter Architecture Integrating A D C s

Integrating A D C s

These A D C s perform the conversion by integrating the input signal and

correlating the integration time with a digital counter
These types of converters are used in high-resolution applications but
have relatively slow conversions.
However, they are very inexpensive to produce and are commonly found
in slow-speed, cost-conscious applications.
Two types of Integrating A D C s are :
1 Single-Slope A D C
2 Dual-Slope A D C

AMMVD

Analog -t o-D ig it al Converter Architecture Integrating A D C s

Single Slope A D C

Block diagram of a single-slope ADC

A counter determines the number of clock pulses that are required before
the integrated value of a reference voltage is equal to the sampled input
signal.
The number of clock pulses is proportional to the actual value of the
input, and the output of the counter is the actual digital representation
of the analog voltage.
AMMVD

1
 02-05-2022

Analog -t o-D ig it al Converter Architecture Integrating A D C s

Single Slope A D C

Since the reference is a D C latch the value of the counter.

voltage, the output of the The control logic also resets the
integrator starts at zero and system for the next sample
linearly increases with a slope
that depends on the gain of the
integrator
The reference voltage is defined
as negative so that the output of
the inverting integrator is
positive
At the time when the output of
the integrator surpasses the
value of the S / H output, the
comparator switches states, thus
triggering the control logic to

AMMVD

Analog -t o-D ig it al Converter Architecture Integrating A D C s

Single Slope A D C

If the input voltage is very small, the conversion time is very short
However, if the input voltage is at its full-scale value, the counter must
increment to its maximum value of 2 N clock cycles. Thus, the clock
frequency must be many times faster than the bandwidth of the input
signal
The conversion time, t c , depends on the value of the input signal and can
be described as
vIN
tc = .2N .T C L K
VREF
At the end of the conversion, the voltage across the integrating
capacitor, V c , assuming no initial condition, will be

AMMVD