‫آنالیز غیر خطی ﺯوج تفاضلی در حضور فیلتر در خروجی‬

‫𝑡 ‪𝑣𝑜 = 𝑉𝐶𝐶 + 𝑖1 𝑥 𝑅𝐶 cos 𝑤0‬‬

‫𝑥‪∗ 4‬‬
‫𝑡 ‪𝑣𝑜 = 𝑉𝐶𝐶 + 𝑎1 𝑥 𝐼𝑘 𝑅𝐶 cos 𝑤0‬‬
‫𝑥‪∗ 4‬‬

‫𝑘𝐼‬ ‫‪4𝑎1‬‬
‫‪𝑣𝑜 = 𝑉𝐶𝐶 +‬‬ ‫∗‬ ‫𝑡 ‪𝑅 𝑣 cos 𝑤0‬‬
‫𝐼 𝐶 𝑥 ‪4𝑉𝑇 1‬‬
‫𝑑𝑚𝑔‬ ‫𝑖𝑣‬

‫𝑖𝑣 𝐶𝑅 ∗ 𝑥 𝑑𝑚𝐺 ‪𝑣𝑜 = 𝑉𝐶𝐶 +‬‬

‫∞‬ ‫‪2‬‬ ‫‪2‬‬

‫‪2𝑛 − 1‬‬ ‫)𝑥( ‪𝑎2𝑛−1‬‬
‫= 𝑥 𝐷‬
‫‪2𝑛 − 1 2 − 1‬‬ ‫)𝑥( ‪𝑎1‬‬
‫‪𝑛=2‬‬

‫)𝑥(𝐷‬
‫= 𝐷𝐻𝑇‬
‫𝑡𝑄‬
‫مثال‪ :‬در مدار زیر ضمن بدست آوردن رابطه )𝑡( 𝑜𝑣 ‪ ،‬اعوجاج های جریان و ولتاژ هارمونی های دوم و سوم را نیز بدست آورید و‬
‫‪𝑣𝑖 = 250𝑚𝑣 cos 107 𝑡 , 𝛽 = 100, 𝑉𝐵𝐸 = 0.7‬‬ ‫و ‪ %THD‬مدار را نیز بدست آورید‬

‫‪1‬‬
‫= ‪𝑤0‬‬ ‫𝑐𝑒𝑠‪= 107 𝑟𝑎𝑑/‬‬
‫𝐶𝐿‬
‫𝑣‪3‬‬
‫‪3𝐼𝐾 + 𝑉𝐵𝐸 − 3.7 = 0‬‬ ‫= 𝐾𝐼‬
‫𝐶𝐷𝐼 = 𝐴𝑚‪= 1‬‬
‫𝑘‪3‬‬
‫𝑣𝑚 ‪250‬‬ ‫𝐶𝐷𝐼‬ ‫𝐴𝑚‪1‬‬
‫=𝑥‬ ‫= 𝑚𝑔 ‪= 10,‬‬ ‫=‬ ‫‪= 40 𝑚S‬‬
‫𝑣𝑚 ‪25‬‬ ‫𝑇𝑉‬ ‫𝑣𝑚‪25‬‬

‫برای محاسبه خروجی از دو روش می توان استفاده نمود‪:‬‬

‫الف‪:‬‬
‫)𝑥( ‪2𝐼1‬‬ ‫‪2𝐼1 10‬‬
‫𝐶𝐷𝐼 = ‪𝑖𝑐 𝑤0‬‬ ‫∗ 𝐴𝑚‪cos 𝑤𝑡 = 1‬‬ ‫𝑡 ‪cos 107‬‬
‫)𝑥( ‪𝐼0‬‬ ‫‪𝐼0 10‬‬
‫𝑡 ‪𝑖𝑐 𝑤0 = 1𝑚𝐴 ∗ 1.897 cos 107‬‬

‫‪𝑣𝑜= 𝑉𝐶𝐶 - 𝑅. 𝑖𝑐 𝑤0 = 5 −2𝑘 ∗ 1.891‬‬

‫‪7 𝑚𝐴 cos 107 𝑡 = 5 −3.789 cos 107‬‬
‫ب‪:‬‬
‫از روی جدول‬ ‫)𝑥( 𝑚𝐺‬
‫‪𝑥 = 10‬‬ ‫‪= 0.19‬‬ ‫‪𝐺𝑚 𝑥 = 0.19 ∗ 40 = 7.6 𝑚 S‬‬
‫و منحنی ضمیمه‬ ‫𝑚𝑔‬
‫]𝑣[ 𝑡 ‪𝑣𝑜 = 𝑉𝐶𝐶−𝐺𝑚 𝑥 . 𝑅. 𝑣𝑖 = 5 −7.6𝑚S 2𝑘Ω . 250𝑚𝑣 cos 107 𝑡 = 5 −3. 8 cos 107‬‬
 ‫)‪𝐼2 (10‬‬ ‫‪2281.5‬‬
‫= 𝐼‪𝐷2‬‬ ‫= ‪∗ 100‬‬ ‫‪∗ 100 = 85.417 %‬‬
‫)‪𝐼1 (10‬‬ ‫‪2671‬‬

‫)‪𝐼3 (10‬‬ ‫‪1758.4‬‬

‫= 𝐼‪𝐷3‬‬ ‫= ‪∗ 100‬‬ ‫‪∗ 100 = 65.833 %‬‬
‫)‪𝐼1 (10‬‬ ‫‪2671.0‬‬

‫‪𝑄𝑡 = 𝑅. 𝐶. 𝑤0 = 2𝑘 ∗ 1000𝑝 ∗ 107 = 20‬‬

‫‪1‬‬ ‫𝑛‬ ‫‪𝐼2 10‬‬ ‫‪1 2‬‬
‫= 𝑣‪𝐷2‬‬ ‫‪∗ 2‬‬ ‫∗‬ ‫= ‪∗ 100‬‬ ‫‪∗ ∗ 85.417 = 2.847 %‬‬
‫‪𝑄𝑡 𝑛 − 1 𝐼1 10‬‬ ‫‪20 3‬‬
‫‪1‬‬ ‫‪3‬‬ ‫‪𝐼3 10‬‬
‫= 𝑣‪𝐷3‬‬ ‫∗‬ ‫∗‬ ‫‪∗ 100 = 1.234 %‬‬
‫‪20 9 − 1 𝐼1 10‬‬

‫از روی جداول ضمیمه‬

‫‪𝑥 = 10‬‬ ‫‪𝐷 𝑥 = 𝐷 10 = 0.642‬‬

‫)𝑥(𝐷‬ ‫‪0.642‬‬
‫= 𝐷𝐻𝑇 ‪%‬‬ ‫= ‪∗ 100‬‬ ‫‪∗ 100 = 3.21 %‬‬
‫𝑡𝑄‬ ‫‪20‬‬
 ‫تمرین‪ :‬در شکل زیر ولتاژ ورودی و خروجی را محاسبه کنید‬
‫‪i‬‬
‫𝑡 ‪u cos 𝑤0‬‬
‫𝐴𝑚‪𝑖s= 10‬‬

‫𝑚‪2‬‬
‫𝐴𝑚‪𝐼𝑘 = 2‬‬ ‫= ‪is‬‬
‫𝑄𝑑𝑚𝑔‬ ‫‪= 20 𝑚S‬‬
‫𝑚‪4 ∗ 25‬‬

‫𝐴𝑚 ‪𝐼1 = 𝐼2 = 1‬‬

‫‪𝛽 = 100‬‬
‫𝑒𝑖‪𝑉𝐶𝐶ℎ‬‬ ‫‪1‬‬ ‫=‬
‫𝑇𝑉𝛽‬
‫‪= 2.5 𝑘Ω‬‬
‫‪𝐼1‬‬

‫‪𝑅𝑖𝑛 = 2 ℎ𝑖𝑒 = 5 𝑘Ω‬‬ ‫𝑘 ‪𝑅′ 𝑖 = 80‬‬

‫‪80‬‬
‫∗ 𝑖 = ‪𝑣𝑖 ′‬‬ ‫𝑣𝑚 ‪= 10 𝑢𝐴 ∗ 40𝑘 = 400‬‬
‫‪2‬‬
‫‪𝑣𝑖 ′‬‬ ‫‪𝑣𝑖 100‬‬
‫= 𝑖𝑣‬ ‫𝑣𝑚 ‪= 100‬‬ ‫=𝑥‬ ‫=‬ ‫‪=4‬‬
‫‪4‬‬ ‫𝑇𝑉‬ ‫‪25‬‬

‫از جدول‬ ‫)𝑥( 𝑑𝑚𝐺‬

‫‪= 0.5586‬‬ ‫‪𝐺𝑚𝑑 𝑥 = 0.5586 ∗ 20 𝑚 = 11.172 𝑚s‬‬
‫𝑄𝑑𝑚𝑔‬

‫𝑡 ‪𝑣𝑜 = 𝑉𝑐𝑐 + 𝐺𝑚𝑑 𝑥 ∗ 𝑅𝑐 ∗ 𝑣𝑖 cos 𝑤0‬‬

‫𝑡 ‪𝑣𝑜 = 12 + 11.722𝑚 ∗ 2𝑘 ∗ 100𝑚 cos 𝑤0 𝑡 = 12 + 2.344 cos 𝑤0‬‬

 ‫‪10−0.7‬‬
‫= 𝐶𝐷𝐼‬ ‫𝐴𝑚 ‪= 4.65‬‬ ‫تمرین‪ :‬در شکل زیر ولتاژ خروجی را محاسبه کنید‬
‫𝑘‪2‬‬

‫‪260‬‬
‫𝑣𝑚 ‪𝑣𝑖 = 260‬‬ ‫=𝑥‬ ‫‪= 10‬‬
‫‪26‬‬
‫∞‬
‫)𝑥( 𝑛𝐼 𝑛 )‪( −1‬‬
‫‪𝐼𝐸 𝑡 = 𝐼𝐷𝐶 1 + 2‬‬ ‫𝑡 ‪cos 𝑛𝑤0‬‬
‫)𝑥( ‪𝐼0‬‬
‫‪𝑛=1‬‬

‫‪1‬‬ ‫‪1‬‬
‫= ‪𝑤0‬‬ ‫=‬ ‫‪= 2 ∗ 107‬‬
‫𝐶𝐿‬ ‫‪2.5 ∗ 10−6 ∗ 10−9‬‬

‫از جدول‬ ‫)‪2𝐼2 (10‬‬

‫‪= 1.6806‬‬
‫)‪𝐼0 (10‬‬

‫‪ :‬هارمونیک دوم‬
‫𝑡 ‪𝐼𝐸 = 4.557𝑚 ∗ 1.6806 cos 2 ∗ 107 𝑡 = 7.658𝑚 cos 2 ∗ 107‬‬

‫)𝑡 ‪𝑣𝑜 𝑡 = 10 − 7.658𝑚 ∗ 1𝑘 ∗ cos(2 ∗ 107 𝑡) = 10 − 7.658cos(2 ∗ 107‬‬

 2.15 MOS Stage Large-Signal Transconductance 83

2.15 MOS Stage Large-Signal Transconductance

In a similar derivation, it is possible to compute the large-signal transconductance of a
MOS transistor having its I −V characteristics. This point is shown in Figure 2.69.
A MOS tuned amplifier stage is depicted in Figure 2.70. We assume a large signal
is applied to the gate input. The large capacitors CG and CS are considered as AC
short-circuit at the RF carrier frequency. The output RLC circuit is considered to have
a high quality factor and is tuned to the carrier frequency.
Assuming above the threshold bias voltage and a square law characteristics in
the saturation region, one can compute the drain source current from the square law
characteristics:

IDS = k(VGS −VTH )2 (2.165)

ID

VGS
VTH
I
Gm1= ~D1
VGS

Figure 2.69: Typical I−V characteristic of MOS transistor (ṼGS is the gate–
source’s AC voltage phasor).
84 Chapter 2. Oscillators

VDD

VGG CL RL LL

RFC
Vout
M
+
CG VGS0 -
V1cos(ωt)
I0 CS

Figure 2.70: Constant current MOS stage tuned amplifier for computation of
the large-signal transconductance.

The drain–source DC current at the bias voltage is

IDS0 = k(VGS0 −VTH )2 (2.166)
The small-signal transconductance can be computed as
gm = 2 k (VGS0 −VTH ) (2.167)
The total drain–source current under the large-signal excitation can be computed as
iDS = k(VGS0 −VTH +V1 cos (ω0t))2 (2.168)
The DC, the fundamental, and the second harmonic currents are obtained as
V12 V2
 
2
iDS = k (VGS0 −VTH ) + + 2 k (VGS0 −VTH )V1 cos (ω0t) + k 1 cos (2ω0t)
2 2
(2.169)
Now, neglecting the second harmonic, one can express the output drain–source
current as
 
2 (VGS0 −VTH )V1 cos (ω0t) 
iDS ≈ I0 1 + h (2.170)

V2
i 
(VGS0 −VTH )2 + 21

where I0 is the current source’s bias current. Now, the large-signal transconductance is
defined as
 
I1 2 (VGS0 −VTH )
Gm = = I0  h (2.171)
 
V12
i
V1 (V −V ) + 2
GS0 TH 2
2.15 MOS Stage Large-Signal Transconductance 85

1
0.9
0.8

Gm(x)/gm
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0

0.5

1.5

2.5

3.5

4.5

5
x=V1/(VGS0-VTH)

Figure 2.71: Normalized transconductance variations of a MOS tuned amplifier

stage as a function of the normalized input voltage.

The normalized large-signal transconductance becomes

Gm I0
= h (2.172)
V2
i
gm k (VGS0 −VTH )2 + 21

Or in another form

Gm I0
= (2.173)
V12
h i
gm 2
k(VGS0 −VTH ) 1 +
2(VGS0 −VTH )2

Given the fact that at the operating point, one can write

I0 ≈ k(VGS0 −VTH )2 (2.174)

The normalized large-signal transconductance is simplified to the following

Gm 1
=h (2.175)
V12
i
gm 1+
2(VGS0 −VTH )2

V1
Let x = VGS0 −VTH ,

Gm (x) 1
= 2 (2.176)
gm 1 + x2

The normalized MOS stage transconductance is depicted in Figure 2.71.

This large-signal transconductance can be employed in the MOS oscillator circuit
design/analysis for computation of the amplitude of oscillation.
 86 Chapter 2. Oscillators

2.16 Differential MOS Stage Large-Signal Transconductance

A differential MOS tuned amplifier is depicted in Figure 2.72.
Considering a square law transfer characteristic of the MOS transistors and assum-
ing that the differential voltage is equally divided between the pair of transistors (at
least for a limited range of differential voltage), one can write
 v 2 v
I1 = k VGS0 −VTH + for   < |VGS0 −VTH | (2.177)
 
2 2

 v 2 v
I2 = k VGS0 −VTH − for   < |VGS0 −VTH | (2.178)
 
2 2
Then

2
I1 VGS0 −VTH + 2v
=
2 (2.179)
I2 VGS0 −VTH − 2v

Given

I1 + I2 = I0 (2.180)

The difference in current becomes

I1 − I2 = 2 k (VGS0 −VTH ) v (2.181)

The normalized difference current can be calculated as

∆I (VGS0 −VTH ) v
= 2 (2.182)
I0 (VGS0 −VTH )2 + v4

VDD

LL RL CL CL RL LL

I1 I2
Vout
+
M1 M2
+
v

I0

Figure 2.72: A differential MOS pair tuned amplifier.

2.16 Differential MOS Stage Large-Signal Transconductance 87

iD2/I0 1
iD1/I0
0.9
0.8
0.7
0.6
I/I0
0.5
0.4
0.3
0.2
0.1
-2.5

-2

-1.5

-1

-0.5

0.5

1.5

2.5
V/(VGS0-VTH)
Figure 2.73: Variations of the differential pair drain currents as a function of
the normalized differential voltage in a MOS differential pair.

Either of the drain currents can be expressed as

 
v
I0  VGS0 −VTH
I1 = 1+  (2.183)
2 v2
1+ 2
4(VGS0 −VTH )

 
v
I0  VGS0 −VTH
I2 = 1−  (2.184)
2 v2
1+ 2
4(VGS0 −VTH )

The normalized difference current can be expressed as

v
(VGS0 −VTH )
∆iDD = I0 (2.185)
v2
1+
4(VGS0 −VTH )2

This model describes approximately the nonlinear behavior of a differential MOS

transistor pair. The variations of a real differential pair drain currents as a function of
the differential input voltage are depicted in Figure 2.74. Although the mathematical
expressions are quite different, it is noticeable that these currents’ variations are quite
similar to those of the bipolar differential pair.  
Note that Equations 2.183 through 2.185 are valid for  VGS0 v−VTH  ≤ 2. If VGS0 v−VTH >
 

2, then I1 = I0 and I2 = 0, and if VGS0 v−VTH < −2, then I1 = 0 and I2 = I0 . As such, a
nonlinear transfer characteristic has been specified for a MOS differential pair for the
whole span of possible input voltages.
The differential pair small-signal transconductance becomes

I0
gmd = (2.186)
VGS0 −VTH
88 Chapter 2. Oscillators

For large-signal AC drive, we can extract the large-signal transconductance of the

differential MOS stage:
V1 cos(ωt)
(VGS0 −VTH )
∆iDD = I0 (2.187)
V1 2 cos2 (ωt)
1+
4(VGS0 −VTH )2

Defining the normalized AC input voltage as

V1
x= (2.188)
VGS0 −VTH

The harmonic components of the large-signal output current can be computed as

1 x cos θ
Z π
bn (x) = 2 cos nθ dθ (2.189)
π −π 1 + x4 cos2 θ

Care should be taken that these computations are valid for x ≤ 2. Note that given
the fact that the differential MOS pair transfer characteristic has an odd symmetry,
bn (x) functions would be zero for even values of n. The fundamental harmonic current
becomes

I1 = I0 b1 (x) (2.190)

Now the large-signal differential transconductance can be calculated as

I1 I0 b1 (x) b1 (x)
Gmd (x) = = = gmd (2.191)
V1 (VGS0 −VTH ) x x

1
0.9
Gmd(x)/gmd

0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0

0.5

1.5

2.5

3.5

4.5

x=V1/(VGS0-VTH)
Figure 2.74: Normalized transconductance variations of a MOS differential
tuned amplifier stage as a function of the normalized input voltage.
2.17 An Oscillator With a Hypothetical Model 89

or

Gmd (x) b1 (x)

= (2.192)
gmd x

For the case where the large input signal does not satisfy the condition x ≤ 2, the
transistor pair drains would switch between zero and I0 . As such, the first harmonic
currents would have a value as
4
I1 = I0 (2.193)
π
The large-signal transconductance becomes
I0
I1 4 I0 4 VGS0 −VTH 4
Gmd (x) = ≈ = V1
= gmd (2.194)
V1 π V1 π VGS0 −VTH
πx

or

Gmd (x) 4
≈ (2.195)
gmd πx
√
This is valid for x ≥ 2 2.
As such, the overall normalized differential MOS stage transconductance is de-
picted in Figure 2.74.
This large-signal transconductance can be employed in the differential MOS
oscillator circuit design/analysis for computation of the amplitude of oscillation.