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Experiment No.

08

To study the operation of diode voltage multipliers circuits

OBJECTIVE
 Construction and modeling of the half-wave voltage doubler
 Construction and modeling of the full-wave voltage doubler
 Construction and modeling of the voltage triplers
 Construction and modeling of the voltage quadruplers

EQUIPMENT REQUIRE
Instruments: Components:
 Oscilloscope
 Function Generator Diode: 1N4007
 DMM Capacitors
THEORY
Voltage multipliers use clamping action to increase peak rectified voltages without the necessity
of increasing the transformer’s voltage rating. Multiplication factors of two, three, and four are
common. Voltage multipliers are used in high-voltage, low-current applications such as cathode-
ray tubes (CRTs) and particle accelerators.

Voltage Doubler

Half-Wave Voltage Doubler


A voltage doubler is a voltage multiplier with a multiplication Factor of two. A half-wave
voltage doubler is shown in Figure 1. During the positive half-cycle of the secondary voltage,
diode D1 is forward-biased and D is reverse-biased. Capacitor C1 is charged to the peak of the
secondary voltage (Vp2) less the diode drop with the polarity shown in part (a). During the
negative half-cycle, diode D2 is forward-biased and D1is reverse-biased, as shown in part (b).
Since C1can’t discharge, the peak voltage on C adds to the secondary voltage to charge C2 to
approximately 2V . Applying Kirchhoff’s law around the loop as shown in part (b), the voltage
across C2 is

Electronics Devices and Circuits Lab Manual


Figure 1
Under a no load condition, C2 remains charged to approximately 2Vp.If a load resistance is
connected across the output, C2 discharges slightly through the load on the next positive half
cycle and it again recharge to 2Vp on the following negative half cycle. The resulting output is
half wave, capacitor filtered voltage. The peak inverse voltage across each diode is 2Vp. If the
diode were reversed, the output voltage across C 2 would have the opposite polarity.

Full-Wave Voltage Doubler


A full-wave doubler is shown in Figure 2. When the secondary voltage is positive, D1is forward-
biased and C1 charges to approximately Vp , as shown in part (a). During the negative half-cycle,
D2 is forward-biased and C2 charges to approximately Vp, as shown in part (b). The output voltage,
2Vp, is taken across the two capacitors in series.

Figure 2

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Voltage Tripler

The addition of another diode-capacitor section to the half-wave voltage doubler creates a
voltage tripler, as shown in Figure 3. The operation is as follows: On the positive half-cycle of
the secondary voltage, C1 charges to Vp through D1. During the negative half cycle, C2 charges
to 2Vp through D2, as described for the doubler. During the next positive next positive half-
cycle, C3 charges to 2Vp through D3. The tripler output is taken across C1 and C3, as shown in
the figure.

Figure 3

Voltage Quadrupler

The addition of still another diode-capacitor section, as shown in Figure 4, produces an output
four times the peak secondary voltage. C4 charges to 2Vp through D4 on a negative half-cycle.
The 4Vp output is taken across C2 and C4, as shown. In both the tripler and quadrupler circuits,
the PIV of each diode is 2Vp.

Figure 4

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PROCEDURE:
PART 1: Half wave voltage doubler.
a) Construct the limiting circuit as shown in Figure-5. Give the sinusoidal input voltage with
peak value.

Figure- 5
b) Using oscilloscope, obtain the waveform for Vout and trace on Figure-6.

Figure- 6

PART 2: Full wave voltage Doubler;

a) Construct the limiting circuit as shown in Figure-7. Give the sinusoidal input voltage with
peak value.

Figure- 7

Electronics Devices and Circuits Lab Manual


b) Using oscilloscope, obtain the waveform for Vout and trace on Figure-7

Figure- 7

PART 3: Voltage Tripler;


a) Construct the limiting circuit as shown in Figure-8. Give the sinusoidal input voltage with
peak value.

Figure- 8
b) Using oscilloscope, obtain thewaveform for Vout andtrace on Figure-8.

Electronics Devices and Circuits Lab Manual


Figure- 8

PART 4: Voltage Quadrupler.


a) Construct the limiting circuit as shown in Figure-9. Give the sinusoidal input voltage with
peak value.

Figure- 9
b) Using oscilloscope, obtain the waveform for Vout and trace on Figure-9.

Figure- 9

Electronics Devices and Circuits Lab Manual


CONCLUSION

Activity Name  Experiment No


Group No. Section
Student Roll No.

C P Domain Awarded Score (out of 4 for each cell)
L L + Beginning Developing Exe mplary
O O Taxonomy (1) (2) Accomplished (4)
Student is With (3) Student is
unable to instructor/ With able to
design supervisor’s instructor/ independentl
systems, guidance, supervisor’s y design
No. Criteria components student is able guidance, systems,
and/or to partially student is able components
processes to design
to fully design and/or
meet systems,
specificatio components systems, processes to
ns despite and/or components meet
instructor/ processes to and/or specification
supervisor’s meet processes to s without
guidance. specifications. meet instructor/
specifications. supervisor’s
guidance.

1 4 5 P2 O perational Skills for Hardware/Software


equipment and involved components
Effe ctively document/ communicate performed
2 5 10 A3 activities

Signature With Date: ____ _

Electronics Devices and Circuits Lab Manual

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