S.

NO DATE OF THE NAME OF THE EXPERIMENT DATE OF

EXPERIMENT SUBMISSION

1 20/12/23 Generate the following waveforms 27/12/23

(i) Sinusoidal waveform of Fundamental Frequency
(50Hz)

(ii) (ii) 3 rd Order, 5 th Order and 7 th Order

Harmonics for the Fundamental frequency.

2 27/12/23 Simulation of RLC series and RLC Parallel Response 30/12/23

Circuits

3 30/12/23 Step Response of RL and RC Series Circuit. 03/1/24

4 03/1/24 Simulation of Mesh and Nodal analysis for DC 10/1/24

Circuits.

5 10/1/24 Verification of Superposition Theorem. 24/1/24

6A 24/1/24 Verification of Thevenin’s Theorem 31/1/24

6B 24/1/24 Verification of Norton’s Theorem 31/1/24

7 31/1/24 Verification of Maximum Power Transfer Theorem. 07/2/24

8A 07/2/24 Simulation of Full Wave Rectifier (Center Tapped 14/2/24

and Bridge) with RL load.

8B 07/2/24 Simulation of Full Wave Rectifier (Center Tapped 14/2/24

and Bridge) with RL load.

9 14/2/24 Simulation of Single-Phase Half Wave Controlled 21/2/24

Converter with RL Load and FreeWheeling Diode.

10 21/2/24 Simulation of Single-Phase Full Wave Controlled 28/2/24

Converter with RL Load and FreeWheeling Diode.

11 28/2/24 Simulation of Three Phase Star Connected Balanced 06/3/24

and Unbalanced Load

12 06/3/24 Simulation of Three Phase Delta Connected 13/3/24

Balanced and Unbalanced Load

13 13/3/24 Simulation of Three Phase Non-Linear Star 20/3/24

 Connected Load with Three Phase 3 WireSystem

14 13/3/24 Simulation of Three Phase Non-Linear Star 20/3/24

Connected Load with Three Phase 4 Wire System.

15A 20/3/24 Simulation basic Logic Gates, Universal Logic Gates 25/3/24

15B 20/3/24 Simulation of Realization of Logic Gates 25/3/24

usingUniversal Logic Gates.

16 20/3/24 Simulation of Half Adders and Full Adder. 25/3/24