UMBB/IGEE EE242/ L04

Recitation #0
#09

Exercise n°1:
n° :

Given the characteristics of Fig.1a:

Fig.1
1. What is the type of the JFET used in this figure? What are the values of IDSS and VP?
Fig.1 Determine VDS for VGS =00 V and ID =4.5
2. Using the characteristics of Fig.1a, 4.5 mA and calculate the
resistance r0 of the JFET for the region ID = 0 to 4.5 mA (VGS =0 V).
3. Determine VDS for VGS =-2V 2V and ID =1.5
.5mA
mA and calculate the resistance rd for the region ID = 0
to 1.5 mA (VGS =--2V).
Compute the resistance rd using the voltage controlled resistor’s equation:
equation
Does this equation appear to be a valid approximation?

4. Sketch the transfer characteristics directly from the drain characteristics (in Fig.1b).
Now, sketch the transfer characteristics using Shockley’s equation. Compare those characteristics.
Are there any major differences?
5. Define the region of operation for this JFET if VDSmax
max = 20 V and PDmax =120 mW.

Fig.1b
Fig.1a

Exercise n°2:
n° : Fig.2
For the fixed-
fixed-bias
bias configuration of Fig. 2,, determine:
a)) IDQ and VGSQ using a purely mathematical approach.
b)) Repeat part (a) using a graphical approach and compare results.
c)) Find VDS, VD, VG, and VS using the results of part (a).

1
Exercise n°3:
For the voltage-divider biasing configuration of Fig. 3: R1=910k, R2=110k, RD=2.2k, RS=1.1k.
a) Determine: VG, IDQ and VGSQ, VD and VS, VDSQ.
b) What is the effect of a smaller RS (RS =0.51 k) on IDQ and VGSQ?
c) What is the minimum possible value of RS for this circuit?
Exercise n°4:
For the Fixed-bias configuration of Fig.4, determine: ID, VDS, VD and VS. RD=2.2k, RS=0.68k.
Exercise n°5:
For the common gate network of Fig. 5, determine: IDQ, VGSQ, VDS and VS.

Fig.3 Fig.4 Fig.5

Exercise n°6:
For the combination network of Fig. 6, determine: (With =100)
VB ,VG , VE, IE, IC, ID, IB, VC, VS, VD, VCE and VDS.

Exercise n°7:
For the networks of Fig. 7a and Fig.7b, determine: IDQ, VGSQ, VDS , VS and VD.

Fig .6 Fig .7a Fig .7b