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Power System Protective Relaying-Part Four
Power System Protective Relaying-Part Four
6 * 10 6
I load 3
100.4 A
3 * 34.5 * 10
100.4
I CT 2.51A
(200 / 3-A
For this example, 5) TS was selected for B3 relay.
Basic Design Principles
Example: Time-overcurrent relays for radial
system protection
Calculation and coordination
For CT at B2, the maximum CT secondary current for
maximum load is:
(6 4) * 10 6
I load 3
167.35 A
3 * 34.5 * 10
167.35
I CT 4.18 A
(200 / 5)
For this example, 5-A TS was selected for B2 relay.
Basic Design Principles
Example: Time-overcurrent relays for radial
system protection
Calculation and coordination
For CT at B1, the maximum CT secondary current for
maximum load is:
(6 4 11) * 10 6
I load 3
351.43 A
3 * 34.5 * 10
351.43
I CT 4.39 A
(400 / 5)
For this example, 5-A TS was selected for B1 relay.
Basic Design Principles
Example: Time-overcurrent relays for radial
system protection
Calculation and coordination
The largest fault current through B3 is 2000A. (Fault at right
of B3)
Ignore CT saturation, the fault-to-pickup current ratio at B3 is
2000/(40*3)=16.67
Since the speed of operation is the main concern, 0.5 Time-
Dial setting (TDS) is selected.
Under this fault current, the operating time of B3 is 0.05
second
Basic Design Principles
Example: Time-overcurrent relays for radial
system protection
Calculation and coordination
Adding the breaker operating time (0.083 second), primary
protection needs 0.113 second (0.05 + 0.083) to clear this
fault.
For the same fault, the fault-to-pickup current ratio at B2 is
10.0. (2000/40*5)
Adding the B3 relay operating time, breaker operating time,
and 0.3 second coordination time interval, the B2 relays
operating time should be 0.43 seconds.
Select TDS=2 for the B2 relay.
Basic Design Principles
Example: Time-overcurrent relays for radial
system protection
Calculation and coordination
The largest fault current through B2 is 3000A. The fault-to-
pickup ratio for B2 is 15.
The operating time of B2 relay under this fault current is 0.38
seconds.
For the same fault, the fault-to-pickup ratio of B1 relay is 7.5.
Adding the B2 relay operating time, breaker operating time,
and 0.3 second coordination time interval, the B1 relays
operating time should be 0.76 seconds (0.38+0.3+0.083).
Select TDS=3 for B1 relay. [Confirm this results with Min.
fault current]
Basic Design Principles
Instantaneous current-voltage relays
Basic Design Principles
Directional sensing power relay
Basic Design Principles
Polar unit
Basic Design Principles
Phase distance relay
Balance beam type
Basic Design Principles
Phase distance relay
Distance relay characteristics on the R-X diagram
Z R Z R
Z (Typo in the book)
2 2
where
ZR
is the offset from the origin
2
Z R
2 is the radius from the offset point
(Typo in the book)
Vzy
Basic Design Principles
Ground distance relays
Consider a phase-a-to-ground fault on a line with Z1L and
Z0L as the positive and zero sequence line impedance and n
is the location of the fault from the relay. The fault currents
through the relay are I0, I1, and I2. Then for a fault at nZ1L
with a single-phase unit:
Vag nZ 1L ( I 1 I 2 ) nZ 0 L I 0
(typo)
Ia I1 I 2 I 0
For voltage compensation, subtract out nZ1L(I1+I2) and use I0 (not
Ia), then:
Vag nZ 1L ( I 1 I 2 ) nZ 0 L I 0
ZR nZ 0 L
I0 I0
Basic Design Principles
Ground distance relays
For current compensation, let nZ0L=pnZ1L (p=Z0L/Z1L). Then
Vag nZ 1L ( I 1 I 2 ) pnZ 1L I 0 nZ 1L ( I 1 I 2 pI 0 ) nZ 1L ( I a ( p 1) I 0 )
Z R'
Ia I1 I 2 I 0 I1 I 2 I 0 I1 I 2 I 0
Vag
ZR nZ 1L
I a mI 0
Z 0 L Z 1L
where m
Z 1L
Basic Design Principles
Ground distance relays
Considering fault resistance and mutual coupling from an
adjacent parallel line, the complete formula for current
compensated single-phase ground distance relay is:
Vag 3I 0
ZR nZ 1L R fault
I relay I
relay (typo)
( Z 0 L Z 1L )
Ia I0
Z 1L
I relay
I Z
1 0E 0M
I 0 Z 1L
where I0E is the zero sequence current in the parallel line and Z 0M is the
mutual coupling impedance between two lines.
Microprocessor Based System
Protection
Introduction
In the Utility Industry, Regardless Their Operation
Mechanisms, the Protective Relays are
Categorized and Evaluated by Their Functions.
Same Test Procedures are Applied to a Group of
Relays With the Same Protective Function.
The Performance of a Microcomputer Based Relay
Depends on the Hardware Design, the Accuracy of
the Input Signals, and the Algorithms Embedded
Inside the Unit
Introduction
EachVendor Has Its Own Hardware Selection and
Software Design Preference. Therefore, the
Physical Capability and Constraints of a
Microcomputer Based Relay Are Different from
Vendor to Vendor Even with Similar Protective
Functions
General Structure of a Microcomputer
Based Relay
SUBSTATION & SWITCH YARD
Current & Voltage Contacts I/P Contacts O/P
Memory Subsystem
Memory Types
Read Only Memory (ROM): It is designed to
permanently store a fixed program which is not
alterable. It can only be programmed once and requires
special equipment to program the chips (Most of them
are pre-programmed by manufacturers). The
information is preserved even without power.
Hardware Design Consideration
Memory Subsystem
Memory Types
Random Access Memory (RAM): It is designed so that
information can be written into or read from any unique
location. There are two types of RAM: Static RAM and
Dynamic RAM. RAM does not retain its contents if
power is lost.
Hardware Design Consideration
Memory Subsystem
Memory Types
Programmable Read Only Memory (PROM): The
characteristics of PROM is similar to ROM except that
it is user programmable.
Hardware Design Consideration
Memory Subsystem
Memory Types
Erasable Programmable Read Only Memory
(EPROM): The EPROM is a specially designed PROM
that can be reprogrammed after being entirely erased
with the use of ultra-violet (UV) light source. The
EPROM can be considered as a semi-permanent data
storage device.
Hardware Design Consideration
Memory Subsystem
Memory Types
Non-Volatile Random Access Memory (NOVRAM):
Combination of RAM and EEPROM on a single chip.
This chip can protect data against power failure.
Hardware Design Consideration
Hardware Design Consideration
Usage of Memory
Real-Time Data and Pre/Post-Fault Recorder:
RAM
Program Memory: ROM, PROM, EPROM, or
Combination of RAM and EPROM
Settings: Flash Memory or EEPROM
Hardware Design Consideration
Signal Conditioning
The Outputs of the PT and CT Require Auxiliary
Transformers or Divider Circuits to Convert
Current and Voltage Signals Into Low Level
Voltage Signals Before They Can be Processed
-50
Q=10
-100
o Frequency (rad/sec)
Hardware Design Consideration
Q=10
Q=1
0
Q=5
-90
o Frequency (rad/sec)
Hardware Design Consideration
1st Order
-50
2nd Order
3rd Order
-100
c Frequency (rad/sec)
Hardware Design Consideration
-90
1st Order
-180 2nd Order
M M
U A/D U S/H A/D
X X
(a) (b)
(c) (d)
Hardware Design Consideration
Output
Desired Output
x
x Actual
Output
Quantization
Error
x
Offset
Error
10% 50% 90%
Input
Hardware Design Consideration
Programming Languages
Execution Speed
Portability
Upgrade
Graphical User Interface (GUI)
Software Implementation Considerations
Computation Algorithms
Digital Filtering
Non-Recursive Filter
Ym X m X m 2 3, 9,
Ym X m X m 2 DC, 6, 12,
Ym X m 3 X m1 X m2 5, 7, ...
Software Implementation Considerations
Computation Algorithms
Digital Filtering
Recursive Filter
Kalman Filter
Fast Fourier Transform
Curve Fitting
Walsh Filter
Software Implementation Considerations
Computation Algorithms
Convergence of a Recursive Filter
Software Implementation Considerations
Computation Algorithms
Convergence of a Recursive Filter
Software Implementation Considerations
Computation Algorithms
Magnitude Calculation
|V |2 vm2 vm2 3
|V |2 ( vm2 vm2 1 2vm vm1 cos T ) / sin 2 T
Software Implementation Considerations
Computation Algorithms
Phase Calculation
W2
W1
Software Implementation Considerations
Computation Algorithms
Calculation Algorithms
Computation Algorithms
Decision Making Process
Trip After One Violation
Trip After Several Consecutive Violations
Trip After Majority Violation of N Consecutive
Samples
Similar Conditions Also Apply to Reset Procedure
Software Implementation Considerations
Computation Algorithms
Auto Execution, Watch Dog Timer, and Self
Diagnostic
Auto Execution After Power Failure
Watch Dog Timer to Protect Against Software Failure
Software Implementation Considerations
Computation Algorithms
Auto Execution, Watch Dog Timer, and Self
Diagnostic
Self Diagnostic to Protect Against Hardware Failure.
Frequency of Self Diagnostic Function
Completeness of the Diagnostic Function
Failure Isolation and Indication
Software Implementation Considerations
I=01101100
J=11000100
d(I, J) = 3
Software Implementation Considerations
Error Checking
Distance and error detection/correction
ArtificialIntelligence
Multiple Function Relays
Common Hardware Configuration
Software (Firmware) Driven Protective
Function(s)
Stronger Communication Capability
Serve as Pre-/Post-Fault Recorder