Professional Documents
Culture Documents
EE 401
WEEK 1 & 2
1
2
3
4
5
6
7
Fabrication of CMOS integrated
Circuits
• An IC consists of several patterned
layers of material that are used to form
transistors and provide
interconnections for the circuit
• Minimum Feature size currently is less
than 0.12µm which allows a packing
density of more than 100 million FETs
in a single IC package
8
Fabrication of CMOS integrated
Circuits
• Silicon ICs are created on large circular
sheets called ‘Wafers’
• These are 100 to 300mm in diameter
and about 0.4 to 0.7mm thick
9
10
Fabrication of CMOS integrated
Circuits
• Wafer Flats: used as a reference for
forming the wafer grids
• Additional Flats on a wafer would
contain codes that will keep the
information regarding the wafer and its
processing
• Processing/Manufacturing Capacity is
expressed in terms of Wafer Starts per
day/week/Month etc.
11
Fabrication of CMOS integrated
Circuits
• Fabrication Yield:
12
Fabrication of CMOS integrated
Circuits
• Die Area (Adie)=One critically important variable in
controlling yield
• The total number of die sites (NT) on a wafer are
given by:
13
Fabrication of CMOS integrated
Circuits
• Die Area (Adie)=One critically important variable in
controlling yield
• The total number of die sites (NT) on a wafer are
given by:
14
Fabrication of CMOS integrated
Circuits
• Larger the die area, Lesser the yield! Represented by
the following equation:
15
Fabrication of CMOS integrated
Circuits
16
Fabrication of CMOS integrated
Circuits
17
Fabrication of CMOS integrated
Circuits
• Economics of Silicon wafer processing
is a very important aspect.
Profit = Csell – C chip
18
Material Growth and Deposition
19
Silicon Dioxide (SiO2)
• A critically important material in IC processing
Properties:
- Excellent Electrical Insulator
- Exceptionally good Adhesive
properties
-Can easily be grown on the silicon wafer or deposited on
top of it
- Also called ‘Quartz Glass’ or simply ‘Glass’
20