Analog Electronics

Lecture -9
25-01-2020

BITS Pilani, K K Birla Goa Campus

Differential voltage-to-current converter

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Differential voltage-to-current converter
Writing KCL equations

V2  VL VL  VO

R R
V1 - VL VL  VO
and  IL 
R R

V1 - VL V2  VL
or  IL 
R R
V1 - V2
Hence I L 
R
and VO  2VL  V2

Thus the load current is proportional to (V1-V2)

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Constant high current source

VZ
 IE  IL
RS
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Digitally controlled 4-20 mA
current source

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Current-Controlled Current Source (CCCS)-
The Ideal Current Amplifier

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Current-Controlled Current Source (CCCS)-
The Ideal Current Amplifier

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Current-Controlled Current Source (CCCS)- The
Ideal Current Amplifier

Here IO = If + IS
Also If = Ii and
Vf = - IsR2 = - If R1

 Is   R1 
  
I o  I i  I s  I i 1    I i 1  
 Ii   R2 
R1
Therefore A i  1 
R2
Example: If R1=99 k and R2=1k Then IO=100 Ii.
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PRECISION RECTIFIERS

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PRECISION RECTIFIERS

 A Half-Wave rectifier (HWR) is a circuit that passes only a positive

(or only negative) portion of a wave, while blocking out other
portion.
 A full-Wave rectifier, besides passing the positive portion, inverts
and passes also the negative portion.
 The transfer characteristics is as shown below.

Half Wave rectifier Full-Wave rectifier

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Precision Circuits

Precision Half-Wave and Full-Wave Rectifier

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 V0A = V0+0.7 V V0A = -13.0 V

Equivalent circuit of HWR during (a) Positive Half

cycle (b) Negative Half cycle

Disadvantage: When Vi changes from negative to positve, its output

has to come out of saturation and swing all the way from -13 V to
V0A  Vi + 0.7 V

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 Precision Circuits

Precision Half-Wave rectifier with gain

1. During positive half cycle of the input, diode D is forward biased,

and the output V0= Vi( 1+R1/R2)
2. During the negative half cycle of the input, diode is revere biased,
and hence the output is zero.
3. If the polarity of the diode is reversed, then we get negative cycle
and positive half cycle will be clipped off.
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 Precision Circuits
Precision Half-Wave Rectifier using inverting configuration

• When Vi > 0, A positive input causes D1 to conduct, thus creating negative

feedback path around the opamp.
• Because of virtual ground point VN=0, the diode D1 clamps the output of
opamp to – VD1 =0.7 V
• D2 is off, the current through R2 is zero , hence V0 = 0
• When Vi<0, a negative input causes opamp output to swing positive, thus
turning D2 ON. But D1 is OFF, giving an output V0= -R2/R1 Vi.
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The direction of current during positive
half cycle

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The direction of current during
Negative half cycle

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 Precision Circuits
Precision Full-Wave Rectifier

During positive half cycle During negative half cycle

R6 R R6 R
V0  (Vi  2Vi )  Vi 6 V0   (Vi  0)  Vi 6
R4 R4 R4 R4

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Analog Electronics
Lecture -10
04-02-2020

BITS Pilani, K K Birla Goa Campus

BITS Pilani, K K Birla Goa Campus
BITS Pilani, K K Birla Goa Campus
Negative Clippers

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Negative Clippers

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Negative Clippers

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Positive Clippers

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Positive Clamper

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Positive Clamper

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Positive Clamper

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Biased Positive Clamper

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Negative Clamper

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Peak Detectors

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Analog Electronics
Lecture -11
06-02-2020

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Comparators and Schmitt Triggers
Comparators

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Comparators Applications
Voltage level detectors

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Comparators Applications
Zero-Crossing Detector

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Voltage Limiters

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Time Marker Generator

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IC COMPARATORS

 Response Time

 Positive output level

 Negative output level

 Strobe current

 Strobe release time

 Saturation voltage

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IC Comparators

Offset Balancing

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Analog Electronics
Lecture -12
08-02-2020

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Schmitt Triggers

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Schmitt Trigger Circuits

VUT 
R1
 Vsat 
R1  R2

VLT 
R1
 Vsat 
R1  R2

VH  VUT  VLT 
R1
 Vsat   Vsat 
R1  R2

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Schmitt Trigger Circuits

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 Schmitt Trigger Circuits

VUT 
R1
 Vsat   R2  Vref 
R1  R2 R1  R2


R1
 Vsat   R2  R1  R1  Vref 
R1  R2 R1  R2


R1
 Vsat   R1  Vref   Vref
R1  R2 R1  R2

 Vref  Vsat  Vref 

R1
R1  R2

VLT 
R1
 Vsat   R2  Vref 
R1  R2 R1  R2


R1
 Vsat   R2  R1  R1  Vref 
R1  R2 R1  R2
Vsat

R1
 Vsat   R1  Vref   Vref VH  VUT  VLT  2 R1
R1  R2 R1  R2 R1  R2
 Vref  Vsat  Vref 
R1
R1  R2
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Inductance Simulation

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 Inductance Simulation

Vi  Vo
I i  jC (Vi  V ) 
R2

R1Vi
V and Vo  V
1
R1 
jC

Combining these equations and solving for Zi=Vi / Ii,

R2 ( R1 R2 C 2 2  1) R2 C ( R1  R2 )
Zi   j Thus Zi is of the form Zi  R x  j  Lx
1   R2 C 1   R2 C
2 2 2 2 2 2

 Lx C ( R1  R2 )
Q factor of the inductor is, Q  
Rx R1 R2 C 2 2  1
Normally, R 1 is chosen such that R 1  R 2 The maximum value of Q is
1
1  R1  2 1
Q max    and it occurs at  
2  R2  C R 1R 2

For C=0.1 F, R1= 100 k, R2= 100 , L= 1 H, Qmax= 15.8 at 505 Hz.
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Measurement of L and Q

1 fo
fo  and Q
2 Lx C1 f

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 ANALOG SWITCH

• Electronic switches whose state is voltage-programmable

Applications:
• D-A converters
• Function generators
• S/H amplifiers
• Switching power supplies

(a) Ideal switch and (b) its characteristics

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ANALOG SWITCH
IDEAL SWITCH

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ANALOG SWITCH

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CMOS transmission gate

CMOS transmission gate and its resistance as a function of Vi

Examples: CD4066 quad bilateral switch

CD4051 eight channel multiplexer/demultiplexer
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ANALOG SWITCH
MOSFET SWITCH

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Analog Electronics
Lecture -13
13-02-2020

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 ANALOG SWITCH
OTHER SWITCH CONFIGURATIONS

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ANALOG SWITCH
SWITCH ARRANGEMENT

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 ANALOG SWITCH
APPLICATIONS OF ANALOG SWITCH

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 ANALOG SWITCH
APPLICATIONS OF ANALOG SWITCH

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Performance Characteristics of Analog Switches

 Vs, analog signal range

 Ron, on Resistance

 VAI,VAH, input thresholds

 IA, input leakage current

 TA, Ton, Toff, access time

 Topen, break-before-make delay

 CS(off),CD(off), CD(on), CDS(off),CA

 OFF Isolation
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 ANALOG SWITCH
SPST ANALOG SWITCH IC (MAX325)

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SPST ANALOG SWITCH IC (MAX325)

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BITS Pilani, K K Birla Goa Campus
SAMPLE-AND-HOLD CIRCUITS
BASIC CIRCUIT

   t 
Vd (t )  VA 1  exp 
  RC 

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SAMPLE-AND-HOLD CIRCUITS
BASIC CIRCUIT

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SAMPLE-AND-HOLD CIRCUITS
PERFORMANCE CHARACTERISTICS

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ANALOG MULTIPLEXERS
ANALOG MULTIPLEXING

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BITS Pilani, K K Birla Goa Campus
ANALOG MULTIPLEXERS
A TWO-CHANNEL ANALOG MULTIPLEXER

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 Differential Four Channel
Analog Multiplexer

Inhibit Digital Digital Values at

Input A Input B the output
0 0 0 0X, 0Y
0 0 1 1X, 1Y
0 1 0 2X, 2Y
0 1 1 3X, 3Y
1 X X None

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 Differential Four Channel Analog Multiplexer

Wide range of digital and analog signal levels

- Digital 3-20V
- Analog <=20 p-p
Low ON resistance 125 
High OFF resistance, leakage current 100 pA
Logic Level conversion for digital addressing signals of 3-20V
to switch analog signals to 20 V p-p (Vdd-Vee= 20V)
Very low power dissipation 0.2 W
Binary address decoding on chip
Input voltage range: VIH= 7V (min) and VIL= 3V (max)
Propagation delay 15 ns
Break –before-make switching eliminates channel overlap

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BITS Pilani, K K Birla Goa Campus
BITS Pilani, K K Birla Goa Campus
BITS Pilani, K K Birla Goa Campus
BITS Pilani, K K Birla Goa Campus
BITS Pilani, K K Birla Goa Campus
Analog Electronics
Lecture -14
15-02-2020

BITS Pilani, K K Birla Goa Campus

The Topics covered in this
session
 Logarithmic Amplifiers
 Analog Multipliers

 Application of Analog Multipliers

 Precision Circuits

 Comparators and Schmitt Triggers

 Analog Switch

 Sample and Hold Circuits

 Analog Multiplexers

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Log Amplifiers using Op-amp

  qV  
I C  I s exp BE   1
  kT  

  qV  
Vi   qV0 
V Therefore  exp 
I i  i  I s exp BE   1 Is R 1  kT 
R1   kT  
kT  Vi 
 qVBE    qV0  or V0   ln 
 I s exp   I s exp  q  Is R1 
 kT   kT 

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Antilog Amplifiers using Op-amp

Ii  Is

  qV  
I i  I s exp BE   1
  kT  
 qVBE    qVi  V0
 I s exp   I s exp 
 kT   kT  RF
  q 
Therefore V0  antilog  Vi  I s RF
  kT 
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Antilog Multipliers

K – multiplier scale factor

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Antilog Multipliers

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Classification of Multipliers

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Quarter Square Multiplier

1

xy   ( x  y ) 2  ( x  y ) 2
4


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Log-Antilog Multiplier

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Pulse Width Modulation
(PWM) Multiplier


1 A
V   Adt 
T 0 T

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Transconductance Multiplier

 qVBE  q
I C  I S exp  dIC  I C dVBE
 kT  kT
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IC Multiplier

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IC Multiplier

Output, W 
 X 1  X 2  Y1  Y2 
Z
10 V
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IC Multiplier

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Application of Analog Multiplier
1. Generation of Integer Powers

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 2. Frequency Multiplier

• A squarer circuit can be used as a frequency doubler.

• With input as A sin t, then output V0 is given by
2 2 2
A A A
V0  sin (t ) 
2
 cos 2t
K 2K 2K
3. Frequency Tripler
sin 3t  3 sin t  4 sin (t ) 3
- - - (1)
cos 3t  4 cos (t )  3 cost - - - (2)
3

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3. Frequency Tripler
sin 3t  3 sin t  4 sin3 (t ) - - - (1)
Design of frequency multiplier using eqn(1)
Let the full scale deflection 10V
Input is 10 sin ωt as Vx
Output 10sin3t as V0
3
V0 Vx  Vx 
 3  4 
10 10  10 
3 2
V0 3 4 V 3 4 Vx V
or  Vx   Vx  x x
10 10 10 100 10 10 10 10
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3. Frequency Tripler

V0 3 4 Vx Vx2
 Vx 
10 10 10 10 10
V0  R4 R2  R1 R2 Vx3  1
  Vx  
10  R3  R4 R1 R1 100  10
Comparing the two eqns we get
R2 R 2
 4 and 3 
R1 R4 3
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 4. Divider Circuits

V0Vx
The output of the multiplier is V1 
K
Applying KCL at the node E,
R1 VZ
V1 V V0   K
 z R2 Vx
R1 R2
VZ
If R 1  R 2 , V0   K
Vx
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 5. Square Root Extractor

R1 VZ R1
V0   K V0   K Vz
R2 V0 R2

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5. Root Mean Square Measurement

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6. Amplitude Modulation

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5. Amplitude Modulation

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Circuit for AM implementation

Writing KCL equation at Node A we get

 Vm E c cos c t 
  Vx mK  Vx - E c cos c t
 K 
(1  mK)Vx  mVm E c cos c t  E c cos c t
Also V0  (1  mK)Vx
Thus V0  mVm E c cos c t  E c cos c t
 (1  mVm )E c cos c t
Substituting Vm  E m cosm t
V0  (1  mE m cosm t) E c cos c t
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Circuit for AM Demodulation

SupposeV0 (t)  E0 cos(c  m )t  upper sideband component

Vy (t)  E y cosct - local oscillatorsignal
Then V0 (t) Vy (t)  0.5 E 0 E y cos m t  0.5 E 0 E y cos (2c  m )t

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