TASK

POLITEKNIK PENERBANGAN SURABAYA

CARD
Task Name : Logic Gate And Task No. . : B107/DGT-01 Laboratory : Digital Shop

Trainee Name : NIT : Date Practical:

Terminal Objective :

The operating characteristics of the AND gate and check the correctness of its Truth Table.

No. Enabling Objectives

1 Using applicable reference data instruction, understand the mentioned of reference data.

2 Using applicable tools/equipment to perform operating characteristics of the AND gate

AMTO QC-18-1 (09-19)

Re-issued 2 Rev. 0 Date: 09 September 2019 Page : 1 of 3

Jln. JemurAndayani I No 73 Wonocolo, Surabaya – East Jawa Phone: +62–31–8410871, 8472936,Fax: +62–31–8490005
Email: mail@poltekbangsby.ac.id Web: http://.poltekbangsby.ac.id
 TASK
POLITEKNIK PENERBANGAN SURABAYA
CARD
Task Card Objective

Using applicable reference task card, understand the mentioned of correct procedure in checklist.

Performance Guide:

Trainee Trainer
No. Code Learning Step / Trainee Prompt
Sign Sign

Check tools and prepared required tools

- Digital IC Trainer, DIC

- Jumper cables
1 P
- Multimeters
- TOOLSET
- IC 7408

2 P Switch on DIC experimenter

Check the power supply voltage is not more than 5 volts by

3 P
measuring it using a multimeter

4 P Switch off DIC experimenter

Install the IC on the bread board or on the uncommitted IC

5 P
base

Assemble the first gate. See the AND gate symbol in the
theory section. Inputs A and B are connected to available
switches among the 12 switches using jumper cables. The Y
6 P output is connected to the available LED indicator among the
12 existing LED indicators. Pin 14 of the IC is connected to the
positive 5V supply and pin 7 to the 0V supply or Ground.
Cross check the circuit is correct

7 O Switch on DIC experimenter

Re-issued 2 Rev. 0 Date: 09 September 2019 Page : 1 of 3

Jln. JemurAndayani I No 73 Wonocolo, Surabaya – East Jawa Phone: +62–31–8410871, 8472936,Fax: +62–31–8490005
Email: mail@poltekbangsby.ac.id Web: http://.poltekbangsby.ac.id
 Inputs A and B are signaled with a combination of 1 and 0 and
pay attention to the output response. The input is signaled 1
meaning that it is given a 5V dc voltage with the switch lever
pressed up. The input is given a signal of 0 meaning that it is
8 P
given a voltage of 0V dc with the switch lever pressed down.
The output response is said to be 1 when the LED indicator is
on and 0 when it is off. The input combinations should be
ordered as in the truth table

The results of the observations are written in the table

9 O
provided

10 P Repeat steps 6 to 9 for gates 2, 3 and 4

AMTO QC-18-2 (09-19)

Below is the symbol of the AND logic gate along with the expression of the algebraic equation and its truth
table

Re-issued 2 Rev. 0 Date: 09 September 2019 Page : 3 of 3

Jln. JemurAndayani I No 73 Wonocolo, Surabaya – East Jawa Phone: +62–31–8410871, 8472936,Fax: +62–31–8490005
Email: mail@poltekbangsby.ac.id Web: http://.poltekbangsby.ac.id