Dell Inspiron 15 5575 Compal CAL51 LA-F121P Rev 1.00 (A00)

5 4 3 2 1
PROJECT NAME : CAL51/CLA61/CAL71

PCB NO :
D
Dell / Compal Confidential D
Schematic Document
AMD Raven
AMD R17M-M2-50 (23 X 23mm)+GDDR5 x4
C
2017-11-09 Rev: 1.00 (A00) C
@ : Un-pop Component
R5_PC@/R7_PC@/R3_PC/R5_PR@/R7_PR@/R5_PR_R3@/R7_PR_R3@:APU PN
45@: HDMI LOGO
PCB@/: MB part number
4G_S@/4G_M@/4G_H@/2G_H@/2G_M@/2G_S:
www.laptoprepairsecrets.com
VRAM Strap Pin:
Vram 2G:S2G_R3@ / H2G_R3@ /M2G_R3@
Vram 4G:S4G_R3@ / H4G_R3@ /M4G_R3@
DIS@: GPU only
M50_R3@:GPU R3 PN
UMA@/:UMA only
TI@/PARADE@/NRDSA@ : SATA
B
3234@ :Audio B
EMI@/ESD@/RF@ : EMI, ESD ,RF Component

@EMI@/@ESD@/@RF@ : EMI, ESD,RF unpop
KBBL@:for KB backlight use
PTP@/NPTP@/TP_WAKE@:Touch pad
TYPEC@/NOTYPEC@:TYPEC
Typec@EMI@/Tyepc@ESD@: EMI/ESD typec component

A
CRT@:D-sub TPM@:TPM FFS@:free fall sensor A
HDT@ /Debug use

MODS@:moderd standby
Security Classification Compal Secret Data Compal Electronics, Inc.
2016/01/07 2017/01/07 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R
Reev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3(X02)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F121P
Date: Thursday, November 09, 2017 Sheet 1 of 61
5 4 3 2 1
5 4 3 2 1
Memory Bus 2400MHZ support two CHs

64bit DDR4-DIMM X2
D
AMD R17M-M2-50 D
VRAM 256M*16 1.2V DDR4

PEG 3.0 x4
GDDR5 *4Page 43,44 FCBGA631 Page 13~14
25W 23x23mm USB 3.1(GEN1)/DP(1.2)
Page 38~42 0_Port 0
TUSB544 USB 3.0 TYPEC
Page 33
USB 2.0 Page 32
eDP Conn. DP0 eDP DP1.2 USB2.0

Page 16 usb 2.0 mux 0_Port 0
Page 32
I2C
DP1 DDI HDMI1.4 AMD
HDMI Conn. I2C to EC
Page 17 Ravenl CCG4
On IO/B Page 31
Processor USB2.0
Realtek Parade CRT (Reserve) DP2 DDI DP1.2 BGA 1140 USB 3.0
Page 36 0_Port 1
RTD2166 PS8330B USB 3.0 Conn.1
0_Port 1 USB 2.0 Conn.1 Page 23
C C
PCI-E
x1 x1 0_Port 2
Port 0 x4 Port 5 Port 4 USB 3.0 Conn.2
0_Port 2 Page 23
Ethernet USB 2.0 Conn.2
SSD NGFF 2230 RTL8106E/RTL8111H(reserve)
WiFi/BT4.0 (10/100) default/1000 Digital Camera
Page 34 0_Port 3
Page 20 Page 19
(With Digital MIC) Page 16
GEN3 GEN1
GEN1
FFS(Reserve) SMBUS
1_Port 0
1_Port 1
USB 2.0 Conn.3
On IO/B
Page 25
Card Reader On IO/B

Page 25
Page 22 USB 2.0 HUB IC Page 35 RTS5170
SATA HDD Conn. Port 0 SATA Rediver SATA3.0 Touch Screen Page 16
Page 22
Page 22
Digital Mic. NGFF 2230 Page 20
B
WiFi/BT4.0 B
SATA ODD Conn. Port 1 SATA1.0

HD Audio Audio Codec Finger Printer Page 35
Page 22
TPM 750 ALC3234(default)

Page 18
(Reserve) Page 10
Headphone Jack /
SPI ROM SPI Mic. Jack combo Page 21
128Mb Page 10 On IO/B
Page 6~12
TPM 650 LPC Bus

I2C to EC Int. Speaker R / L
(Reserve)Page 10 33MHz Page 18
SUB-BOARDS I2C
Int.KBD ENE KBC PS/2

with KBBL KB9022QD Touch Pad
Page 24 Page 27 Page 24
A A
FAN CONN Page 24
I/O BOARD POWER BOARD ODD BOARD

Thermal Sensor
Page 28
2016/01/07 2017/01/07 Title
interposer board(M2_Sata) CRT BOARD(Reserve) Issued Date Deciphered Date

Block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
5 4 3 2 1
5 4 3 2 1
Platform Power Sequence 8 U4 AO4354

+0.95Valw->+0.95VS
LA-F121P UI1 SY6288D20AAC
0.95VS_PWR_EN#
+5V_USB_PWR1 UL2 SY6288C20AAC

D
2017/02/03 A2
+3ALW->+LAN_VDD33
RTC_CLK
3
D
ACIN AW14
12a
USB_EN#
WOL_EN
PWRGD_VGA
AW15
B5
9c VGATE 10a
POK
U3(DIS@)
APU_FCH_POK AND APU_FCH_PWRGD_R
12 EM5209VF
A3 AV 6
AC A1 A3 B5 +3VALW 34 110 84 99 98 32 UC3 CH1 +0.95VSDGPU
19 9 +5VALW 10 PXS_PWREN CH2 +1.8VGS
M O D E +19V_ADPIN BD15
A2
PUB01 PU300
TPS51285BRUKR
8
ISL9538HRTZ-T
A2 B4
5VS and 3VS
+19VB 6,20 3,13 SUSP# U4&U6 EM5209VF 8c
+17.4V_BATT+ APU
+3VLP,VL 2 EC_RSMRST# U1 FP5
100 AT16
DC
MODE 4 PBTN_OUT#
B1 122 AR15
B2
+17.4V_BATT+ PQB03 A5 B7 112 UE1 6 PM_SLP_S3# DGPU_PWR_EN
AON7409 6 AV13 8 PUV01 12a
+19VB EC_ON KB9022QD 5 PM_SLP_S5# ISL62771HRTZ-T
A4 B6 14 AT14 PWRGD_VGA
C
6a KB_RST# C
ON/OFF 114 2 BB11 9 PWROK PGOOD 20
10d PLT_RST# AW4
13 PWRGD_VGA
APU_RST#
D15
DGPU_PWROK 10d
18 PRV20
UL1 LAN_PWR_SAVE# APU_PWRGD AW2
RTL8106E-CG 26 17
AH1 BD5 AW16
E-LAN CTRL 10b BD11
www.laptoprepairsecrets.com 121 74 116 95 127

0.95_1.8VALW_PWREN
DGPU_PWROK
PLT_RST#
12a
VGATE
7
VR_ON
11
PXS_RST# PLT_RST_VGA#
9 AND Gate UG1 AU29
APU_PCIE_RST# UV2 DGPU
B 10c B
9d SUSP#
U4, EM5209VF
8 +5VS 8a
10c
APU_PWRGD APU_PWRGD_BUF
U6, EM5209VF
DH1
JHDT1@ +3VS
Debug connector 8b
9a
+APU_CORE
PUZ01
9 ENABLE_APU ISL62771HRTZ-T
PRZ19 8 +APU_CORE_NB
9b
APU_PWRGD
9c 9 PWROK VGATE
PGOOD 20 9d
A A

Issued Date 2016/01/07 Deciphered Date 2017/01/07 Title
Power Sequence diagram
5 4 3 2 1
5 4 3 2 1
Board ID Table for AD channel

Vcc 3.3V +/- 1%
Ra 100K +/- 1% BOARD ID Table
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3
Board ID USB3.0
0 0 0.000V 0.000V 0.300V 0x00 - 0x13
0 Raven EVT UMA
1 12K +/- 1% 0.347V 0.354V 0.360V 0x14 - 0x1E
1 Raven EVT DIS 0_Port0 TYPE C
2 15K +/- 1% 0.423V 0.430V 0.438V 0x1F - 0x25
2 Raven DVT1 UMA
3 20K +/- 1% 0.541V 0.550V 0.559V 0x26 - 0x30
3 Raven DVT1 DIS 0_Port1 USB3 connector 1
4 27K +/- 1% 0.691V 0.702V 0.713V 0x31 - 0x3A
4 Raven DVT2 UMA
5 33K +/- 1% 0.807V 0.819V 0.831V 0x3B - 0x45
5 Raven DVT2 DIS 0_Port2 USB3 connector 2
6 43K +/- 1% 0.978V 0.992V 1.006V 0x46 - 0x54
6 Raven Pilot UMA
D 7 56K +/- 1% 1.169V 1.185V 1.200V 0x55 - 0x64 D
7 Raven Pilot DIS RV2 NA 0_Port3 progaming DP signal
8 75K +/- 1% 1.398V 1.414V 1.430V 0x65 - 0x76
8
9 100K +/- 1% 1.634V 1.650V 1.667V 0x77 - 0x87
9 1_Port0
10 130K +/- 1% 1.849V 1.865V 1.881V 0x88 - 0x96
10
11 160K +/- 1% 2.015V 2.031V 2.046V 0x97 - 0xA4
11 RV2 NA 1_Port1
12 200K +/- 1% 2.185V 2.200V 2.215V 0xA5 - 0xAF
12
13 240K +/- 1% 2.316V 2.329V 2.343V 0xB0 - 0xB7
13 USB2.0
14 270K +/- 1% 2.395V 2.408V 2.421V 0xB8 - 0xBF
14
15 330K +/- 1% 2.521V 2.533V 2.544V 0xC0 - 0xC9
15 0_Port0 TYPE C
16 430K +/- 1% 2.667V 2.677V 2.687V 0xCA - 0xD4
16
17 560K +/- 1% 2.791V 2.800V 2.808V 0xD5 - 0xDD
17 0_Port1 USB connector 1
18 750K +/- 1% 2.905V 2.912V 2.919V 0xDE - 0xF0
18
19 NC 3.000V 3.300V 3.300V 0xF1 - 0xFF
19 0_Port2 USB connector 2
SMBUS Control Table
0_Port3 Camera
SOURCE BATT Charger DIMM Thermal FFS CRT
Sensor ULT 1_Port0 USB connector 1(D/B)
EC_SMB_CK1
EC_SMB_DA1
KB9022Q V V 1_Port1 USB HUB
EC_SMB_CK2
EC_SMB_DA2
KB9022Q V PCI EXPRESS(GFX) PCI EXPRESS(GPP)
EC_I2C_TPCLK KB9022Q
EC_I2C_TPDAT Lane 1 PEG (AMD)M2-50 Lane 1 NVME SSD
C
APU_SCLK0
APU_SDATA0
APU
V V V Lane 2 PEG (AMD)M2-50 Lane 2 NVME SSD C
APU_SCLK1
APU
APU_SDATA1 Lane 3 PEG (AMD)M2-50 RV2 NA Lane 3 NVME SSD
APU_SIC
APU_SID
APU V Lane 4 PEG (AMD)M2-50 RV2 NA Lane 4 NVME SSD
Lane 5 RV2 NA Lane 5 10/100 LAN(GIGA RESERVE)
Lane 6 RV2 NA Lane 6 NGFF Card (WLAN)
Lane 7 RV2 NA RV2 Sata only Lane 7 use sata interface
CLKOUT_PCIE0
CLOCK SIGNAL
dGPU
Lane 8 RV2 NA
RV2 Sata only Lane 8
SATA
use sata interface
Symbol Note : CLKOUT_PCIE1 10/100 LAN(GIGA RESERVE) SATA0 HDD

: means Digital Ground CLKOUT_PCIE2 NGFF Card (WLAN) SATA1 ODD
CLKOUT_PCIE3 NVME SSD

: means Analog Ground
B B
Voltage Rails
Power Plane Descript i on S0 S3 S4/S5
+SDC_IN Adapter power supply N/A N/A N/A
+17.4V_BATT++ Bat t er y po wer s uppl y N/A N/A N/A
+19VB AC or DC for power circuit N/A N/A N/A
+APU_VDDCORE Core voltage for APU ON OFF OFF
+APU_VDDSOC VDDSOC voltage for APU ON OFF OFF
+3VALW_APU 3V_always for APU ON ON ON*
+0.8VALW_APU 0.8V_always for APU ON ON ON*
+1.8V_ALW_APU 1.8V_always for APU ON ON ON*
+0.8VS 0.8V_sustain for APU ON OFF OFF
+VGA_CORE VGA core power rail for GPU ON OFF OFF
+1.35V_MEM_GFX +1.35VS power rail for GPU and VRAM ON OFF OFF
+3VGS +3VS power rail for GPU ON OFF OFF
+1.8VGS +1.8VS power rail for GPU ON OFF OFF
+0.95VSDGPU 0.95V power rail for GPU ON OFF OFF
+3.3V_VDD_PIC 3.3V power rail for PD chip ON OFF ON*
+3VALW System +3VALW always on power rail ON ON ON*
+3VLP +19VB to +3VLP power rail for suspend power ON ON ON
+3VS System +3VS power rail ON OFF OFF
+0.6V_DDR_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF
+1.2V_DDR DDR4/L-RS +1.2V power rail ON ON OFF
+2.5V_MEM DDR4/L-RS +2.5V power rail ON ON OFF
A A
+1.8VS System +1.8VS power rail ON OFF OFF
+5VALW System +5VALW power rail ON ON ON*
+5VS System +5VS power rail ON OFF OFF
+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF

Notes List
5 4 3 2 1
5 4 3 2 1
SMBus Block Diagram RPC64

2.2K
RPC64 2.2K
+3VS
BC20 APU_SCLK0 253 DIMM1

BA20 APU_SDATA0 254
D 253 DIMM2 D
254
RP4.2 2.2K
+3VS_TOUCH 1 FFS
RP4.1 2.2K
4
Raven
AR13
I2C_3_SCL JTP
AT13
I2C_3_SDA
12
JCRT
11
C
+3VS C
RPC3.1
RPC3.3
1K
1K
EC_SMB_CK2
APU_SIC N-MOS
H14
APU_SID N-MOS
J14
QC2 EC_SMB_DA2
RC24
+3VS
RC25 www.laptoprepairsecrets.com +3VS

2.2K
2.2K
DIS@ RV5 45.3K

R31
+3VGS
1K
1K
R32 DIS@ RV6 45.3K

QV1
U7
EC_SMB_CK2 N-MOS
79 VGA_SMB_CK3 UV1 GPU
80 EC_SMB_DA2
N-MOS VGA_SMB_DA3 U8
Q11
EC_SMB_CK2 N-MOS
B 8 U8 thermal sensor B
EC_SMB_DA2
N-MOS 7
KBC
KB9022QD
RE509 2.2K
+3VALW
RE510 2.2K
PR770
EC_SMB_CK1 0 ohm 4
77 SCL PU703 POWER
0 ohm SDA Charger
78 EC_SMB_DA1 3
PR769
DELL CONFIDENTIAL/PROPRIETARY
A PR20 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
A
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
100 ohm 6
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
CLK_SMB PBATT1 BATT NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
100 ohm CONN PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DAT_SMB 5
PR18

SMBus block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re
Rev
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
D D
UC1B
CHANGE PEG NET NAME @2/23 PCIE PEG
PEG PEG_ARX_GTX_P0 PEG_ATX_GRX_P0
P8 P_GFX_RXP0 P_GFX_TXP0 N1
PEG_ARX_GTX_N0 P9 N3 PEG_ATX_GRX_N0
P_GFX_RXN0 P_GFX_TXN0
PEG_ARX_GTX_P1 N6 M2 PEG_ATX_GRX_P1
P_GFX_RXP1 P_GFX_TXP1
PEG_ARX_GTX_P[3..0] PEG_ARX_GTX_N1 PEG_ATX_GRX_N1 PEG_ATX_GRX_P[3..0]
N7 P_GFX_RXN1 P_GFX_TXN1 M4
[38] PEG_ARX_GTX_P[3..0] PEG_ATX_GRX_P[3..0] [38]
PEG_ARX_GTX_N[3..0] PEG_ARX_GTX_P2 PEG_ATX_GRX_P2 PEG_ATX_GRX_N[3..0]
M8 P_GFX_RXP2 P_GFX_TXP2 L2
[38] PEG_ARX_GTX_N[3..0] PEG_ARX_GTX_N2 PEG_ATX_GRX_N2 PEG_ATX_GRX_N[3..0] [38]
M9 P_GFX_RXN2 P_GFX_TXN2 L4
PEG_ARX_GTX_P3 L6 L1 PEG_ATX_GRX_P3
P_GFX_RXP3 P_GFX_TXP3
PEG_ARX_GTX_N3 L7 L3 PEG_ATX_GRX_N3
P_GFX_RXN3 P_GFX_TXN3
K11 P_GFX_RXP4 P_GFX_TXP4 K2

J11 P_GFX_RXN4 P_GFX_TXN4 K4
H6 P_GFX_RXP5 P_GFX_TXP5 J2
H7 P_GFX_RXN5 P_GFX_TXN5 J4
G6 P_GFX_RXP6 P_GFX_TXP6 H1
CHANGE SSD NET NAME @2/23 F7 P_GFX_RXN6 P_GFX_TXN6 H3
PCIE_ATX_DRX_P[3..0]
PCIE_ARX_DTX_P[3..0] PCIE_ATX_DRX_P[3..0] [34]
G8 P_GFX_RXP7 P_GFX_TXP7 H2
[34] PCIE_ARX_DTX_P[3..0] PCIE_ATX_DRX_N[3..0]
F8 P_GFX_RXN7 P_GFX_TXN7 H4
PCIE_ARX_DTX_N[3..0] PCIE_ATX_DRX_N[3..0] [34]
[34] PCIE_ARX_DTX_N[3..0]
C PCIE_ARX_DTX_P0 N10 N2 PCIE_ATX_DRX_P0 C

P_GPP_RXP0 P_GPP_TXP0
PCIE_ARX_DTX_N0 N9 P3 PCIE_ATX_DRX_N0
P_GPP_RXN0 P_GPP_TXN0
PCIE_ARX_DTX_P1 L10 P4 PCIE_ATX_DRX_P1

PCIE_ARX_DTX_N1 L9 P2 PCIE_ATX_DRX_N1
P_GPP_RXN1 P_GPP_TXN1 SSD
PCIE_ARX_DTX_P2 L12 R3 PCIE_ATX_DRX_P2
SSD PCIE_ARX_DTX_N2
PCIE_ATX_DRX_N2
M11 P_GPP_RXN2 P_GPP_TXN2 R1
PCIE_ARX_DTX_P3 P12 T4 PCIE_ATX_DRX_P3
PCIE_ARX_DTX_N3 P11 T2 PCIE_ATX_DRX_N3
P_GPP_RXN3 P_GPP_TXN3
place near UC1
V6 W2 PCIE_ATX_DRX_P4 CC1 1 2 .1U_0402_16V7K
[19] PCIE_ARX_DTX_P4 PCIE_ATX_DRX_N4 PCIE_ATX_C_DRX_P4 [19]
CHANGE LAN/WLAN NET NAME @2/23 LAN V7 P_GPP_RXN4 P_GPP_TXN4 W4 CC2 1 2 .1U_0402_16V7K LAN
[19] PCIE_ARX_DTX_N4 PCIE_ATX_C_DRX_N4 [19]
T8 W3 PCIE_ATX_DRX_P5 CC3 1 2 .1U_0402_16V7K
[20] PCIE_ARX_DTX_P5 PCIE_ATX_DRX_N5 PCIE_ATX_C_DRX_P5 [20]
WLAN T9 P_GPP_RXN5 P_GPP_TXN5 V2 CC4 1 2 .1U_0402_16V7K WLAN
[20] PCIE_ARX_DTX_N5 PCIE_ATX_C_DRX_N5 [20]
R6 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 V1
[22] SATA_ARX_DTX_P0 SATA_ATX_DRX_P0 [22]
HDD R7 P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0V3 HDD
[22] SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 [22]
R9 P_GPP_RXP7/SATA_RXP1 P_GPP_TXP7/SATA_TXP1 U2
[22] SATA_ARX_DTX_P1 SATA_ATX_DRX_P1 [22]
ODD R10 P_GPP_RXN7/SATA_RXN1 P_GPP_TXN7/SATA_TXN1U4 ODD
[22] SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 [22]
FP5 REV 0.90

PART 2 OF 13
FP5_BGA1140~D
@
B B
UC1
UC1
SA0000BBJ1L
SA0000BBJ0L
R3_PR@
R3_PC@
S IC RAVEN3 YM2200C4T2OFB 2.5G BGA 1140 APU
S IC RAVEN3 ZM2300C4T2OFB 2G BGA 1140 APU
UC1 UC1 UC1
SA0000ASA2L SA0000ASA3L SA0000ASA4L

R7_PC@ R7_PR@ R7_PR_R3@
S IC RAVEN7 ZM2000C4T4MF2 2G BGA 1140 APU S IC RAVEN7 YM2700C4T4MFB 2G BGA 1140 APU S IC RAVEN7 YM2700C4T4MFB 2.2G BGA 1140 APU A31 !
UC1
UC1 UC1
SA0000A8R2L
A SA0000A8R0L SA0000A8R1L A
R5_PR_R3@
R5_PC@ R5_PR@
S IC RAVEN5 YM2500C4T4MFB 2G BGA 1140 APU A31 !
S IC RAVEN5 ZM1800C4T4MF2 1.8G BGA 1140 APU S IC RAVEN5 YM2500C4T4MFB 1.8G BGA 1140 APU

FP4 PCIE/UMI
Custom 0.3(X02)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
5 4 3 2 1
Main Func = CPU UC1A UC1I

MEMORY A
[13] DDR_A_MA[13..0]
DDR_A_MA0 MEMORY B
AF25 DDR_A_DQ[63..0] [13] [14] DDR_B_MA[13..0]
MA_ADD0
DDR_A_MA1 DDR_A_DQ0 DDR_B_MA0 DDR_B_DQ[63..0] [14]
AE23 MA_ADD1 MA_DATA0 J21 AG30 MB_ADD0
DDR_A_MA2 DDR_A_DQ1 DDR_B_MA1 DDR_B_DQ0
AD27 MA_ADD2 MA_DATA1 H21 AC32 MB_ADD1 MB_DATA0 B21
AE21 MA_ADD3 MA_DATA2 F23 AC30 MB_ADD2 MB_DATA1 D21
AC24 MA_ADD4 MA_DATA3 H23 AB29 MB_ADD3 MB_DATA2 B23
AC26 MA_ADD5 MA_DATA4 G20 AB31 MB_ADD4 MB_DATA3 D23
AD21 MA_ADD6 MA_DATA5 F20 AA30 MB_ADD5 MB_DATA4 A20
AC27 MA_ADD7 MA_DATA6 J22 AA29 MB_ADD6 MB_DATA5 C20
AD22 MA_ADD8 MA_DATA7 J23 Y30 MB_ADD7 MB_DATA6 A22
DDR_A_MA9 DDR_B_MA8 DDR_B_DQ7
AC21 MA_ADD9 AA31 MB_ADD8 MB_DATA7 C22
DDR_A_MA10 DDR_A_DQ8 DDR_B_MA9
AF22 MA_ADD10 MA_DATA8 G25 W29 MB_ADD9
AA24 MA_ADD11 MA_DATA9 F26 AH29 MB_ADD10 MB_DATA8 D24
AC23 MA_ADD12 MA_DATA10 L24 Y32 MB_ADD11 MB_DATA9 A25
AJ25 MA_ADD13_BANK2 MA_DATA11 L26 W31 MB_ADD12 MB_DATA10 D27
DDR_A_DQ12 DDR_B_MA13 DDR_B_DQ11
AG27 MA_WE_L_ADD14 MA_DATA12 L23 AL30 MB_ADD13_BANK2 MB_DATA11 C27
[13] DDR_A_MA14_WE# DDR_A_DQ13 DDR_B_DQ12
AG23 MA_CAS_L_ADD15 MA_DATA13 F25 AK30 MB_WE_L_ADD14 MB_DATA12 C23
[13] DDR_A_MA15_CAS# DDR_A_DQ14 [14] DDR_B_MA14_WE# DDR_B_DQ13
AG26 MA_RAS_L_ADD16 MA_DATA14 K25 AK32 MB_CAS_L_ADD15 MB_DATA13 B24
[13] DDR_A_MA16_RAS# DDR_A_DQ15 [14] DDR_B_MA15_CAS# DDR_B_DQ14
MA_DATA15 K27 AJ30 MB_RAS_L_ADD16 MB_DATA14 C26
[14] DDR_B_MA16_RAS# DDR_B_DQ15
MB_DATA15 B27
D DDR_A_DQ16 D
AF21 MA_BANK0 MA_DATA16 M25
[13] DDR_A_BA0 DDR_A_DQ17 DDR_B_DQ16
AF27 MA_BANK1 MA_DATA17 M27 AH31 MB_BANK0 MB_DATA16 C30
[13] DDR_A_BA1 DDR_A_DQ18 [14] DDR_B_BA0 DDR_B_DQ17
MA_DATA18 P27 AG32 MB_BANK1 MB_DATA17 E29
DDR_A_BG0 DDR_A_DQ19 [14] DDR_B_BA1 DDR_B_DQ18
AA21 MA_BG0 MA_DATA19 R24 MB_DATA18 H29
[13] DDR_A_BG0 DDR_A_BG1 DDR_A_DQ20 DDR_B_BG0 DDR_B_DQ19
AA27 MA_BG1 MA_DATA20 L27 V31 MB_BG0 MB_DATA19 H31
[13] DDR_A_BG1 DDR_A_DQ21 [14] DDR_B_BG0 DDR_B_BG1 DDR_B_DQ20
MA_DATA21 M24 V29 MB_BG1 MB_DATA20 A28
DDR_A_ACT# DDR_A_DQ22 [14] DDR_B_BG1 DDR_B_DQ21
AA22 MA_ACT_L MA_DATA22 P24 MB_DATA21 D28
[13] DDR_A_ACT# DDR_A_DQ23 DDR_B_ACT# DDR_B_DQ22
MA_DATA23 P25 V30 MB_ACT_L MB_DATA22 F31
[13] DDR_A_DM[7..0] DDR_A_DM0 [14] DDR_B_ACT# DDR_B_DQ23
F21 MA_DM0 MB_DATA23 G30
DDR_A_DM1 DDR_A_DQ24 [14] DDR_B_DM[7..0] DDR_B_DM0
G27 MA_DM1 MA_DATA24 M22 C21 MB_DM0
DDR_A_DM2 DDR_A_DQ25 DDR_B_DM1 DDR_B_DQ24
N24 MA_DM2 MA_DATA25 N21 C25 MB_DM1 MB_DATA24 J29
N23 MA_DM3 MA_DATA26 T22 E32 MB_DM2 MB_DATA25 J31
AL24 MA_DM4 MA_DATA27 V21 K30 MB_DM3 MB_DATA26 L29
AN27 MA_DM5 MA_DATA28 L21 AP30 MB_DM4 MB_DATA27 L31
AW25 MA_DM6 MA_DATA29 M20 AW31 MB_DM5 MB_DATA28 H30
AT21 MA_DM7 MA_DATA30 R23 BB26 MB_DM6 MB_DATA29 H32
DDR_A_DQ31 DDR_B_DM7 DDR_B_DQ30
T27 RSVD_36 MA_DATA31 T21 BD22 MB_DM7 MB_DATA30 L30
DDR_B_DQ31
N32 RSVD_21 MB_DATA31 L32
DDR_A_DQ32
F22 MA_DQS_H0 MA_DATA32 AL27
[13] DDR_A_DQS0 DDR_A_DQ33 DDR_B_DQ32
G22 MA_DQS_L0 MA_DATA33 AL25 D22 MB_DQS_H0 MB_DATA32 AP29
[13] DDR_A_DQS0# DDR_A_DQ34 [14] DDR_B_DQS0 DDR_B_DQ33
H27 MA_DQS_H1 MA_DATA34 AP26 B22 MB_DQS_L0 MB_DATA33 AP32
[13] DDR_A_DQS1 DDR_A_DQ35 [14] DDR_B_DQS0# DDR_B_DQ34
H26 MA_DQS_L1 MA_DATA35 AR27 D25 MB_DQS_H1 MB_DATA34 AT29
N27 MA_DQS_H2 MA_DATA36 AK26 B25 MB_DQS_L1 MB_DATA35 AU32
N26 MA_DQS_L2 MA_DATA37 AK24 F29 MB_DQS_H2 MB_DATA36 AN30
R21 MA_DQS_H3 MA_DATA38 AM24 F30 MB_DQS_L2 MB_DATA37 AP31
P21 MA_DQS_L3 MA_DATA39 AP27 K31 MB_DQS_H3 MB_DATA38 AR30
[13] DDR_A_DQS3# [14] DDR_B_DQS3 DDR_B_DQ39
AM26 MA_DQS_H4 K29 MB_DQS_L3 MB_DATA39 AT31
[13] DDR_A_DQS4 DDR_A_DQ40 [14] DDR_B_DQS3#
AM27 MA_DQS_L4 MA_DATA40 AM23 AR29 MB_DQS_H4
AN24 MA_DQS_H5 MA_DATA41 AM21 AR31 MB_DQS_L4 MB_DATA40 AU29
AN25 MA_DQS_L5 MA_DATA42 AR25 AW30 MB_DQS_H5 MB_DATA41 AV30
AU23 MA_DQS_H6 MA_DATA43 AU27 AW29 MB_DQS_L5 MB_DATA42 BB30
AT23 MA_DQS_L6 MA_DATA44 AL22 BC25 MB_DQS_H6 MB_DATA43 BA28
AV20 MA_DQS_H7 MA_DATA45 AL21 BA25 MB_DQS_L6 MB_DATA44 AU30
AW20 MA_DQS_L7 MA_DATA46 AP24 BC22 MB_DQS_H7 MB_DATA45 AU31
V24 RSVD_41 MA_DATA47 AP23 BA22 MB_DQS_L7 MB_DATA46 AY32
[14] DDR_B_DQS7# DDR_B_DQ47
V23 RSVD_40 N31 RSVD_20 MB_DATA47 AY29
DDR_A_DQ48
MA_DATA48 AW26 N29 RSVD_18
DDR_A_DQ49 DDR_B_DQ48
AD25 MA_CLK_H0 MA_DATA49 AV25 MB_DATA48 BA27
[13] DDR_A_CLK0 DDR_A_DQ50 DDR_B_DQ49
AD24 MA_CLK_L0 MA_DATA50 AV22 AC31 MB_CLK_H0 MB_DATA49 BC27
[13] DDR_A_CLK0# DDR_A_DQ51 [14] DDR_B_CLK0 DDR_B_DQ50
AE26 MA_CLK_H1 MA_DATA51 AW22 AD30 MB_CLK_L0 MB_DATA50 BA24
[13] DDR_A_CLK1 DDR_A_DQ52 [14] DDR_B_CLK0# DDR_B_DQ51
AE27 MA_CLK_L1 MA_DATA52 AU26 AD29 MB_CLK_H1 MB_DATA51 BC24
[13] DDR_A_CLK1# DDR_A_DQ53 [14] DDR_B_CLK1 DDR_B_DQ52
MA_DATA53 AV27 AD31 MB_CLK_L1 MB_DATA52 BD28
DDR_A_DQ54 [14] DDR_B_CLK1# DDR_B_DQ53
MA_DATA54 AW23 AE30 MB_CLK_H2 MB_DATA53 BB27
MA_DATA55 AT22 AE32 MB_CLK_L2 MB_DATA54 BB25
DDR_B_DQ55
AF29 MB_CLK_H3 MB_DATA55 BD25
DDR_A_DQ56
MA_DATA56 AW21 AF31 MB_CLK_L3
AG21 MA_CS_L0 MA_DATA57 AU21 MB_DATA56 BC23
[13] DDR_A_CS0# DDR_A_DQ58 DDR_B_DQ57
AJ27 MA_CS_L1 MA_DATA58 AP21 AJ31 MB0_CS_L0 MB_DATA57 BB22
[13] DDR_A_CS1# DDR_A_DQ59 [14] DDR_B_CS0# DDR_B_DQ58
MA_DATA59 AN20 AM31 MB0_CS_L1 MB_DATA58 BC21
DDR_A_DQ60 [14] DDR_B_CS1# DDR_B_DQ59
C MA_DATA60 AR22 AJ29 MB1_CS_L0 MB_DATA59 BD20 C
MA_DATA61 AN22 AM29 MB1_CS_L1 MB_DATA60 BB23
MA_DATA62 AT20 MB_DATA61 BA23
MA_DATA63 AR20 MB_DATA62 BB21
DDR_B_DQ63
Y23 MA_CKE0 MB_DATA63 BA21
[13] DDR_A_CKE0 Y26 T24 U29
MA_CKE1 RSVD_34 MB0_CKE0
[13] DDR_A_CKE1 T25 [14] DDR_B_CKE0 T30 M31
RSVD_35 MB0_CKE1 RSVD_17
W25 [14] DDR_B_CKE1 V32 N30
RSVD_51 MB1_CKE0 RSVD_19
RSVD_52 W27 U31 MB1_CKE1 RSVD_26 P31
AG24 MA_ODT0 RSVD_27 R26 RSVD_29 R32
[13] DDR_A_ODT0 AJ22 R27 AL31 M30
MA_ODT1 RSVD_28 MB0_ODT0 RSVD_16
[13] DDR_A_ODT1 V27 [14] DDR_B_ODT0 AM32 M29
RSVD_43 MB0_ODT1 RSVD_15
V26 [14] DDR_B_ODT1 AL29 P30
RSVD_42 MB1_ODT0 RSVD_25
AM30 MB1_ODT1 RSVD_24 P29
AA25 MA_ALERT_L
[13] DDR_A_ALERT# DDR_A_PAR
MA_PAROUT AF24 W30 MB_ALERT_L
DDR_A_PAR [13] [14] DDR_B_ALERT# DDR_B_PAR
AE24 MA_EVENT_L MB_PAROUT AG31
[13] DDR_A_EVENT# Y24 AG29 DDR_B_PAR [14]
MA_RESET_L MB_EVENT_L
[13] DDR_A_RST# [14] DDR_B_EVENT# T31
FP5 REV 0.90 MB_RESET_L
[14] DDR_B_RST#
PART 1 OF 13 FP5 REV 0.90
PART 9 OF 13
FP5_BGA1140~D FP5_BGA1140~D
@ @
B B
EVENT# pull high

+1.2V_DDR
DDR_B_EVENT#
RC1 1 2 1K_0402_5%
+1.2V_DDR
DDR_A_EVENT#
RC2 1 2 1K_0402_5%
A A

FP4 DDR4 MEMORY I/F
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Siz e Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3(X02)
5 4 3 2 1
A B C D E
Main Func = CPU

+3VS
2
DP3: Typec RC3
2.2K_0402_5%
DP2: CRT
1
PANEL_BKLEN_EC
D
DP1: HDMI 3 1
[9] PANEL_BKLEN_EC PANEL_BKLEN [27]
DP0: eDP QC1 MESS138W-G_SOT323-3
G
2
+1.8VS
1 1
UC1C
DISPLAY/SVI2/JTAG/TEST
EDP_TXP0 C8 G15 PANEL_BKLEN_EC +3VS
DP0_TXP0 DP_BLON
[16] EDP_TXP0 EDP_TXN0 ENVDD_R +1.8VS
A8 DP0_TXN0 DP_DIGON F15
[16] EDP_TXN0 INVTPWM_R
eDP DP_VARY_BL L14 ENVDD 1 2
+1.8VS EDP_TXP1 D8 RC4
DP0_TXP1
[16] EDP_TXP1 EDP_TXN1
5
B8 DP0_TXN1 DP0_AUXP D9 UC5 4.7K_0402_5%
[16] EDP_TXN1 EDP_AUXP [16]
DP0_AUXN B9 1 INVTPWM 1 2
P
@ RPC30 B6 C10 EDP_AUXN [16] NC 4 RC5
DP0_TXP2 DP0_HPD
APU_TEST14 EDP_HPD [16] ENVDD_R Y ENVDD [16]
8 1 C7 DP0_TXN2 2 4.7K_0402_5%
[9] ENVDD_R A
G
APU_TEST15 7 2 G11
DP1_AUXP
APU_TEST16 APU_DP1_CTRL_CLK [17]
6 3 C6 DP0_TXP3 DP1_AUXN F11 NL17SZ07DFT2G_SC70-5
APU_DP1_CTRL_DATA [17]
3
APU_TEST17 5 4 D6 G13 SA00004BV00 RPC1
DP0_TXN3 DP1_HPD
APU_DP1_HPD [17] PANEL_BKLEN_EC 8 1
10K_0804_8P4R_5% APU_DP1_P0 E6 J12 ENVDD_R 7 2
DP1_TXP0 DP2_AUXP
[17] APU_DP1_P0 APU_DP1_N0 APU_DP2_AUXP [36]
D5 DP1_TXN0 DP2_AUXN H12 6 3
[17] APU_DP1_N0 APU_DP2_AUXN [36]
DP2_HPD K13 5 4
APU_DP1_P1 APU_DP2_HPD [36]
E1 DP1_TXP1
[17] APU_DP1_P1 APU_DP1_N1 C1 DP1_TXN1 DP3_AUXP J10 100K_0804_8P4R_5%
[17] APU_DP1_N1 APU_DP3_AUXP [33]
HDMI DP3_AUXN H10
APU_DP1_P2 F3 K8 APU_DP3_AUXN [33]
DP1_TXP2 DP3_HPD
[17] APU_DP1_P2 APU_DP1_N2 APU_DP3_HPD [31,33]
E4 DP1_TXN2
[17] APU_DP1_N2 DP_STEREOSYNC
DP_STEREOSYNC K15
APU_DP1_P3 F4 +1.8VS
DP1_TXP3
[17] APU_DP1_P3 APU_DP1_N3 F2 DP1_TXN3 RSVD_4 F14 T2
[17] APU_DP1_N3
RSVD_3 F12 T3
5
UC2
RSVD_2 F10 T4 1
P
NC 4
INVTPWM_R Y INVTPWM [16]
2
A
G
+1.8VS
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
1 @ 2 APU_SVT
RC6
1K_0402_5%
1 @ 2 APU_SVC AP14 APU_TEST4
TEST4 T5
RC7 AN14 APU_TEST5
TEST5 T6
2 1K_0402_5% 2
1 @ 2 APU_SVD F13 APU_TEST6
TEST6 T7
RC8
1K_0402_5% G18 APU_TEST14
TEST14 T8
H19 APU_TEST15
TEST15 T9
F18 APU_TEST16
TEST16 T10
F19 APU_TEST17
TEST17 T11
W24 APU_TEST31
TEST31 T12
EC_SMB_CK2 RC616 1 2 0_0402_5% APU_SIC
[27,28,39] EC_SMB_CK2
AR11 APU_TEST41
TEST41 T13 DP_STEREOSYNC 1 2
EC_SMB_DA2 APU_SID APU_TDI APU_TEST470 +1.8VS
RC617 1 2 0_0402_5% AU2 TDI TEST470 AJ21 T14 RC10
[27,28,39] EC_SMB_DA2 APU_TDO APU_TEST471
AU4 TDO TEST471 AK21 T15 1K_0402_5%
APU_TCK AU1 TCK
APU_TMS AU3 TMS
APU_TRST# AV3 TRST_L
APU_DBREQ# AW3 1 2
DBREQ_L
+3VS +0.9VS RC16
RPC3 1K_0402_5%
8 1 APU_SID RC12 1 2 300_0402_5% APU_RST# AW4 V4 SMU_ZVDDP RC13 1 2 196_0402_1%
APU_ALERT# +1.8VS RESET_L SMU_ZVDD @
7 2 +1.8VS RC15 1 2 300_0402_5% APU_PWRGD AW2 PWROK
+3VALW
6 3 APU_SIC
[53] APU_PWRGD APU_SIC
5 4 H14 SIC CORETYPE AW11 RC17 1 @ 2 10K_0402_5%
APU_SID J14 SID
1K_0804_8P4R_5% APU_ALERT# J15 ALERT_L T16
THERMTRIP# AP16 THERMTRIP_L VDDP_SENSE AN11
[27] THERMTRIP# VDDP_SENSE_H [51]
L19 PROCHOT_L VDDCR_SOC_SENSEJ19
+3VS [10,27,46,48,53] H_PROCHOT# APU_VDDSOC_SEN [53]
VDDCR_SENSE K18 T17
APU_VDDCR_SEN [53]
APU_SVC_R T18
RC18 1 2 0_0402_5% F16 SVC0
[53] APU_SVC APU_SVD_R VSS_SENSEA APU_VDD_RUN_FB_L
RC20 1 2 0_0402_5% H16 SVD0 VSS_SENSE_A J18 RC19 2 1 0_0402_5%
[53] APU_SVD APU_SVT_R APU_VDD_RUN_FB_L [53]
RC22 1 2 0_0402_5% J16 SVT0 FP5 REV 0.90 VSS_SENSE_B AM11
[53] APU_SVT PART 3 OF 13
VDDP_SENSE_L [51]
RC24 1 @ 2 1K_0402_5% EC_SMB_CK2
RC25 1 @ 2 1K_0402_5% EC_SMB_DA2
FP5_BGA1140~D
PU at EC side @
3 3
+3VS
HDT+
1 2 H_PROCHOT#
RC26
1K_0402_5% +1.8V_ALW
1 2THERMTRIP#
RC664 HDT debug + HDT@
1K_0402_5% APU_TRST# RH26 1 @ 2 1K_0402_5%
CC250 @ESD@
1 2
0.1U_0402_16V7K
@ESD@
27P_0402_50V8F 1 2 CC5 APU_RST#
APU_TCK APU_TDI
RH27
RH28
@ESD@
27P_0402_50V8F 1 2 CC6 APU_PWRGD +1.8V_ALW
RPH1
2
APU_TCK 1 8
220_0402_5% RC27 APU_TMS 2 7
1 2 @ @ APU_TDI 3 6
APU_DBREQ#
0_0402_5%
0_0402_5%
4 5
@
1
1K_0804_8P4R_5%
APU_TMS APU_TDO @
APU_TDI 1 2
0.01U_0402_16V7K @ CH4
APU_DBREQ# 1 2
0.01U_0402_16V7K @ CH3
APU_TRST# 1 2
0.01U_0402_16V7K HDT@ CH2
APU_TRST# RH21 1 @ 2 33_0402_5% APU_TRST#_R CC251
T100
RH22 1 @ 2 10K_0402_5% T120 @ @ESD@ 1 2
RH23 1 @ 2 10K_0402_5% T123 APU_PWRGD_BUF 1 DH1 2 DB2J31400L_SOD323-2 APU_PWRGD
4 T121 4
RH24 1 @ 2 10K_0402_5% APU_RST#_BUF 1 DH2 2 DB2J31400L_SOD323-2 APU_RST# 0.1U_0402_16V7K
T122
T124
APU_DBREQ#_R @ 1 @ 2 APU_DBREQ#
T125 RH25 33_0402_5%

FP4 DISP/MISC/HDT
Custom 0.3(X02)
A B C D E
A B C D E
Main Func = CPU

DEVSLP0_HDD
+3VS 10K_0402_5% 1 @ 2 RC620
10K_0402_5% 1 @ 2 RC663 SSD_DEVSLP
SATA_ACT#
10K_0402_5% 1 2 RC621
UC1D
RC630 MODS@ 0_0402_5% A CPI/A UDIO/I2C/GPIO / MIS C
S0A3_GPIO
1 2 1 2
CC7 150P_0402_50V8J EGPIO41/SFI_S5_EGPIO41 AW12
AGPIO39/SFI_S5_AGPIO39 AU12
APU_PCIE_RST#_C APU_PCIE_RST#_R
RC28 2 @ 1 0_0402_5% RC29 1 2 33_0402_5% BD5 PCIE_RST0_L/EGPIO26
VGATE [27,51,53] APU_PCIE1_RST#_C APU_PCIE1_RST#_R
RC704 1 2 33_0402_5% BB6 PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151 AR13
APU_FCH_PWRGD EC_RSMRST#
1 RC30 2 1 0_0402_5% 1 2 @ AT16 RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152 AT13 1
APU_FCH_POK [27]
CC100 @ 150P_0402_50V8J
INPUT AR15 PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149 AN8
[27] PBTN_OUT# APU_FCH_PWRGD_R
@ESD@ AV6 PWR_GOOD I2C1_SDA/SFI1_I2C_SDA/EGPIO150 AN9 need set pull down by SW
SYS_RESET_L
CC8 100P_0402_50V8J AP10 SYS_RESET_L/AGPIO1
APU_FCH_PWRGD APU_PCIE_WAKE# APU_SCLK0
2 1 AV11 WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0 BC20
[19,27,34] APU_PCIE_WAKE# APU_SDATA0 APU_SCLK0 [13,14,22,36]
RC631 0_0402_5% I2C2_SDA/EGPIO114/SDA0 BA20 set to SMbus
PM_SLP_S3#_R PM_SLP_S3# APU_SDATA0 [13,14,22,36]
CH23 close to UC1 1 2 AV13 SLP_S3_L
[27] PM_SLP_S3#_R I2C_3_SCL
AT14 SLP_S5_L I2C3_SCL/AGPIO19/SCL1 AM9
[27] PM_SLP_S5# I2C_3_SDA I2C_3_SCL [24]
I2C3_SDA/AGPIO20/SDA1 AM10 set to I2C
I2C_3_SDA [24]
T115 S0A3 AR8 S0A3_GPIO/AGPIO10
+3VALW_EC +3VALW +3VS PSA_I2C_SCL L16
AT10 AC_PRES/AGPIO23 PSA_I2C_SDA M16
MEM_ERROR_B
1
AN6 LLB_L/AGPIO12
[27] MEM_ERROR_B
4.7K_0402_5%
4.7K_0402_5%
@
TP_I2C_INT#_APU
RC33 RC34 AGPIO3 AT15 AGPIO3 RC36 2 1 0_0402_5%
SATA_ODD_PRSNT# TP_I2C_INT#_APU [24]
@ AW8 EGPIO42 AGPIO4/SATAE_IFDET AW10
[22,27] SATA_ODD_PRSNT#
5
UC3
2
1 AP9
P
AGPIO5/DEVSLP0
NC APU_FCH_PWRGD_R DEVSLP0_HDD [22]
4 AGPIO6/DEVSLP1 AU10
APU_FCH_PWRGD Y SATA_ACT# SSD_DEVSLP [34]
2 SATA_ACT_L/AGPIO130 AV15
A SATA_ACT# [27,29,34]
G
HDD_EN#
NL17SZ07DFT2G_SC70-5 AGPIO9 AU7 add hdd_en# @3/7
SKU_ID HDD_EN# [22]
3
SA00004BV00 3.3VALW input AGPIO40 AU6

3.3V_TS_EN
3.3VALW input AGPIO69 AW13 add 3.3V_TS_EN@3/7
3.3V_TS_EN [16]
RC39 2 @ 1 0_0402_5% 3.3VS input AGPIO86 AW15
HDA_BIT_CLK
AR2 AZ_BITCLK/TDM_BCLK_MIC
HDA_SDIN0
2 2 AP7 AZ_SDIN0/CODEC_GPI
[18] HDA_SDIN0 HDA_SDIN1
CC9 CC10 AP1 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU14
HDA_SDIN2
AP4 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK
3.3VS Output SPKR/AGPIO91 AU16
HDA_RST# MEM_ERROR_A APU_SPKR [18]
.1U_0402_16V7K .1U_0402_16V7K AP3 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AV8
1 1 HDA_SYNC MEM_ERROR_A [27] +3VALW +3VALW
AR4 AZ_SYNC/TDM_FRM_MIC CC11 @
HDA_SDOUT
AR3 AZ_SDOUT/TDM_FRM_PLAYBACK
3.3VS input GENINT1_L/AGPIO89 AW16 GPIO89 1 2
KB_DET# GPIO89 [34]
3.3VS input GENINT2_L/AGPIO90 BD15 KB_DET# [24]
2
EMI@ swap @04/14 AT2 SW_MCLK/TDM_BCLK_BT 0.1U_0402_16V7K AGPIO3 10K_0402_5% 2 1 RC40
RPC4 AT4 SW_DATA0/TDM_DOUT_BT RC41 DIS@
HDA_BIT_CLK RTC_DET#
1 8 AR6 AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 AR18 10K_0402_5%
[18] HDA_BIT_CLK_R HDA_SDOUT [11] RTC_DET# FFS_INT1 [22]
2 7 AGPIO8 AP6 AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 AT18
[18] HDA_SDOUT_R HDA_SYNC FFS_INT2 [22]
3 6 FP5 REV 0.90 UMA: LOW
[18] HDA_SYNC_R HDA_RST#
1
4 5 PART 4 OF 13
[18] HDA_RST#_R SKU_ID DIS: HIGH
33_0804_8P4R_5% FP5_BGA1140~D
2
1 @
1 8 RC42 UMA@
2 7 C1 @RF@ 10K_0402_5%
2 3 6 2
10P_0402_50V8J
4 5 2
1
RPC5 D6
PANEL_BKLEN_EC
1 2
PANEL_BKLEN_EC [8]
1K_0804_8P4R_5%
RB751V-40_SOD323-2
+3VS D5
ENVDD_R
RPC64 1 2
APU_SCLK0 ENVDD_R [8]
8 1
APU_SDATA0
7 2 need check with ESD RB751V-40_SOD323-2
APU_PCIE1_RST#_U APU_PCIE_RST#
6 3 1 2
5 4 0_0402_5% RC44 +3VS
2.2K_0804_8P4R_5% @ESD@
2 1
EC_RSMRST# Strap pin +1.8VS +1.8V_ALW +3VALW
CC12 0.1U_0402_16V7K +3VALW FFS@
FFS_INT1
swap @04/14 CC13 @ RC61231 2 10K_0402_5%
1 2
FFS_INT2
RC61241 FFS@ 2 10K_0402_5%
2
10K_0402_5%
10K_0402_5%
@ESD@ 0.1U_0402_16V7K
SYS_RESET_L
5
RC622
RC47
2 1 RC700 0_0402_5% RC48
APU_PCIE_RST#_C APU_PCIE1_RST#_U
CC14 0.1U_0402_16V7K 1 2 2 10K_0402_5%
P
RC701 0_0402_5% B 4
APU_PCIE1_RST#_C Y APU_PCIE_RST# [19,20,34,38]
1 2 1
1
G
A UC4
@ SYS_RESET_L
@
APU_SPI_CLK_R
3
1
RC703
@ @
[10] APU_SPI_CLK_R
2
RC49
0_0402_5%
1
@
10K_0402_5%
@ @
2
MC74VHC1G08DFT2G SC70 5P RC51 RC52

PLT_RST#
1
2K_0402_5% 2K_0402_5%
PLT_RST# [10,19,20,27]
2
+3VALW +1.8V_ALW
RTC_DET#
1
3 RC61301 2 10K_0402_5% 3
SATA_ODD_PRSNT#
RC61221 2 10K_0402_5% RC54
PBTN_OUT#
RC53 1 2 10K_0402_5% 22K_0402_5%
RC56 1 PTP@ 2 10K_0402_5% AGPIO8

EC_RSMRST#
2
[27] EC_RSMRST#
RC57 1 NPTP@ 2 10K_0402_5% AGPIO8
HDA_SDIN1
2
10U_0603_6.3V6M
1U_0603_25V6K
RC58 1 2 10K_0402_5% 1
1
CC16
CC15
RC61
HDA_SDIN2
RC59 1 2 10K_0402_5% @ @ 10K_0402_5%
HDA_SDIN0
RC60 1 @ 2 10K_0402_5%
HDA_BIT_CLK
2
RC62 1 @ 2 10K_0402_5% 2
1
+3VALW
2
+3VALW RC619
MODS@ 10K_0402_5%
MC74VHC1G08DFT2G SC70 5P
1
5
RC618 MODS@ 0_0402_5%

PM_SLP_S3#
2 1 2
P
S0A3_GPIO B
4
[20,26,27] S0A3_GPIO Y 1 S0A3
A
G
UC9
1 1
3
MODS@
CC94
CC95
0.1U_0402_16V7K
0.1U_0402_16V7K
MODS@ MODS@
2 2
4 4
for Modern standby

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 GPIO/AZ/MISC/STRAPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F121P
A B C D E
A B C D E
Main Func = CPU
+3VS +3VS
BT_ON#_R UC1E
RC615 1 2 10K_0402_5%
CLK/LPC/EMMC/SD/SPI/e SPI/U AR T
KB_RST#
2 1
RC1707 10K_0402_5%
CLKREQ_PEG#0 CLKREQ_PEG#0
+3VS 1 2 AV18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
[39] CLKREQ_PEG#0 CLKREQ_PCIE#1
10K_0402_5% RC1695 AN19 CLK_REQ1_L/AGPIO115
1 2 CLKREQ_PCIE#2 [19] CLKREQ_PCIE#1 CLKREQ_PCIE#2 AP19 CLK_REQ2_L/AGPIO116
[20] CLKREQ_PCIE#2 CLKREQ_PCIE#3
10K_0402_5% RC1696 AT19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 T111
1 2 CLKREQ_PCIE#3 [34] CLKREQ_PCIE#3 AU19 T104T105T106T107
CLK_REQ4_L/OSCIN/EGPIO132
BT_ON#
10K_0402_5% RC1697 RC902 1 @ 2 0_0402_5% AW18 CLK_REQ5_L/EGPIO120 T103~T109 T111~T114 put together as possible
[20] BT_ON#_R AW19 CLK_REQ6_L/EGPIO121
VBIOS_ID1
EGPIO70/SD_CLK BD13
LPC_PD_L/SD_CMD/AGPIO21BB14 LPCPD# T103
CLK_PEG_P0 T108 T109
AK1 GPP_CLK0P LAD0/SD_DATA0/EGPIO104BB12
[38] CLK_PEG_P0 CLK_PEG_N0 AK3 LPC_AD0 [27]
DGPU GPP_CLK0N LAD1/SD_DATA1/EGPIO105BC11
1 [38] CLK_PEG_N0 LPC_AD1 [27] 1
LAD2/SD_DATA2/EGPIO106BB15
CLK_PCIE_P1 AM2 LPC_AD2 [27]
GPP_CLK1P LAD3/SD_DATA3/EGPIO107BC15
[19] CLK_PCIE_P1 CLK_PCIE_N1 AM4 BA15 LPC_AD3 [27]
LAN GPP_CLK1N LPCCLK0/EGPIO74 22_0402_5% 2 1 RC449
[19] CLK_PCIE_N1 LPC_CLK0_EC [27]
LPC_CLKRUN_L/AGPIO88BC13 CLKRUN#
CLK_PCIE_P2 AM1 LPCI_CLK_TPM CLKRUN# [27]
LPCCLK1/EGPIO75 BB13
48MHz CRYSTAL [20]
WLAN [20]
CLK_PCIE_P2
CLK_PCIE_N2
CLK_PCIE_N2 AM3
GPP_CLK2P
GPP_CLK2N SERIRQ/AGPIO87 BC12
LFRAME_L/EGPIO109 BA12
T113
SERIRQ [27]
CLK_PCIE_P3 AL2 LPC_FRAME# [27]
GPP_CLK3P
48M_X2 [34] CLK_PCIE_P3 CLK_PCIE_N3 AL4 LPC_RST_A#
SSD GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32BD11 RC602 1 2 33_0402_5%
[34] CLK_PCIE_N3 BA11 PLT_RST# [9,19,20,27]
AGPIO68/SD_CD AGPIO25 RC661 1 @ 2 0_0402_5% H_PROCHOT# [8,27,46,48,53]
48M_X1
1 RC939 2 AN2 GPP_CLK4P BA13
LPC_PME_L/SD_PWR_CTRL/AGPIO22 EC_SCI# [27] change to pop@0426
1M_0402_5% AN4 GPP_CLK4N 100K_0402_5% 1 2 RC681
AN3 GPP_CLK5P T114 2 1

2 1 AP2 GPP_CLK5N SPI_ROM_REQ/EGPIO67 BC8 150P_0402_50V8J CC615 +3VS
2 1 BB8
SPI_ROM_GNT/AGPIO76
AJ2 GPP_CLK6P
AJ4 GPP_CLK6N ESPI_RESET_L/KBRST_L/AGPIO129BB11 KB_RST# [27]
2
BC6
ESPI_ALERT_L/LDRQ0_L/EGPIO108 T112
YC2 AJ3 48M _OSC RC74 10_0402_1% RC712 4G@
BB7 APU_SPI_CLK 1 EMI@ 2 APU_SPI_CLK_R
48MHZ_8PF_X3S048000D81H-W SPI_CLK/ESPI_CLK 10K_0402_5%
APU_SPI_D1 APU_SPI_CLK_R [9]
Part Number = SJ10000AF00 SPI_DI/ESPI_DATA BA9
48M_X1 BB3 BB10 APU_SPI_D0
X48M_X1 SPI_DO
APU_SPI_D2
1
SPI_WP_L/ESPI_DAT2 BA10
APU_SPI_D3 VBIOS_ID1
3 4 SPI_HOLD_L/ESPI_DAT3 BC10
3 4 APU_SPI_CS1#
1 1 SPI_CS1_L/EGPIO118 BC9
48M_X2 SPI_IRQ#
BA5 X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30BA8
C796 C797 SPI_CS3_L/AGPIO31 BA6 no extra spi device
3.9P_0402_50V8B 3.9P_0402_50V8B APU_SPI_TPMCS# +3VS
SPI_TPM_CS_L/AGPIO29 BD8
2 2
AF8 RSVD_76
UART0_RXD
2
AF9 RSVD_77 UART0_RXD/EGPIO136 BA16 T101
UART0_TXD
UART0_TXD/EGPIO138 BB18 T102 RC711 2G@
UART0_RTS# PXS_PWREN
BC17
UART0_RTS_L/UART2_RXD/EGPIO137 T117 10K_0402_5% 2 1 RC938 10K_0402_5%
BA18 UART0_CTS#
@ UART0_CTS_L/UART2_TXD/EGPIO135 T118
SUSCLK_WLAN RTC_CLK UART0_INTR
RC1689 2 1 22 +-5% 0402 AW14 RTCCLK UART0_INTR/AGPIO139 BD18 T119
[20] SUSCLK_WLAN
1
32K_X1
AY1 X32K_X1 EGPIO141/UART1_RXD BC18
BA17 PWRGD_VGA PXS_PWREN [26,55,57]
EGPIO143/UART1_TXD
PWRGD_VGA [55]
BC16
EGPIO142/UART1_RTS_L/UART3_RXD JH1 CONN@
BB19 CHANGE PORT @3/2 APU_SPI_CS1# 1 8 +SPI_VCC
EGPIO140/UART1_CTS_L/UART3_TXD
32K_X2 WL_OFF# PXS_RST# [38] APU_SPI_D2 CS# VCC APU_SPI_CLK_R
AY4 X32K_X2 AGPIO144/UART1_INTR BB16 WL_OFF# [20]
need bios confirm 3 6
APU_SPI_D3 WP# SCLK APU_SPI_D0
7 5
4 HOLD# SI/SIO0 2 APU_SPI_D1
GND SO/SIO1
32.768KHz CRYSTAL FP5 REV 0.90
PART 5 OF 13 ACES_91960-0084N_MX25L3206EM2I
32K_X1
FP5_BGA1140~D
2 2
1
@ +1.8VS
2 1 APU_SPI_TPMCS#
SJ100001K00 YC3
32.768KHZ_12.5PF_CM31532768DZFT RC646 +1.8V_ALW
10K_0402_5%
32K_X2
2
2 1
WL_OFF#
RC914 +3VS 1 @ 2
20M_0402_5% 10K_0402_5% RC46 RC1672 1 2 0_0603_5%
1 1 RC1700 1 @ 2 0_0603_5%
CC682
CC686 15P_0402_50V8J
2
18P_0402_50V8J
2 +SPI_VCC
16MB SPI ROM 2 1
CC635 @
APU_SPI_D3
2 1 .1U_0402_16V7K
RC642 10K_0402_5% UC7
APU_SPI_D2 APU_SPI_CS1# +SPI_VCC
2 1 1 8
RC640 10K_0402_5% CS# VCC
APU_SPI_CS1# APU_SPI_D1 APU_SPI_D3
2 1 2 7
RC639 10K_0402_5% SO IO3
2 1 APU_SPI_D0 APU_SPI_D2 3 6 APU_SPI_CLK_R
RC1706 10K_0402_5% IO2 SCLK
4 5 APU_SPI_D0
VSS SI
W25Q128FWSIQ SOIC
APU_SPI_CLK
UC1J
1 2 1 2
RC680 @EMI@ C636 @EMI@
10_0402_5% 10P_0402_50V8J
USB
USB20_0_P0 AE7 AD2 USB3_DP3_MTX_DRX_P2

USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2
[32] USB20_0_P0 USB20_0_N0 AE6 AD4 USB3_DP3_MTX_DRX_N2 USB3_DP3_MTX_DRX_P2 [33]
USB 3.0 TYPEC [32] USB20_0_N0 USB_0_DM0 USBC0_A3/USB_0_TXN0/DP3_TXN2
USB3_DP3_MTX_DRX_N2 [33]
USB20_0_P1 AG10 AC2 USB3_DP3_MRX_DTX_P3
USB_0_DP1 USBC0_B11/USB_0_RXP0/DP3_TXP3
[23] USB20_0_P1 USB20_0_N1 USB3_DP3_MRX_DTX_N3 USB3_DP3_MRX_DTX_P3 [33]
USB Conn MB AG9 USB_0_DM1 AC4
USBC0_B10/USB_0_RXN0/DP3_TXN3
+1.8V_ALW [23] USB20_0_N1 USB3_DP3_MRX_DTX_N3 [33]
USB20_0_P2 USB3_DP3_MTX_DRX_P1 USB 3.0 TYPEC
AF12 USB_0_DP2 USBC0_B2/DP3_TXP1 AF4
[23] USB20_0_P2 USB20_0_N2 USB3_DP3_MTX_DRX_N1 USB3_DP3_MTX_DRX_P1 [33]
USB Conn MB AF11 USB_0_DM2 USBC0_B3/DP3_TXN1 AF2
[23] USB20_0_N2 USB3_DP3_MTX_DRX_N1 [33]
USB20_0_P3 USB3_DP3_MRX_DTX_P0
AE10 USB_0_DP3 USBC0_A11/DP3_TXP0AE3
[16] USB20_0_P3 USB20_0_N3 USB3_DP3_MRX_DTX_N0 USB3_DP3_MRX_DTX_P0 [33]
USB Cam AE9 USB_0_DM3 USBC0_A10/DP3_TXN0AE1
[16] USB20_0_N3 USB3_DP3_MRX_DTX_N0 [33]
USB20_1_P0 USB3_ATX_DRX_0_P1
AJ12 USB_1_DP0 USB_0_TXP1 AG3
[25] USB20_1_P0 USB20_1_N0 AJ11 AG1 USB3_ATX_DRX_0_N1 USB3_ATX_DRX_0_P1 [23]
USB_1_DM0 USB_0_TXN1
[25] USB20_1_N0 USB3_ATX_DRX_0_N1 [23]
USB Conn DB USB20_1_P1 USB3_ARX_DTX_0_P1
AD9 USB_1_DP1 USB_0_RXP1 AJ9 USB 3.0 JUSB1
3 [35] USB20_1_P1 USB20_1_N1 AD8 AJ8 USB3_ARX_DTX_0_N1 USB3_ARX_DTX_0_P1 [23] 3
USB HUB [35] USB20_1_N1 USB_1_DM1 USB_0_RXN1
USB3_ARX_DTX_0_N1 [23]
USB3_ATX_DRX_0_P2
5
AG4
G
USB_0_TXP2
USB3_ATX_DRX_0_N2 USB3_ATX_DRX_0_P2 [23]
QC3B USB_0_TXN2 AG2
USB3_ATX_DRX_0_N2 [23]
DMN63D8LDW-7 USB 3.0 JUSB2
AG7 USB3_ARX_DTX_0_P2
USB_0_RXP2
APU_USBC_SCL USB3_ARX_DTX_0_N2 USB3_ARX_DTX_0_P2 [23]
3 4 AM6 USBC_I2C_SCL USB_0_RXN2 AG6
S
[31,33] CCG4_APU_USBC_SCL USB3_ARX_DTX_0_N2 [23]

D
TYPEC@ AM7 USBC_I2C_SDA AA2

USBC1_A2/USB_0_TXP3/DP2_TXP2
2
AA4
G
USBC1_A3/USB_0_TXN3/DP2_TXN2
QC3A
Y1
USBC1_B11/USB_0_RXP3/DP2_TXP3
Y3
USBC1_B10/USB_0_RXN3/DP2_TXN3
APU_USBC_SDA
6 1 UX1
S
[31,33] CCG4_APU_USBC_SDA APU_DP2_P1

USBC1_B2/DP2_TXP1 AC1
D
APU_DP2_N1 APU_DP2_P1 [36]

USBC1_B3/DP2_TXN1 AC3 SA0000AQ200
USB_OC0# APU_DP2_N1 [36]
DMN63D8LDW-7 AK10 USB_OC0_L/AGPIO16 CRT
[23] USB_OC0# USB_OC1# AK9 APU_DP2_P0
TYPEC@ USB_OC1_L/AGPIO17 USBC1_A11/DP2_TXP0AB2 TPM_S@
[25] USB_OC1# USB_OC2# APU_DP2_N0 APU_DP2_P0 [36]
AL9 USB_OC2_L/AGPIO18 USBC1_A10/DP2_TXN0AB4
[32] USB_OC2# APU_DP2_N0 [36]
change port @ 1/23 AL8 USB_OC3_L/AGPIO24 S IC NPCT750JAAYX QFN 32P TPM
AW7 AGPIO14/USB_OC4_L USB_1_TXP0 AH4
+3VALW AT12 AGPIO13/USB_OC5_L USB_1_TXN0 AH2
USB_1_RXP0 AK7
USB_OC0# +3VALW
RC905 1 2 100K_0402_5% USB_1_RXN0 AK6
USB_OC1#
RC906 1 2 100K_0402_5% FP5 REV 0.90
USB_OC2#
RC61211 TYPEC@2 100K_0402_5% PART 10 OF 13
+1.8V_ALW
FP5_BGA1140~D
CX2, CX8: colse to Pin1
TPM
@
0.1U_0402_10V7K
10U_0402_6.3V6M
1 1
APU_USBC_SCL +VCC_TPM
CX2
CX8
4.7K_0402_5% 1 TYPEC@2 RC94
1 TYPEC@2 RC95 APU_USBC_SDA T116 2 2

4.7K_0402_5%
TPM@
TPM@
LPC_AD2
RX31 1 TPM_L@ 2 0_0201_5%
+VCC_TPM LPC_AD1
RX30 1 TPM_L@ 2 0_0201_5%
+SPI_VCC LPC_AD0
RX29 1 TPM_L@ 2 0_0201_5%
29
UX1 TPM_L@
VSB
1 TPM_L@: TPM LPC 650
+VCC_TPM
RX28 1 TPM_L@ 2 0_0201_5%
30
3
6
GPIO0/SDA/XOR_OUT
GPIO1/SCL
GPIO2/GPX
GPIO3/BADD
VDD
VDD
VDD
8
14
22
TPM_S@:TPM SPI 750
1
APU_SPI_D1 TPM_24 24
1
TPM_L@ RX38 RX1 1 TPM_S@2 0_0201_5% 2 +1.8VS +3VS

APU_SPI_D0 LAD0/MISO NC
TPM_S@ RX14 RX2 1 TPM_S@2 0_0201_5% 21 7
SPI_IRQ# LAD1/MOSI NC
10K_0402_5% RX3 1 TPM_S@2 0_0201_5% 18 10
LPC_AD3 LAD2/SPI_IRQ# NC +VCC_TPM
10K_0402_5% RX32 1 TPM_L@ 2 0_0201_5% 15 11 RX27 2 TPM_S@1 0_0603_5%
2
LAD3 NC
1
25
APU_SPI_CLK_R
2
NC
1
4 TPM_L@ RX39 RX4 1 TPM_S@2 0_0201_5% 19 26 4

APU_SPI_TPMCS# 1 TPM_S@2 0_0201_5% TPM_20 20 LCKL/SCLK NC 31
TPM_S@ RX13 10K_0402_5% RX5 RX26 2 TPM_L@ 1 0_0603_5%
CLKRUN#_R_TPM PLT_RST# 17 LFRAME#/SCS# NC
10K_0402_5%
TPM_24 LRESET#/SPI_RST#/SRESET#
RX6 1 TPM_S@2 0_0201_5% 27 9
LPCPD#_R CLKRUN#_R_TPM 13
2
CLKRUN# RX36 1 TPM_L@ 2 0_0201_5% SERIRQ GND 16

TPM_20 LPCPD#_R
2
LPCPD# RX37 1 TPM_L@ 2 0_0201_5% 28 CLKRUN#/GPIO4/SINT# GND 23

LPCPD# GND 32 +SPI_VCC
+VCC_TPM SERIRQ RX35 1 TPM_L@ 2 0_0201_5% 4 GND 33
+VCC_TPM 5 PP PGND 12
TEST Reserved TPM_S@
SPI_IRQ#
NPCT650VB2YX QFN 32P 5X5 RX161 2
LPCI_CLK_TPM
10U_0402_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
10U_0402_6.3V6M
0.1U_0402_10V7K
1 1 1 1 1 RX33 1 TPM_L@ 2 0_0201_5%

LPC_FRAME# 10K_0402_5%
RX34 1 TPM_L@ 2 0_0201_5%
UX1 place colse to UC7
CX13 @
CX10 TPM@
CX11 TPM@
CX9
CX12 TPM@
2 2 2 2 2
TPM@
FP4 SATA/CLK/USB/SPI
Custom 0.3(X02)
Date : Thursday, November 09, 2017 Sheet 10 of 61
A B C D E
A B C D E
Main Func = CPU
+1.2V_DDR
CC33
CC34
CC35
CC36
CC37
CC38
+1.2V_DDR UC1F
CC32
1 1 1 1 1 1 1 1
CC21
CC22
CC23
CC24
CC25
CC26
CC27
CC28
CC29
CC30
CC31
1
1 1 1 1 1 1 1 1 1 1 1 TDC :10A POWER TDC: 35A
180P_0402_50V8J
180P_0402_50V8J
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
+APU_VDDSOC EDC: 13A M15 VDDCR_SOC_1 VDDCR_1 G7 EDC: 45A +APU_VDDCORE

2 2 2 2 2 2
180P_0402_50V8J
M18 VDDCR_SOC_2 VDDCR_2 G10

2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
M19 VDDCR_SOC_3 VDDCR_3 G12

2 2 2 2 2 2 2 2 2 2 2 N16 VDDCR_SOC_4 VDDCR_4 G14
N18 VDDCR_SOC_5 VDDCR_5 H8
N20 VDDCR_SOC_6 VDDCR_6 H11
P17 H15
P19
VDDCR_SOC_7
VDDCR_SOC_8
VDDCR_7
VDDCR_8 K7 All BU(on bottom side under SOC)
R18 VDDCR_SOC_9 VDDCR_9 K12
R20 K14
ACROSS VDDIO AND VSS SPLIT T19
VDDCR_SOC_10
VDDCR_SOC_11
VDDCR_10
VDDCR_11 L8
U18 VDDCR_SOC_12 VDDCR_12 M7 +APU_VDDCORE
U20 VDDCR_SOC_13 VDDCR_13 M10
CC39
CC40
CC41
CC42
CC43
CC44
CC45
CC46
CC47
CC48
CC49
CC50
V19 VDDCR_SOC_14 VDDCR_14 N14
W18 P7
All BU(on bottom side under SOC) W20
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_15
VDDCR_16 P10
1 1 1 1 1 1 1 1 1 1 1 1
Y19 VDDCR_SOC_17 VDDCR_17 P13
180P_0402_50V8J
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VDDCR_18 P15
TDC :6A T32 VDDIO_MEM_S3_1 VDDCR_19 R8 2 2 2 2 2 2 2 2 2 2 2 2
+1.2V_DDR
V28 VDDIO_MEM_S3_2 VDDCR_20 R14
W28 VDDIO_MEM_S3_3 VDDCR_21 R16
W32 VDDIO_MEM_S3_4 VDDCR_22 T7
Y22 VDDIO_MEM_S3_5 VDDCR_23 T10
AA20 VDDIO_MEM_S3_8 VDDCR_26 T17
AA23 VDDIO_MEM_S3_9 VDDCR_27 U14
AA26 VDDIO_MEM_S3_10 VDDCR_28 U16
+1.8VS RC97 1 2 0_0402_5% VDDIO_AUDIO AA28 VDDIO_MEM_S3_11 VDDCR_29 V13
AA32 V15
FOR DEBUG ONLY AC20
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDCR_30
VDDCR_31 V17
RC96 0_0402_5% +1.8V_ALW RC6125 1 @ 2 0_0402_5% AC22 VDDIO_MEM_S3_14 VDDCR_32 W7
+3VS 1 @ 2 +3VS_APU AC25 VDDIO_MEM_S3_15 VDDCR_33 W10
CC1191 22U_0603_6.3V6M
CC1192 1U_0402_6.3V6K
AC28 VDDIO_MEM_S3_16 VDDCR_34 W14

CC65
CC1189 1U_0402_6.3V6K
CC1190 1U_0402_6.3V6K
1 1 AD23 VDDIO_MEM_S3_17 VDDCR_35 W16

1 1 1 AD26 VDDIO_MEM_S3_18 VDDCR_36 Y8
AD28 VDDIO_MEM_S3_19 VDDCR_37 Y13 +APU_VDDSOC
2 AD32 VDDIO_MEM_S3_20 VDDCR_38 Y15 2
2 2
10U_0603_6.3V6M
CC61
CC62
CC56
CC57
CC63
CC58
CC64
CC59
CC60
AE20 VDDIO_MEM_S3_21 VDDCR_39 Y17
2 2 2 AE22 AA7
VDDIO_MEM_S3_22 VDDCR_40 1 1 1 1 1 1 1 1 1
AE25 VDDIO_MEM_S3_23 VDDCR_41 AA10
AE28 VDDIO_MEM_S3_24 VDDCR_42 AA14
180P_0402_50V8J
1U_0402_6.3V6K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
AF23 VDDIO_MEM_S3_25 VDDCR_43 AA16
AF26 VDDIO_MEM_S3_26 VDDCR_44 AA18 2 2 2 2 2 2 2 2 2
AF28 VDDIO_MEM_S3_27 VDDCR_45 AB13
AF32 VDDIO_MEM_S3_28 VDDCR_46 AB15
AG20 VDDIO_MEM_S3_29 VDDCR_47 AB17
AG22 VDDIO_MEM_S3_30 VDDCR_48 AB19
AG25 AC14
+VDDP_ALW AG28
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDCR_49
VDDCR_50 AC16
+3VALW_APU +1.8V_ALW +1.8VS +0.9VALW
AJ20 VDDIO_MEM_S3_33 VDDCR_51 AC18
AJ23 VDDIO_MEM_S3_34 VDDCR_52 AD7
CC66
CC67
CC68
CC69
CC70
CC71
CC72
CC73
CC74
CC75
CC76
CC77
CC78

1 1 1 1 1 1 1 1 1 1 1 1 1 AJ28 VDDIO_MEM_S3_36 VDDCR_54 AD13
AK28 VDDIO_MEM_S3_38 VDDCR_56 AD17
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AL28 VDDIO_MEM_S3_39 VDDCR_57 AD19

2 2 2 2 2 2 2 2 2 2 2 2 2 AL32 VDDIO_MEM_S3_40 VDDCR_58 AE8 +APU_VDDCORE
TDC :0.2A VDDCR_59 AE14
VDDIO_AUDIO
AP12 VDDIO_AUDIO VDDCR_60 AE16
CC51
CC52
CC53
CC54
CC55
VDDCR_61 AE18
+3VS_APU TDC :0.25A AL18 VDD_33_1 VDDCR_62 AF7 1 1 1 1 1
AM17 VDD_33_2 VDDCR_63 AF10
VDDCR_64 AF13
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+1.8VS TDC :2A AL20 VDD_18_1 VDDCR_65 AF15
AM19 VDD_18_2 VDDCR_66 AF17 2 2 2 2 2
AF19
BU BO BU TDC :0.5A AL19
VDDCR_67
AG14
BO BU BO BO BU +1.8V_ALW_APU
AM18
VDD_18_S5_1
VDD_18_S5_2
VDDCR_68
VDDCR_69 AG16
VDDCR_70 AG18
+3VALW_APU TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
AM16 VDD_33_S5_2 VDDCR_72 AH15
VDDCR_73 AH17
+0.9VALW_APU TDC :1A AL14 VDDP_S5_1 VDDCR_74 AH19
AL15 VDDP_S5_2 VDDCR_75 AJ7
AM14 VDDP_S5_3 VDDCR_76 AJ10
TDC :4A VDDCR_77 AJ14
3 3
+0.9VS AL13 VDDP_1 VDDCR_78 AJ16
+0.9VS
AM12 VDDP_2 VDDCR_79 AJ18
AM13 VDDP_3 VDDCR_80 AK13
CC79
CC80
CC81
CC82
CC83
CC84
CC85
CC86
CC87
CC88
CC89
AN12 VDDP_4 VDDCR_81 AK15

1 1 1 1 1 1 1 1 1 1 1 AN13 VDDP_5 VDDCR_82 AK17
+1.8V_ALW RC6129 1 @ 2 0_0402_5% +1.8V_ALW_APU TDC :4.5UA VDDCR_83 AK19
+RTC_APU_R AT11
+RTC_APU_R VDDBT_RTC_G
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
2 2 2 2 2 2 2 2 2 2 2 RC6128 2 @ 1 0_0402_5% FP5 REV 0.90

+0.9VALW +0.9VALW_APU
PART 6 OF 13
FP5_BGA1140~D
@
JP2
2 1
+CHGRTC 2 1 +3VLP
JUMP_43X39
BO BU
RTC OF APU
SHORT
+RTC_APU
RC6126 1 2 0_0402_5% W=20mils +RTC_APU +RTCVCC

+RTC_APU_R Vo=1.5V
RC98 1 2 1K_0402_5%
+3VALW DC1
3 3 +RTCBATT_R 1 2
UC20
5 1
1 1 Need OPEN Vout 1 1 anode RC99 1K_0402_5%
+RTCBATT
+3VALW IN OUT +3VALW_APU Vin cathode
for Clear CMOS
1
CC90 CC91 @ 2 2 +CHGRTC

2 0.22U_0402_10V6K 1U_0402_6.3V6K CLRP1 GND anode
GND 1 1
2 2 SHORT PADS UC8 BAS40C_SOT23-3
2
4 3 RC6127 1 @ 2 10K_0402_5% CC92 CC93

[27] PCH_PWR_EN EN OC 0.1U_0603_25V7K AP2138N-1.5TRG1_SOT23-3 680P_0603_50V8J
SY6288C20AAC_SOT23-5 2 2
@
1 close to UC1
@
+RTCBATT_R
0.1U_0603_25V7K
CC1193
4 2 4
2
RTC (gen 9)reset circuit

G
1
RC801 3 1
RTC_DET# [9]
10M_0402_5%
S

2
QC27
2N7002K_SOT23-3 2016/01/07 2017/01/07 Title
FP4 PWR
Custom 0.3(X02)
A B C D E
5 4 3 2 1
Main Func = CPU UC1G

UC1H UC1K
GND
N12 VSS_316 VSS_62 K32 GND
A3 VSS_1 VSS_63 L5 V8 VSS_124 VSS_186 AG8 GND/RSVD
A5 VSS_2 VSS_64 L13 V11 VSS_125 VSS_187 AG11 AR5 VSS_248 VSS_310 BD16
A19 VSS_8 VSS_70 M1 V22 VSS_131 VSS_193 AH14 AR21 VSS_254
A21 VSS_9 VSS_71 M5 V25 VSS_132 VSS_194 AH16 AR26 VSS_255
D A23 M12 W1 AH18 AR28 D
VSS_10 VSS_72 VSS_133 VSS_195 VSS_256
A26 VSS_11 VSS_73 M21 W5 VSS_134 VSS_196 AH20 AR32 VSS_257
A30 VSS_12 VSS_74 M23 W13 VSS_135 VSS_197 AJ1 AU5 VSS_258
C3 VSS_13 VSS_75 M26 W15 VSS_136 VSS_198 AJ5 AU8 VSS_259
C32 VSS_14 VSS_76 M28 W17 VSS_137 VSS_199 AJ13 AU11 VSS_260
D16 VSS_15 VSS_77 M32 W19 VSS_138 VSS_200 AJ15 AU13 VSS_261
D18 VSS_16 VSS_78 N4 W23 VSS_139 VSS_201 AJ17 AU15 VSS_262
D20 VSS_17 VSS_79 N5 W26 VSS_140 VSS_202 AJ19 AU18 VSS_263
E7 VSS_18 VSS_80 N8 Y5 VSS_141 VSS_203 AK5 AU20 VSS_264
E8 VSS_19 VSS_81 N11 Y11 VSS_142 VSS_204 AK8 AU22 VSS_265
E10 VSS_20 VSS_82 N13 Y12 VSS_143 VSS_205 AK11 AU25 VSS_266 RSVD_1 B20
E11 VSS_21 VSS_83 N15 Y14 VSS_144 VSS_206 AK12 AU28 VSS_267 RSVD_5 G3
E12 VSS_22 VSS_84 N17 Y16 VSS_145 VSS_207 AK14 AV1 VSS_268 RSVD_7 J20
E13 VSS_23 VSS_85 N19 Y18 VSS_146 VSS_208 AK16 AV5 VSS_269 RSVD_8 K3
E14 VSS_24 VSS_86 N22 Y20 VSS_147 VSS_209 AK18 AV7 VSS_270 RSVD_9 K6
E15 VSS_25 VSS_87 N25 AA1 VSS_148 VSS_210 AK20 AV10 VSS_271 RSVD_10 K20
E16 VSS_26 VSS_88 N28 AA5 VSS_149 VSS_211 AK22 AV12 VSS_272 RSVD_11 M3
E18 VSS_27 VSS_89 P1 AA13 VSS_150 VSS_212 AK25 AV14 VSS_273 RSVD_12 M6
E19 VSS_28 VSS_90 P5 AA15 VSS_151 VSS_213 AL1 AV16 VSS_274 RSVD_13 M13
E20 VSS_29 VSS_91 P14 AA17 VSS_152 VSS_214 AL5 AV19 VSS_275 RSVD_22 P6
E21 VSS_30 VSS_92 P16 AA19 VSS_153 VSS_215 AL7 AV21 VSS_276 RSVD_23 P22
E22 VSS_31 VSS_93 P18 AB14 VSS_154 VSS_216 AL10 AV23 VSS_277 RSVD_30 T3
E26 VSS_34 VSS_96 P26 AB20 VSS_157 VSS_219 AL23 AV32 VSS_280 RSVD_44 W6
E27 VSS_35 VSS_97 P28 AC5 VSS_158 VSS_220 AL26 AW5 VSS_281 RSVD_49 W21
F5 VSS_36 VSS_98 P32 AC8 VSS_159 VSS_221 AM5 AW28 VSS_282 RSVD_50 W22
F28 VSS_37 VSS_99 R5 AC11 VSS_160 VSS_222 AM8 AY6 VSS_283 RSVD_57 Y21
G1 VSS_38 VSS_100 R11 AC12 VSS_161 VSS_223 AM15 AY7 VSS_284 RSVD_58 Y27
G5 VSS_39 VSS_101 R12 AC13 VSS_162 VSS_224 AM20 AY8 VSS_285 RSVD_59 AA3
G16 VSS_40 VSS_102 R13 AC15 VSS_163 VSS_225 AM22 AY10 VSS_286 RSVD_60 AA6
G19 VSS_41 VSS_103 R15 AC17 VSS_164 VSS_226 AM25 AY11 VSS_287 RSVD_69 AC29
C G21 R17 AC19 AM28 AY12 AD3 C
VSS_42 VSS_104 VSS_165 VSS_227 VSS_288 RSVD_70
G23 VSS_43 VSS_105 R19 AD1 VSS_166 VSS_228 AN1 AY13 VSS_289 RSVD_71 AD6
G26 VSS_44 VSS_106 R22 AD5 VSS_167 VSS_229 AN5 AY14 VSS_290 RSVD_74 AF3
H5 VSS_47 VSS_109 R30 AD18 VSS_170 VSS_232 AN15 AY18 VSS_293 RSVD_79 AJ6
H13 VSS_48 VSS_110 T1 AD20 VSS_171 VSS_233 AN18 AY19 VSS_294 RSVD_80 AJ24
H18 VSS_49 VSS_111 T5 AE5 VSS_172 VSS_234 AN21 AY20 VSS_295 RSVD_81 AK23
H20 VSS_50 VSS_112 T14 AE11 VSS_173 VSS_235 AN23 AY21 VSS_296 RSVD_82 AK27
H22 VSS_51 VSS_113 T16 AE12 VSS_174 VSS_236 AN26 AY22 VSS_297 RSVD_83 AL3
H25 VSS_52 VSS_114 T18 AE13 VSS_175 VSS_237 AN28 AY23 VSS_298 RSVD_87 AN29
H28 VSS_53 VSS_115 T20 AE15 VSS_176 VSS_238 AN32 AY25 VSS_299 RSVD_88 AN31
K1 VSS_54 VSS_116 T23 AE17 VSS_177 VSS_239 AP5 AY26 VSS_300
K5 VSS_55 VSS_117 T26 AE19 VSS_178 VSS_240 AP8 AY27 VSS_301
K16 VSS_56 VSS_118 T28 AF1 VSS_179 VSS_241 AP13 BB1 VSS_302
K19 VSS_57 VSS_119 U13 AF5 VSS_180 VSS_242 AP15 BB20 VSS_303
K21 VSS_58 VSS_120 U15 AF14 VSS_181 VSS_243 AP18 BB32 VSS_304 RSVD_14 M14
K22 VSS_59 VSS_121 U17 AF16 VSS_182 VSS_244 AP20 BD3 VSS_305 RSVD_84 AL6
K26 VSS_60 VSS_122 U19 AF18 VSS_183 VSS_245 AP25 BD7 VSS_306 RSVD_85 AL11
K28 VSS_61 VSS_123 V5 AF20 VSS_184 VSS_246 AP28 BD10 VSS_307 RSVD_86 AN16
FP5 REV 0.90 AG5 VSS_185 VSS_247 AR1 BD12 VSS_308
PART 7 OF 13 FP5 REV 0.90 BD14 VSS_309
PART 8 OF 13 FP5 REV 0.90
FP5_BGA1140~D
PART 11 OF 13
@ FP5_BGA1140~D
@ FP5_BGA1140~D
@
UC1M UC1L
CAMERAS RSVD
B T11 AA9 B
RSVD_32 RSVD_62
A18 CAM0_CSI2_CLOCKP CAM0_CLK B15 RSVD_61 AA8
C18 CAM0_CSI2_CLOCKN AC7 RSVD_66 RSVD_65 AC6
CAM0_I2C_SCL D15
A15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA C14
C15 CAM0_CSI2_DATAN0 Y9 RSVD_55
CAM0_SHUTDOWN B13 Y10 RSVD_56 RSVD_72 AD11
B16 CAM0_CSI2_DATAP1
C16 CAM0_CSI2_DATAN1 W11 RSVD_47 RSVD_67 AC9
W12 RSVD_48 RSVD_63 AA11
C19 CAM0_CSI2_DATAP2
B18 CAM0_CSI2_DATAN2 V9 RSVD_38 RSVD_33 T12
V10 RSVD_39 RSVD_73 AD12
B17 CAM0_CSI2_DATAP3
D17 CAM0_CSI2_DATAN3 RSVD_53 Y6
RSVD_54 Y7
D12 CAM1_CSI2_CLOCKP CAM1_CLK B10
B12 CAM1_CSI2_CLOCKN AA12 RSVD_64 RSVD_45 W8
CAM1_I2C_SCL A11 AC10 RSVD_68 RSVD_46 W9
C13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA C11
A13 CAM1_CSI2_DATAN0
CAM1_SHUTDOWN D11 FP5 REV 0.90
B11 CAM1_CSI2_DATAP1 PART 12 OF 13
C12 CAM1_CSI2_DATAN1 CAM_PRIV_LED D13 FP5_BGA1140~D
CAM_IR_ILLU D10
J13 RSVD_6 FP5 REV 0.90
@
PART 13 OF 13
FP5_BGA1140~D
@
A A

FP4 GND
Custom 0.3(X02)
5 4 3 2 1
A B C D E
Main Func = DIMM1 +1.2V_DDR

DDR_A_DQ[0..63]
DDR_A_DQ[0..63] [7]
JDIMM1 CONN@
+1.2V_DDR DDR_A_DM[0..7]
DDR_A_DM[0..7] [7]
1 2
DDR_A_DQ5 VSS1 VSS2 DDR_A_DQ4 DDR_A_MA[0..13]
3 4 DDR_A_MA[0..13] [7]
5 DQ5 DQ4 6
DDR_A_DQ1 7 VSS3 VSS4 8 DDR_A_DQ0
9 DQ1 DQ0 10
DDR_A_DQS0# 11 VSS5 VSS6 12 DDR_A_DM0
[7] DDR_A_DQS0# DDR_A_DQS0 DQS0_c DM0_n/DBI0_n
13 14
[7] DDR_A_DQS0 DQS0_t VSS7 DDR_A_DQ6 DDR_A_RST#
15 16 1 2
DDR_A_DQ7 17 VSS8 DQ6 18 CD1 @ESD@
19 DQ7 VSS9 20 DDR_A_DQ2 100P_0402_50V8J
DDR_A_DQ3 21 VSS10 DQ2 22
23 DQ3 VSS11 24 DDR_A_DQ12
1 DDR_A_DQ9 29 VSS14 DQ8 30 1
31 DQ9 VSS15 32 DDR_A_DQS1#
DDR_A_DM1 VSS16 DQS1_c DDR_A_DQS1 DDR_A_DQS1# [7]
33 34
DM1_n/DBI_n DQS1_t DDR_A_DQS1 [7]
35 36
39 DQ15 DQ14 40
43 DQ10 DQ11 44
47 DQ21 DQ20 48
51 DQ17 DQ16 52
[7] DDR_A_DQS2# DDR_A_DQS2 DQS2_c DM2_n/DBI2_n
55 56 +1.2V_DDR
[7] DDR_A_DQS2 DQS2_t VSS27 DDR_A_DQ22
57 58
DDR_A_DQ19 VSS30 DQ18 1 1 1 1 1 1 1 1 1 1 1 1 1 1
63 64 CD2 CD3 CD4 CD5 CD6 CD7
65 DQ19 VSS31 66 DDR_A_DQ28 CD8 CD9 CD10 CD11 CD12 CD13 CD14 CD15
DDR_A_DQ29 VSS32 DQ28
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
67 68
DQ29 VSS33 DDR_A_DQ24 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
69 70
75 76
DM3_n/DBI3_n DQS3_t DDR_A_DQS3 [7]
77 78
81 DQ30 DQ31 82
DDR_A_DQ26 83 VSS39 VSS40 84 DDR_A_DQ27 +0.6V_DDR_VTT
85 DQ26 DQ27 86
87 VSS41 VSS42 88
89 CB5/NC CB4/NC 90
VSS43 VSS44 1 1 1
91 92 CD17 CD18
93 CB1/NC CB0/NC 94 CD16
VSS45 VSS46
10U_0603_6.3V6M
10U_0603_6.3V6M
95 96
DQS8_c DM8_n/DBI_n/NC 2 2 2
1U_0402_6.3V6K
97 98
99 DQS8_t VSS47 100
101 VSS48 CB6/NC 102
2 103 CB2/NC VSS49 104 2
105 VSS50 CB7/NC 106
107 CB3/NC VSS51 108 DDR_A_RST#
DDR_A_CKE0 VSS52 RESET_n DDR_A_CKE1 DDR_A_RST# [7]
109 110
[7] DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 [7]
111 112
DDR_A_BG1 113 VDD1 VDD2 114 DDR_A_ACT#
[7] DDR_A_BG1 DDR_A_BG0 115 BG1 ACT_n 116 DDR_A_ALERT# DDR_A_ACT# [7] Follow CRB design
[7] DDR_A_BG0
DDR_A_MA12
DDR_A_MA9
117
119
BG0
VDD3
A12
ALERT_n
VDD4
A11
118
120 DDR_A_MA11
DDR_A_MA7
DDR_A_ALERT# [7]
reserve
121 122 +VREF_CA +1.2V_DDR
123 A9 A7 124
DDR_A_MA8 125 VDD5 VDD6 126 DDR_A_MA5
DDR_A_MA6 127 A8 A5 128 DDR_A_MA4 2 +1.2V_DDR +0.6V_DDR_VTT
129 A6 A4 130 RD1
DDR_A_MA3 131 VDD7 VDD8 132 DDR_A_MA2 1K_0402_1%
DDR_A_MA1 133 A3 A2 134 DDR_A_EVENT#
A1 EVENT_n/NF DDR_A_EVENT# [7]
10P_0402_50V8J
CD19
10P_0402_50V8J
CD20
10P_0402_50V8J
CD21
10P_0402_50V8J
CD22
10P_0402_50V8J
CD23
135 136
DDR_A_CLK0 DDR_A_CLK1 +VREF_CA
1
137 VDD9 VDD10 138

[7] DDR_A_CLK0 DDR_A_CLK0# CK0_t CK1_t/NF DDR_A_CLK1# DDR_A_CLK1 [7] 1 1 1 1 1
139 140
[7] DDR_A_CLK0# 141 CK0_c CK1_c/NF 142 DDR_A_CLK1# [7]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_PAR VDD11 VDD12 DDR_A_MA0
@RF@
@RF@
@RF@
@RF@
@RF@
143 144
[7] DDR_A_PAR DDR_A_BA1 145 PARITY A0 146 DDR_A_MA10 @ 2 2 2 2 2
[7] DDR_A_BA1 BA1 A10/AP 1 1 1
2
147 148 CD24 CD25 CD26

DDR_A_CS0# 149 VDD13 VDD14 150 DDR_A_BA0 4.7U_0402_6.3V6K RD2
[7] DDR_A_CS0# DDR_A_WE# CS0_n BA0 DDR_A_RAS# DDR_A_BA0 [7]
151 152 1K_0402_1%
[7] DDR_A_MA14_WE# WE_n/A14 RAS_n/A16 DDR_A_MA16_RAS# [7] 2 2 2
153 154
DDR_A_ODT0 VDD15 VDD16 DDR_A_CAS#
2.2U_0402_6.3V6M
CD27
2.2U_0402_6.3V6M
CD28
2.2U_0402_6.3V6M
CD29
2.2U_0402_6.3V6M
CD30
2.2U_0402_6.3V6M
CD31
155 156
[7] DDR_A_ODT0 DDR_A_CS1# DDR_A_MA13 DDR_A_MA15_CAS# [7]
1
157 ODT0 CAS_n/A15 158

[7] DDR_A_CS1# CS1_n A13 1 1 1 1 1
159 160 +VREF_CA
DDR_A_ODT1 161 VDD17 VDD18 162
[7] DDR_A_ODT1 ODT1 C0/CS2_n/NC
@RF@
@RF@
@RF@
@RF@
@RF@
163 164
165 VDD19 VREFCA 166 2 2 2 2 2
167 C1, CS3_n,NC SA2 168
171 DQ37 DQ36 172
1000P_0402_50V7K

DQ33 DQ32 1
175 176
CD32

3 [7] DDR_A_DQS4# DDR_A_DQS4 DQS4_c DM4_n/DBI4_n 3
179 180
[7] DDR_A_DQS4 DQS4_t VSS59 DDR_A_DQ39 2
181 182
DDR_A_DQ38 183 VSS60 DQ39 184
185 DQ38 VSS61 186 DDR_A_DQ35
DDR_A_DQ34 187 VSS62 DQ35 188
189 DQ34 VSS63 190 DDR_A_DQ45
DDR_A_DQ44 191 VSS64 DQ45 192
193 DQ44 VSS65 194 DDR_A_DQ41
DDR_A_DQ40 195 VSS66 DQ41 196
199 200
DM5_n/DBI5_n DQS5_t DDR_A_DQS5 [7]
201 202
205 DQ46 DQ47 206
209 DQ42 DQ43 210
213 DQ52 DQ53 214
217 DQ49 DQ48 218
[7] DDR_A_DQS6# DDR_A_DQS6 DQS6_c DM6_n/DBI6_n +2.5V_MEM
221 222
[7] DDR_A_DQS6 DQS6_t VSS79 DDR_A_DQ54
223 224
DDR_A_DQ55 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_A_DQ50
DDR_A_DQ51 229 VSS82 DQ50 230 +1.2V_DDR
231 DQ51 VSS83 232 DDR_A_DQ60
DDR_A_DQ61 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_A_DQ57
DDR_A_DQ56 VSS86 DQ57 1 1 1
237 238 CD37 CD34
239 DQ56 VSS87 240 DDR_A_DQS7# CD36
DDR_A_DM7 VSS88 DQS7_c DDR_A_DQS7 DDR_A_DQS7# [7] 1
330U_D2_2V_Y
10U_0603_6.3V6M
10U_0603_6.3V6M
241 242
<Address: 000> DM7_n/DBI7_n DQS7_t DDR_A_DQS7 [7] 2 2 2
CD35
1U_0402_6.3V6K
243 244 +
247 DQ62 DQ63 248
+2.5V_MEM DDR_A_DQ58 249 VSS91 VSS92 250 DDR_A_DQ59 2
251 DQ58 DQ59 252
4 253 VSS93 VSS94 254 4
[9,14,22,36] APU_SCLK0 SCL SDA APU_SDATA0 [9,14,22,36]
255 256
+3VS VDDSPD SA0
257 258 +0.6V_DDR_VTT
259 VPP1 VTT 260
1 VPP2 SA1
261 262
CD38 GND1 GND2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD39
LOTES_ADDR0206-P001A02~D Security Classification Compal Secret Data Compal Electronics, Inc.
2 DEREN_40-42271-26001RHF Title
Issued Date 2016/01/07 Deciphered Date 2017/01/07
SP07001CY0L
DDR4 SODIMM-I Socket
C 0.3(X02)
DIMM_A H:4mm RVS
A B C D E
A B C D E
Main Func = DIMM2

+1.2V_DDR JDIMM2 CONN@ +1.2V_DDR
1 2
DDR_B_DQ5 3 VSS1 VSS2 4 DDR_B_DQ4
DQ5 DQ4 DDR_B_DQ[0..63]
5 6
DDR_B_DQ1 7 VSS3 VSS4 8 DDR_B_DQ0 DDR_B_DQ[0..63] [7]
DQ1 DQ0 DDR_B_DM[0..7]
9 10 DDR_B_DM[0..7] [7]
DDR_B_DQS0# 11 VSS5 VSS6 12 DDR_B_DM0
[7] DDR_B_DQS0# DDR_B_DQS0 DQS0_c DM0_n/DBI0_n DDR_B_MA[0..13]
13 14
[7] DDR_B_DQS0 DQS0_t VSS7 DDR_B_DQ6 DDR_B_MA[0..13] [7]
15 16
DDR_B_DQ7 17 VSS8 DQ6 18
19 DQ7 VSS9 20 DDR_B_DQ2
DDR_B_DQ3 21 VSS10 DQ2 22 DDR_B_RST# 1 2
23 DQ3 VSS11 24 DDR_B_DQ12 CD40 @ESD@
DDR_B_DQ13 25 VSS12 DQ12 26 100P_0402_50V8J
1
27 DQ13 VSS13 28 DDR_B_DQ8 1
31 DQ9 VSS15 32 DDR_B_DQS1#
DDR_B_DM1 VSS16 DQS1_c DDR_B_DQS1 DDR_B_DQS1# [7]
33 34
DM1_n/DBI_n DQS1_t DDR_B_DQS1 [7]
35 36
39 DQ15 DQ14 40
43 DQ10 DQ11 44
47 DQ21 DQ20 48
DDR_B_DQ17 49 VSS23 VSS24 50 DDR_B_DQ16 +1.2V_DDR
51 DQ17 DQ16 52
[7] DDR_B_DQS2# DDR_B_DQS2 DQS2_c DM2_n/DBI2_n
55 56 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[7] DDR_B_DQS2 DQS2_t VSS27 DDR_B_DQ22
57 58 CD41 CD42 CD43 CD44 CD45 CD46
DDR_B_DQ23 59 VSS28 DQ22 60 CD47 CD48 CD49 CD50 CD51 CD52 CD53 CD54
DQ23 VSS29 DDR_B_DQ18
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
61 62
DDR_B_DQ19 VSS30 DQ18 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
63 64
75 76
DM3_n/DBI3_n DQS3_t DDR_B_DQS3 [7]
77 78 +0.6V_DDR_VTT
81 DQ30 DQ31 82
DQ26 DQ27 1 1 1
85 86 CD56 CD57
87 VSS41 VSS42 88 CD55
CB5/NC CB4/NC
10U_0603_6.3V6M
10U_0603_6.3V6M
89 90
VSS43 VSS44 2 2 2
1U_0402_6.3V6K
91 92
93 CB1/NC CB0/NC 94
95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
99 DQS8_t VSS47 100
2 101 VSS48 CB6/NC 102 2
103 CB2/NC VSS49 104
105 VSS50 CB7/NC 106
107 CB3/NC VSS51 108 DDR_B_RST#
DDR_B_CKE0 VSS52 RESET_n DDR_B_CKE1 DDR_B_RST# [7]
109 110
[7] DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 [7]
111 112
DDR_B_BG1 113 VDD1 VDD2 114 DDR_B_ACT#
[7] DDR_B_BG1 DDR_B_BG0 BG1 ACT_n DDR_B_ALERT# DDR_B_ACT# [7]
115 116
[7] DDR_B_BG0 BG0 ALERT_n DDR_B_ALERT# [7]
117 118
DDR_B_MA12 119 VDD3 VDD4 120 DDR_B_MA11
DDR_B_MA9 121 A12 A11 122 DDR_B_MA7
123 A9 A7 124
DDR_B_MA6 127 A8 A5 128 DDR_B_MA4
129 A6 A4 130
DDR_B_MA1 133 A3 A2 134 DDR_B_EVENT#
A1 EVENT_n/NF DDR_B_EVENT# [7]
135 136
DDR_B_CLK0 137 VDD9 VDD10 138 DDR_B_CLK1
[7] DDR_B_CLK0 DDR_B_CLK0# CK0_t CK1_t/NF DDR_B_CLK1# DDR_B_CLK1 [7]
139 140
[7] DDR_B_CLK0# CK0_c CK1_c/NF DDR_B_CLK1# [7]
141 142
DDR_B_PAR 143 VDD11 VDD12 144 DDR_B_MA0 +VREFB_CA +1.2V_DDR
[7] DDR_B_PAR DDR_B_BA1 145 PARITY A0 146 DDR_B_MA10
[7] DDR_B_BA1 BA1 A10/AP
147 148
DDR_B_CS0# VDD13 VDD14 DDR_B_BA0
2
149 150
[7] DDR_B_CS0# DDR_B_WE# CS0_n BA0 DDR_B_RAS# DDR_B_BA0 [7]
151 152 RD3
[7] DDR_B_MA14_WE# WE_n/A14 RAS_n/A16 DDR_B_MA16_RAS# [7]
153 154 1K_0402_1%
DDR_B_ODT0 155 VDD15 VDD16 156 DDR_B_CAS#
[7] DDR_B_ODT0 DDR_B_CS1# ODT0 CAS_n/A15 DDR_B_MA13 DDR_B_MA15_CAS# [7]
157 158
[7] DDR_B_CS1# +VREFB_CA
1
159 CS1_n A13 160

15mil DDR_B_ODT1 161 VDD17 VDD18 162
[7] DDR_B_ODT1 ODT1 C0/CS2_n/NC
163 164
+VREFB_CA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
165 VDD19 VREFCA 166

1000P_0402_50V7K
167 C1, CS3_n,NC SA2 168 @

DDR_B_DQ37 VSS53 VSS54 DDR_B_DQ36 1 1 1 1
2
169 170 CD59 CD60 CD61

CD58
171 DQ37 DQ36 172 4.7U_0402_6.3V6K RD4

DDR_B_DQ33 173 VSS55 VSS56 174 DDR_B_DQ32 1K_0402_1%
175 DQ33 DQ32 176 2 2 2 2
3 DDR_B_DQS4# 177 VSS57 VSS58 178 DDR_B_DM4 3
[7] DDR_B_DQS4# DDR_B_DQS4
1
179 DQS4_c DM4_n/DBI4_n 180

181 182
DDR_B_DQ38 183 VSS60 DQ39 184
185 DQ38 VSS61 186 DDR_B_DQ35
DDR_B_DQ34 187 VSS62 DQ35 188
189 DQ34 VSS63 190 DDR_B_DQ45
DDR_B_DQ44 191 VSS64 DQ45 192
193 DQ44 VSS65 194 DDR_B_DQ41
DDR_B_DQ40 195 VSS66 DQ41 196
199 200
201 202
205 DQ46 DQ47 206
209 DQ42 DQ43 210 +2.5V_MEM
213 DQ52 DQ53 214
217 DQ49 DQ48 218
[7] DDR_B_DQS6# DDR_B_DQS6 DQS6_c DM6_n/DBI6_n
221 222
223 224 1 1 1
DDR_B_DQ55 225 VSS80 DQ54 226 CD65 CD66
227 DQ55 VSS81 228 DDR_B_DQ50 CD64
DDR_B_DQ51 VSS82 DQ50
10U_0603_6.3V6M
10U_0603_6.3V6M
229 230
DQ51 VSS83 DDR_B_DQ60 2 2 2
1U_0402_6.3V6K
231 232
DDR_B_DQ61 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_B_DQ57
DDR_B_DQ56 237 VSS86 DQ57 238
241 242
243 244
+2.5V_MEM DDR_B_DQ62 245 VSS89 VSS90 246 DDR_B_DQ63
247 DQ62 DQ63 248
4 251 DQ58 DQ59 252 4
253 VSS93 VSS94 254
[9,13,22,36] APU_SCLK0 SCL SDA APU_SDATA0 [9,13,22,36]
255 256 +3VS
+3VS VDDSPD SA0
1 257 258
VPP1 VTT +0.6V_DDR_VTT
259 260
CD67 261 VPP2 SA1 262
GND1 GND2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD68
2 Security Classification Compal Secret Data Compal Electronics, Inc.
LOTES_ADDR0205-P001A02~D 2016/01/07 2017/01/07 Title
DEREN_40-42261-26001RHF
SP07001HW0L THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4 SODIMM-II Socket
C 0.3(X02)
<Address: 100> DIMM_B H:4mm STD
A B C D E
5 4 3 2 1
PUF01
RT9059GSP +0.95VSDGPU 1.95A
PUM01 PJPM4
PJPM02
PWM P50 +1.2VP +1.2V_DDR 9.87A
RT8207PGQW
PJPM03
+0.6VSP +0.6V_DDR_VTT 1.5A
PJPH3 +5V_AVDD
D
PUH1 P51 0.8_1.8VALW_PWREN PJPH02 0.5A D
PWM
RT6226AGQUF
+VDDP_ALWP +0.8VALW 5A
+5VS(FPR) 0.05mA
PUW01 DGPU_PWROK PJPW02
P56
PWM +1.35VGPUP +1.35V_MEM_GFX 5.68A F3 +5VS_KBL 0.5A
RT6226AGQUF +5VS_ODD 1.5A
RA38
0ohm 0805
+5V_PVDD 1.5A
+5VS_FAN 0.5A
JP4 +5V_HDD 1.5A
S0A3_GPIO
CRT 0.11A
U4
SUSP# FI1 +5V_HDMI 0.2A
EM5209VF +5VS
6.51A RW3
+TPAN_VDD_F +VDD_TOUCH
0ohm 0603
EN_5V PJPW02 14.51A 0.2A
CPU PWR PU501 P49 PJP503
Peripheral Device PWR PWM +5VALWP +5VALW OVP_TRIP_P1

SY8180CRAC VBUS_P_CTRL_P1 3A
GPU PWR PUB01
PLS11 , PLS12 PQS01 PQS02 CHARGER
UT8 +CCG_VBUS 5A_Z120_25M_0805_2P +CCG_VBUS_1 AON7409 +VBUS_DC_SS AON7409
G518A1TO1U ISL9538HRTZ-T
ADAPTER POK
C C
USB_EN# UT4
UI1 RT9069-33GB +3.3V_VDD_PIC
SY6288D20AAC +5V_USB_PWR1 2.5A
USB_EN#
UU1
SY6288D20AAC +5V_USB_PWR2 2A
PUB01
CHARGER +PWR_SRC
ISL9538HRTZ-T (+19VB)
+5V_CONN_P1
3VS_APU(Debug) 0.05mA
0.5A
ENVDD
www.laptoprepairsecrets.com 0.05mA
EC_ENVDD
U2
SY6288C20AAC +LCDVDD 0.7A 3VS(FPR)
BATTERY PXS_PWREN
U3 25mA +3VS_CAM 0.15A
EM5209VF +3VGS
PJP302
S0A3_GPIO 6.352A
PU301 P49
PWM U6
SUSP#
3VS(SSD) 2.5A
SY8286BRAC
+3VALWP +3VALW EM5209VF +3VS +3.3V_VDD_PIC 0.1A
11.652A +3V_HUB 0.27A
+3VALW_EC(+EC_VCCA) 0.5A +3VS(SATA redriver) 0.5A
B
+3VALW (TPM) 0.05A
+3VS_WLAN_NGFF 2A B
WOL_EN
UL2
SY6288C20AAC +LAN_VDD33 1.5A
+3V_DVDD 107mA
0.8_1.8VALW_PWREN PJP182
2A PXS_PWREN
PU1801
RT8061AZQW +1.8VALWP +1.8V_ALW
U3
EM5209VF +1.8VGS 0.5A
SYSON PJP2502 SUSP#
PU2501 U6
RT9059GSP +2.5VP +2.5V_MEM EM5209VF +1.8VS 1.5A
0.45A
+3VS_TOUCH 0.5A
VDD_33_S5 0.25A
+3VLP 0.05A
PUZ01 P53 VR_ON

PWM
ISL62771HRTZ-T
+APU_VDDCORE 45A
A A
+APU_VDDSOC 13A
PUV01 PXS_PWREN
P55
PWM
ISL62771HRTZ-T
+VGA_CORE 40A
Green CLK
5 4 3 2 1
5 4 3 2 1
Main Func = LCD

JEDP1
W=40mils 1
2 1 41
3 2 G1 42
+INV_PWR_SRC 3 G2
4
2 1 EDP_HPD_R 5 4
[8] EDP_HPD R3 @ 0_0402_5%
+3VS +LCDVDD 6 5
7 6
8 7
+LCDVDD_CONN 8
1
9
1 2 RX15 LCD_TST_C 10 9
U2 +3VS
5 1 60mil RP1
[27] LCD_TEST
100_0402_5%
DBC_EN_R 11 10
IN OUT 100K_0402_5% EDP_HPD_R 12 11
2 13 12
2
GND 14 13
D 1 EDP_AUXP_C 14 D
C5 4 3 2 1 0.1U_0402_16V7K 2 1 C4321 15
EN OC [8] EDP_AUXP 2 1 C4322 EDP_AUXN_C 16 15
4.7U_0603_6.3V6K 0.1U_0402_16V7K
[8] EDP_AUXN 17 16
RX7
2 DX1 2 1 C4311 EDP_TXN0_C 18 17
SY6288C20AAC_SOT23-5 10K_0402_5% 0.1U_0402_16V7K
2 1 [8] EDP_TXN0 2 1 C4312 EDP_TXP0_C 19 18
DISPOFF# 0.1U_0402_16V7K
[27] BKOFF# [8] EDP_TXP0 20 19
EDP_TXN1_C 20
1
0.1U_0402_16V7K 2 1 C4313 21
2 1 0_0402_5% ENVDD_RE [8] EDP_TXN1 2 1 C4314 EDP_TXP1_C 22 21
RX8 RB751V-40_SOD323-2 0.1U_0402_16V7K
[8] ENVDD 10K_0402_5% [8] EDP_TXP1 23 22
2 1 RP2 24 23
[27] EC_ENVDD 24
RX9 @ 0_0402_5% 25
2
26 25
INVTPWM 27 26
DISPOFF# 28 27
29 28
+3VS_CAM A_MIC_DATA 29
30
[18] A_MIC_DATA A_MIC_CLK 31 30
[18] A_MIC_CLK 32 31
USB20_0_N3_R 33 32
USB20_0_P3_R 34 33
INVTPWM 35 34
[8] INVTPWM USB20_TOUCH_N2 36 35
+LCDVDD +LCDVDD_CONN USB20_TOUCH_P2 37 36
37
1
38
W=60mils RP3 RX25 2 1 33_0402_5%TS_EN_RR 39 38
1 2 [27] TS_EN_R 40 39
1M +-5% 0402 +VDD_TOUCH
HCB2012KF-221T30_2P 40
LX1
2
ACES_51540-04001-P01
CONN@
C C
+19VB +INV_PWR_SRC +INV_PWR_SRC DBC_EN R4 2 @ 1 0_0402_5% DBC_EN_R

W=40mils [27] DBC_EN
@
1
R5 1 2 0_0805_5%
@
F1 1 2 R6
10U_0603_25V6M
0.1U_0603_25V7K
1 1 0_0402_5%
SMD1812P150TF/24 1.5A UL/CSA/TUV
2
C12 C13
@
2 2
MCM1012B900F06BP_4P
1 2 USB20_0_P3_R
B
Webcam PWR CTRL [10] USB20_0_P3 B
4 3 USB20_0_N3_R
+3VS +3VS_CAM [10] USB20_0_N3
L1 EMI@
RW2
150mA
@ 0_0603_5%
2 1 1 2
1 R7 0_0402_5%
C14 @EMI@
4.7U_0603_6.3V6K 1 2
R8 0_0402_5%
2 @EMI@
RF require 12/22
+3VS +LCDVDD_CONN
* Touch Screen Panel for modern standby USB20_TOUCH_N2
10P_0402_50V8J
0.1U_0402_10V7K
10P_0402_50V8J
[35] USB20_TOUCH_N2
CW5 @RF@
CW6
USB20_TOUCH_P2 1 1 1 1 1
CX3
C15 C16
+3VS +5VS +TPAN_VDD_F +VDD_TOUCH [35] USB20_TOUCH_P2
1U_0402_10V6K
@RF@
0.1U_0402_16V7K
2
+TPAN_VDD_F +VDD_TOUCH 2 2 2 2 2
1
@
2
@ESD@
R9 RW3 U5
1 8 mils AZC199-02SPR7G_SOT23-3
0_0603_5% 0_0603_5%
8 mils OUT DX3
1
@ 5
IN 2
2
4 GND
[9] 3.3V_TS_EN EN 3 1 2 follow esd require @0619
F2 @ +VDD_TOUCH
TPAN_VDD_F 1 2 OCB R300 @ 10K_0402_5%
1
C310 SY6288D20AAC_SOT23-5 Place close to JEDP
1.1A_24V_SMD1812P110TF-24 @ 1U_0402_10V6K @
A @ A
1 2 2
RW4 0_0603_5%

eDP / webcam / TouchScreen
5 4 3 2 1
5 4 3 2 1
Main Func = HDMI
D Place close to JHDMI D
RI1 1 @EMI@ 2 0_0402_5% +5V_HDMI
LI1 EMI@ HDMI_L_CLKN W=20mils

HDMI_CLKN HDMI_L_CLKN
1
2 1 2 1
@EMI@ +5VS
HDMI_CLKN 150_0402_5% 1
CI1 2 1 0.1U_0402_10V7K FI1
[8] APU_DP1_N3 2 1 0.1U_0402_10V7K HDMI_CLKP HDMI_CLKP 3 4 HDMI_L_CLKP RI2
CI2 1.5A_6V_1206L150PR~D CI3
[8] APU_DP1_P3 HDMI_L_CLKP .1U_0402_16V7K
2
2 1 0.1U_0402_10V7K HDMI_TX_N0 HCM1012GH900BP_4P 2
CI4
[8] APU_DP1_N2 2 1 0.1U_0402_10V7K HDMI_TX_P0 1 2
CI5
[8] APU_DP1_P2
RI3 @EMI@ 0_0402_5%
2 1 0.1U_0402_10V7K HDMI_TX_N1
CI6
[8] APU_DP1_N1 2 1 0.1U_0402_10V7K HDMI_TX_P1
CI7
[8] APU_DP1_P1 1 @EMI@ 2 0_0402_5%
RI4
2 1 0.1U_0402_10V7K HDMI_TX_N2
CI8
[8] APU_DP1_N0 2 1 0.1U_0402_10V7K HDMI_TX_P2 LI2 EMI@ HDMI_L_TX_N0
CI9
[8] APU_DP1_P0 HDMI_TX_N0 HDMI_L_TX_N0
1
2 1
@EMI@
1 RI21
1 RI22
1 RI23
1 RI24
1 RI25
1 RI26
1 RI27
1 RI28
150_0402_5% JHDMI1 CONN@

HDMI_TX_P0 3 4 HDMI_L_TX_P0 RI6 HDMI_HPD 19
HDMI_L_TX_P0 18 HP_DET
2
HCM1012GH900BP_4P 17 +5V
1 2 HDMI_CTRL_DATA 16 DDC/CEC_GND
HDMI_CTRL_CLK 15 SDA
RI7 @EMI@ 0_0402_5%
14 SCL
2
2
2
2
2
2
2
2
13 Reserved
1 @EMI@ 2 HDMI_L_CLKN 12 CEC
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
RI8 0_0402_5% HDMI_L_TX_N1 11 CK-

HDMI_L_CLKP CK_shield
1
LI3 EMI@ 10
HDMI_TX_N1 HDMI_L_TX_N1 @EMI@ HDMI_L_TX_N0 CK+
2 1 9
150_0402_5% 8 D0-
RI9 HDMI_L_TX_P0 7 D0_shield
HDMI_TX_P1 3 4 HDMI_L_TX_P1 HDMI_L_TX_P1 HDMI_L_TX_N1 6 D0+
2
5 D1-
HCM1012GH900BP_4P HDMI_L_TX_P1 4 D1_shield 20
C HDMI_L_TX_N2 D1+ GND C
1 2 3 21
RI10 @EMI@ 0_0402_5% 2 D2- GND 22
HDMI_L_TX_P2 1 D2_shield GND 23
D2+ GND
+3VS CONCR_099AKAC19NBLCNF
1
1 @EMI@ 2 DC021702131
D RI12 0_0402_5%
2 QI1 HCM1012GH900BP_4P
HDMI_TX_P2 3 4 HDMI_L_TX_P2 HDMI_L_TX_P2
G 2N7002K_SOT23-3
1
S @EMI@
RI20
3
HDMI_TX_N2 2 1 HDMI_L_TX_N2 150_0402_5%

100K_0402_5%
RI13
HDMI_L_TX_N2
LI4 EMI@
2
1 2
RI14 @EMI@ 0_0402_5%
45@ ROYALTY HDMI W/LOGO

Part Number Description
RO0000002HM HDMI W/Logo:RO0000002HM
B B
+3VS
+5V_HDMI RPI3
8 1 APU_DP1_CTRL_CLK
7 2 APU_DP1_CTRL_DATA
6 3 HDMI_CTRL_DATA +3VS
5 4 HDMI_CTRL_CLK
2.2K_0804_8P4R_5%
CRB use 4.7k, bristol use 2.2k
1
C
QI2 2 1 2 HDMI_HPD
MMBT3904_NL_SOT23-3 B
E RI15 1
3
+3VS [8] APU_DP1_HPD 150K_0402_5%

CI10 @
1
220P_0402_50V8J RI16
2 20K_0402_5%
RI17
2
100K_0402_5%
2
QI3B
2
L2N7002DW1T1G
G
1 6 HDMI_CTRL_CLK
[8] APU_DP1_CTRL_CLK
S
D
5
G
4 3 HDMI_CTRL_DATA
[8] APU_DP1_CTRL_DATA
S
QI3A
L2N7002DW1T1G
A A

HDMI
5 4 3 2 1
5 4 3 2 1
Main Func = Audio

moat moat
.1U_0402_16V7K
+1.8VS +1.8V_AVDD
+5V_AVDD +5V_AVDD +5VS QA1
+5VS 1.5A +5V_PVDD
2 LN2306LT1G_SOT23-3
CA17 Place close to Pin 26
2 @ 1 1 3 RA53 2 @ 1 0_0402_5%
S
RA38 2 1 0_0805_5%
CA10
@ RA52 0_0603_5%
1
1
1
CA1 1 CA2 CA3 1 CA4 CA6 CA53
G
2
1
1
10U_0603_10V6M
10U_0603_10V6M
.1U_0402_16V7K
.1U_0402_16V7K
10U_0603_10V6M
10U_0603_10V6M
D +3VS D
2
2 1 0_0402_5% 2
+1.8VS RA56
.1U_0402_16V7K
2
2 2
+5V_PVDD
+3V_DVDD
Close pin40
1
1
CA9 CA46 +3V_DVDD +3V_1.8V_CPVDD

+1.8V_AVDD
RA7 3234@ 0_0402_5%
Layout Note: Layout Note: CA9, CA46 close
10U_0603_10V6M
.1U_0402_16V7K
2
2 1 2 +3V_1.8V_CPVDD
+3V_1.8V_CPVDD
Close pin41 Close pin46 to UA1 pin1 3234@
41
46
26
40
36
1
UA1 RA58 1 3246@ 2 0_0402_5%

PVDD1
PVDD2
AVDD1
AVDD2
DVDD-IO
DVDD
CPVDD
1 CA14
1
CA12
.1U_0402_16V7K
[9] HDA_RST#_R RA14 1 3234@ 2 0_0402_5% 11
PC_BEEP_C I2C_SDA
CA47 1 2 0.1U_0402_16V7K 12 31
10U_0603_10V6M
+Line1-VREFO-L
2
+3VS +3V_DVDD 3234@ I2C_SCL LINE1-VREFO-L 30 2
LINE1-VREFO-R +Line1-VREFO-R
[9] HDA_SYNC_R 10 29 +MIC2-VREFO
SYNC MIC2-VREFO +MIC2-VREFO
RA2 2 @ 1 0_0402_5% 6 28 CA23 1 2 2.2U_0603_6.3V6K
[9] HDA_BIT_CLK_R 5 BIT-CLK VREF 35 CA24 1 2 1U_0603_16V7
moat +3VALW +RTCVCC
CA7
[9] HDA_SDOUT_R HDA_SDIN0_R 8 SDATA-OUT CBN 37

CA16 1
25mA SDATA-IN CBP
1
RA54 2 @ 1 0_0402_5%
10U_0603_10V6M
follow vendor 100k change to 10K @03/28 4 20 V3D3_STB 1 2 0_0402_5%

RA12
.1U_0402_16V7K
2 1 10K_0402_5% MIC_DATA_C 2 EAPD/DC DET 5VSTB

+3V_DVDD RA8 @
2
2 MIC_CLK_C 3 GPIO0/DMIC-DATA12 34 CA54 2 1 1U_0603_16V7

Close pin9 EC_MUTE# GPIO1/DMIC-CLK CPVEE
47
[27] EC_MUTE# 48 PDB
RA13 2 1 100K_0402_5% SPDIFO/GPIO2/DMIC-DATA-34/DMIC-CLK-In/MIC-GPI
CA19 1 2 10U_0603_10V6M 27
CA20 1 2 10U_0603_6.3V6M 39 LDO1-CAP 17 RING2
CA21 1 2 10U_0603_10V6M 7 LDO2-CAP MIC2-L/RING2 18 SLEEVE RING2 [21]
LDO3-CAP MIC2-R/SLEEVE 19 SLEEVE [21]
MIC-CAP 24 MIC1-L CA56 1 2 10U_0603_6.3V6M
INT-SPK-L+ 42 LINE2-L 23
C SPK-L+ LINE2-R C
Speaker trace width >40mil INT-SPK-L- 43 22 LINE1-L
Layout Note: @ 2W4ohm speaker power INT-SPK-R- 44 SPK-L- LINE1-L 21 LINE1-R
LINE1-L
LINE1-R
[21]
[21]
INT-SPK-R+ 45 SPK-R- LINE1-R 16 CA57 1 2 0.1U_0402_16V7K PC_BEEP_C RA49 1 2 1K_0402_1% PC_BEEP
Layout Note: SPK-R+ PCBEEP 32 3246@ HPOUT-L RA45 2 1
Place close to Pin 13 RA10 2 1 100K_0402_5%AUD_SENSE_A 13 HP-OUT-L 33 HPOUT-R HPOUT-L [21] 10K_0402_5%
+3V_DVDD HP/LINE1 JD1 HP-OUT-R HPOUT-R [21]
14
15 MIC2/LINE2 JD2 25
SPDIFO/FRONT JD3/GPIO3 AVSS1 38
AVSS2 49
moat 1 THERMAL PAD
@ CA48
AUD_SENSE_A 1 2 JACK_SENSE_1# .1U_0402_16V7K ALC3234-CG_MQFN48_6X6
RA41 200K_0402_1% 2
JACK_SENSE_1# 2 1 JACK_SENSE#
JACK_SENSE# [21]
RA57 0_0603_5%
HDA_SDIN0_R
RA43
1 2
33_0402_5% HDA_SDIN0 [9]
UA1
@EMI@
RA44 SA00008GJ00
0_0402_5%
HDA_BIT_CLK_R 1 2 3246@
1
@EMI@ ALC3246-CG_MQFN48_6X6
CA31
22P_0402_50V8J
2
B B
MIC_CLK_C
A_MIC_CLK A_MIC_DATA
JSPK1
INT-SPK-R+ EMI@ LA1 1 2 TAI-TECH HCB1005KF-800T20 0402 SPK_R+_CONN 1
SPK_R-_CONN 1 moat
1
@EMI@ INT-SPK-R- EMI@ LA2 1 2 TAI-TECH HCB1005KF-800T20 0402 2

RA19 INT-SPK-L+ EMI@ LA3 1 2 TAI-TECH HCB1005KF-800T20 0402 SPK_L+_CONN 3 2
INT-SPK-L- 1 2 TAI-TECH HCB1005KF-800T20 0402 SPK_L-_CONN 4 3
22 +-5% 0402 EMI@ LA4
5 4 CA25 EMI@ 2 1 .1U_0402_16V7K
6 G1 CA26 EMI@ 2 1 .1U_0402_16V7K
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-
2
G2 CA27 EMI@ 2 1 .1U_0402_16V7K

1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1 1 1 1 ACES_50224-00401-001 CA28 EMI@ 2 1 .1U_0402_16V7K

Speaker 4 ohm : 40mil
3
CA29 EMI@ 2 1 .1U_0402_16V7K

EMI@ CA52
EMI@ CA55
EMI@ CA66
EMI@ CA30
1 EMI@ 1 EMI@ CONN@

L03ESDL5V0CC3-2_SOT23-3
DA1
DA2
SP02000GC10
1 @EMI@ CA50
10P_0402_50V8J
CA51
10P_0402_50V8J Speaker 8 ohm : 20mil 2 2 2 2
CA49 2 2
@ESD@
@ESD@
10P_0402_50V8J
2
To eDP
1
LA5 ,CA37,CA38 close UA1 RA51 2 @ 1 0_0805_5%

follow esd require @0619
EMI@
A_MIC_CLK LA10 1 2 BLM15BB221SN1D_2P MIC_CLK_C
[16] A_MIC_CLK A_MIC_DATA 1 2 33_0402_5% MIC_DATA_C
RA55 DA3
[16] A_MIC_DATA 2
EC Beep [27] BEEP#
1 PC_BEEP
3
MCU Beep [9] APU_SPKR
A BAT54C SOT23-3 A
change part SCSBAT5407L 04/18

GNDA GND
PC Beep Place on the moat between GND & GNDA.

Audio Codec ALC3234
5 4 3 2 1
1 2 3 4 5
Main Func = LAN

Layout:
For RTL8111H-CG CL19: close to Pin8
* Place CL19,CL21,CL18,CL20 close to each VDD10 pin 8, 30, 3, 22 CL21: close to Pin30
+LAN_VDD33 rising time(10%~90%) : >0.5ms and <100ms CL15,RL1:
For RTL8106E
* Place CL19,CL21 close to each VDD10 pin 8, 30
CL18: close
CL20: close
to
to
Pin3
Pin22
Only for
RTL8111 LDO mode.
1000@
+3VALW OPEN +LAN_VDD33 REGOUT RL18 1 2 0_0603_5% +LAN_VDD10 40 mils
CL15
CL19
CL21
CL18
CL20
JP3 1 1 1 1 1
2 1
A W=60mils 2MM W=60mils A
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
2 2 2 2 2
1000@
1000@
1000@
+3VALW +LAN_VDD33
CL3
1U_0402_6.3V6K UL2
2 1 5 1
IN OUT +3VALW
2 W=60mils
GND
WOL_EN 4 3 2 1
[27] WOL_EN EN OC
RL1 +LAN_VDD33
SY6288C20AAC_SOT23-5 10K_0402_5% +LAN_VDDREG
1.5A
2
RL2 2 1
100K_0402_5% RL3 0_0603_5%
CL4
CL5
CL6
1 1 1
1
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
2 2 2
1000@
LAN power Noise +LAN_VDD33 < 200mV Vpeak to Vpeak. Layout:
For RTL8111H-CG
LAN power Noise +LAN_VDD10 < 100mV Vpeak to Vpeak. * Place CL4 and CL5 and CL6 close to each VDD33 pin 11, 32 ,23
For RTL8106E
B * Place CL5 and CL6 close to each VDD33 pin 23, 32 B
UL1 CL1, CL2 close to UL1 Pin 17, 18

LAN_MDIP0 1 17 PCIE_ARX_C_DTX_P4
0.1U_0402_10V7K 2 1 CL7
LAN_MDIP1 4 MDIP0 HSOP 18 PCIE_ARX_C_DTX_N4 PCIE_ARX_DTX_P4 [6] +LAN_VDD33
0.1U_0402_10V7K 2 1 CL8
LAN_MDIN0 2 MDIP1 HSON PCIE_ARX_DTX_N4 [6]
+LAN_VDD10 LAN_MDIN1 5 MDIN0 TL2
MDIN1 13 PCIE_ATX_C_DRX_P4
HSIP 14 PCIE_ATX_C_DRX_N4 PCIE_ATX_C_DRX_P4 [6] LAN_MDIP2 16 1 RJ45_MDIP2
HSIN PCIE_ATX_C_DRX_N4 [6] LAN_MDIN2 RX+ RD+ RJ45_MDIN2 1 1
+LAN_VDD33 8 15 2 CL24 CL25
30 AVDD10 +V_DAC 14 RX- RD- 3 MCT0
@ 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
32
23
AVDD10
AVDD33 PERSTB
19 PLT_RST#_R 0_0402_5%2
2
1 RL4
1
PLT_RST#
APU_PCIE_RST# PLT_RST# [9,10,20,27]
13
12
CT
NC
CT
NC
4
5
Place close to TCT pin @
2 2
@
+LAN_VDDREG DVDD33 APU_PCIE_RST# [9,20,34,38] +V_DAC NC NC
20 ISOLATEB 0_0402_5% RL5 11 6 MCT1
ISOLATEB LAN_MDIP3 CT CT RJ45_MDIP3
15 10 7
[10] CLK_PCIE_P1 REFCLK_P APU_PCIE_WAKE# LAN_MDIN3 TX+ TD+ RJ45_MDIN3
16 21 9 8
[10] CLK_PCIE_N1 REFCLK_N LANWAKEB APU_PCIE_WAKE# [9,27,34] TX- TD-
WOL_EN Layout:
12 26 0_0402_5%2 @ 1 RL17 CL24: close to Pin32
[10] CLKREQ_PCIE#1 CLKREQB GPO
XTLI 28 2 1 350uH_NS0013LF
29 CKXTAL1 +LAN_VDD33 CL25: close to Pin11
XTLO 10K_0402_5% @ RL6 1000@
CKXTAL2 3 +LAN_VDD10
T43 27 NC 6 LAN_MDIP2 MCT3 RL20 1 2 75_0603_5%
25 LED0 NC 7 LAN_MDIN2
T44 TL1 MCT2 RL19 1 2 75_0603_5%
LED1 NC 9 LAN_MDIP3 MCT1 RL7 1 1000@ 2 75_0603_5%
2.49K_0402_1%~D 1 2 RL8 31 NC 10 LAN_MDIN3 LAN_MDIP1 16 1 RJ45_MDIP1 MCT0 RL9 1 1000@ 2 75_0603_5%
RSET NC 11 +LAN_VDD33 LAN_MDIN1 15 RX+ RD+ 2 RJ45_MDIN1
33 NC 22 +LAN_VDD10 CL22 1 2 1U_0402_10V6K +V_DAC 14 RX- RD- 3 MCT2
GND NC 24 REGOUT 13 CT CT 4
T-GND_L
NC CL23 1 2 .1U_0402_16V7K 12 NC NC 5
RTL8106E-CG_QFN32_4X4 +V_DAC 11 NC NC 6 MCT3
LAN_MDIP0 10 CT CT 7 RJ45_MDIP0
@ LAN_MDIN0 TX+ TD+ RJ45_MDIN0
9 8 1
+V_DAC TX- TD- EMI@
CL10
C UL1 1000@ 2 350uH_NS0013LF 10P_1206_2KV8J C
2
CL9 T-GND
0.01U_0402_16V7K
1
RTL8111H-CG QFN 32P E-LAN CTRL

SA000080P00 JRJ45 CONN@
12
GND 11
UL1 100@ GND 10
GND 9
RJ45_MDIP0 1 GND
PR1+ T-GND
RJ45_MDIN0 2
PR1-
RJ45_MDIP1 3
RTL8106E-CG_QFN32_4X4 PR2+
SA000065Y00 RJ45_MDIP2 4
+LAN_VDD33 +3VS PR3+
RJ45_MDIN2 5
PR3-
RJ45_MDIN1 6
2 APU_PCIE_WAKE# PR2-
1
1
RJ45_MDIP3 7
RL10 10K_0402_5% RL12
1K_0402_5% PR4+
RJ45_MDIN3 8
PR4-
2
+3VS +LAN_VDD33
ISOLATEB
SANTA_130460-N
DC021702130
1
RL14
15K_0402_1% CL11
D CLKREQ_PCIE#1 1 2 2 1 XTLI
D
RL15 10K_0402_5%
2
10P_0402_50V8J YL1
WOL_EN 1 2 1 2
RL16 @ 10K_0402_5% XTAL0 GND0
3 4
XTAL1 GND1
CL12 25MHZ_10PF_7V25000014
2 1 XTLO
10P_0402_50V8J del 33 ohm follow emi @1/3

Reserve 10K pull LAN_IO Issued Date 2016/01/07 Deciphered Date 2017/01/07 Title
Size
LAN RTL8106EUS
Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
XTAL DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
LA-F121P
0.3(X02)

1 2 3 4 5
5 4 3 2 1
Main Func = WLAN

closed to pin 2, 4 +3VS_WLAN_NGFF
+3VS_WLAN_NGFF
+3VS_WLAN_NGFF
10P_0402_50V8J
10P_0402_50V8J
CW7
CW10
1 1
10P_0402_50V8J
CW11
D D
0.1U_0402_10V7K~D
10P_0402_50V8J
CW14
2 1 1
10U_0603_6.3V6M
0.1U_0402_10V7K~D
RF@
RF@
CW8
CW9
2 1 1
2 2
10U_0603_6.3V6M
CW12
CW13
CHANGE WLAN NET NAME @2/23 @ @
NGFF WL Con (A Key)
@RF@
1 2 2
@RF@
1 2 2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CW15
CW16
JWLAN1 CONN@ 1 1
77 76
MTG77 MTG76
RF@
RF@
+3VS_WLAN_NGFF
2 2
75
74 GND 73
72 3.3VAUX RESERVED 71
70 3.3VAUX RESERVED 69
68 RESERVED GND 67
66 RESERVED RSRVD/PERN1 65
64 RESERVED RSRVD/PERP1 63
62 RESERVED GND 61 MODS@
60 ALERT RSRVD/PETN1 59 RW15 2 10_0402_5%
I2C_CLK RSRVD/PETP1 S0A3_GPIO [9,26,27]
58 57
WL_OFF#_R 56 I2C_DATA GND 55 WLAN_WAKE#
C BT_ON#_R 54 W_DISABLE1# PEWAKE0# 53 CLKREQ_PCIE#2 WLAN_WAKE# [27] C
[10] BT_ON#_R PLT_RST#_RW 52 W_DISABLE2# CLKEQ0# 51 CLKREQ_PCIE#2 [10]
SUSCLK_WLAN 50 PERST0# GND 49 CLK_PCIE_N2
[10] SUSCLK_WLAN SUSCLK REFCLKN0 CLK_PCIE_P2 CLK_PCIE_N2 [10]
48 47
COEX1 REFCLKP0 CLK_PCIE_P2 [10]
46 45
44
42
COEX2
COEX3
GND
PERN0
43
41
PCIE_ARX_DTX_N5 [6] +3VS TO +3VS_WLAN_NGFF
EC_RX RW7 1 E51_RX1 RESERVED PERP0 PCIE_ARX_DTX_P5 [6]
2 0_0402_5% 40 39
[27] EC_RX EC_TX RW6 1 2 0_0402_5% E51_TX1 38 RESERVED GND 37
[27] EC_TX RESERVED PETN0 PCIE_ATX_C_DRX_N5 [6]
36 35
PCIE_ATX_C_DRX_P5 [6]
100K_0402_5% 2 1 RW12 34 UART_RTS PETP0 33 1 2
UART_CTS GND +3VS +3VS_WLAN_NGFF
32 31 RM1 0_1206_5%
30 UART_TX SDIO_RESET# 29
28 UART_RX SDIO_WAKE# 27
For EC to detect 26 UART_WAKE# SDO_DAT3 25
debug card insert. 24 GND SDO_DAT2 23
LED2# SDO_DAT1 Prevent Backdriver from +3VS_WLAN_NGFF to +3VS
22 21
20 PCM_OUT SDO_DAT0 19 +3VS_WLAN_NGFF +3VS
18 PCM_IN SDIO_CMD 17
16 PCM_SYNC SIDO_CLK
PCM_CLK
1
RW8
+3VS_WLAN_NGFF 7 10K_0402_5%~D QW1
GND
2
6 5 USB20_MINI1_N4 [35] DII-DMN65D8LW-7~D
G
4 LED1# USB_D- 3 USB20_MINI1_P4 [35]
B B
2
2 3.3VAUX USB_D+ 1 WL_OFF#_R 1 3
3.3VAUX GND WL_OFF# [10]
@
S
LCN_DAN05-67306-0100
SP070019F00
+3VALW +3VS_WLAN_NGFF
UW1
5 1 +3VALW
IN OUT
2
GND @
4 3 2 1 PLT_RST#_RW 0_0402_5% 1 2 RW10
A [27] WLAN_EN EN OC APU_PCIE_RST# PLT_RST# [9,10,19,27] A
RW13 MODS@ 10K_0402_5% 2 1
APU_PCIE_RST# [9,19,34,38]
SY6288C20AAC_SOT23-5 0_0402_5% RW11
2
High Active RW14

MODS@
100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
MODS@ 2016/01/07 2017/01/07 Title
NGFF WLAN
1
Size Document Number Rev
for modern standby AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F121P 0.3(X02)

5 4 3 2 1
5 4 3 2 1
Main Func = Audio Jack
RA23
1 RA22 2
+MIC2-VREFO
1 2
2.2K_0402_5% ESD@
2.2K_0402_5% LA6 1 2 BLM15PX330SN1D_2P RING2_R
D [18] RING2 AUD_HP1_JACK_L1 AUD_PORTA_L_R_B D
RA24 1 2 10_0402_1% LA7 1 @ 2 0_0402_5%
[18] HPOUT-L 1 2 LINE1-L_C 1 2 1K_0402_5%
RA25
[18] LINE1-L 1 2 4.7K_0402_5%
+Line1-VREFO-L CA37 10U_0603_10V6M RA26
RA27 1 2 10_0402_1% AUD_HP1_JACK_R1 LA8 1 @ 2 0_0402_5% AUD_PORTA_R_R_B

[18] HPOUT-R 1 2 LINE1-L_R 1 2 1K_0402_5% 1 2 BLM15PX330SN1D_2P SLEEVE_R
RA28 LA9
[18] LINE1-R 1 2 4.7K_0402_5%
+Line1-VREFO-R CA38 10U_0603_10V6M RA29 ESD@
[18] SLEEVE
Layout Note:
Close to UA1
C C
www.laptoprepairsecrets.com Universal Jack

(Global Headset Jack + mic phone in + line in support)
CLOSE TO JHP JHP1
AUD_PORTA_R_R_B SLEEVE_R 3
AUD_PORTA_L_R_B AUD_PORTA_L_R_B 1 G/M
L/R
JACK_SENSE# 5
[18] JACK_SENSE# 5
B JACK_PLUG_DET 6 B
6
AUD_PORTA_R_R_B 2
3
R/L
RING2_R
DA6
4
7 M/G
GND
CA68
RA31
RA32
CA39
CA40
CA41
CA42
CA67
ESD@
YUQIU_PJ753-F07J1BE-B
3
1
1
AZ5123-02S.R7G_SOT23-3
DA5
1 1 1 1 1 CONN@
@ESD@
1
@ @
ESD@
ESD@
ESD@
ESD@
@ESD@
2
JACK_PLUG_DET 2 2 2 2 2
ESD@
680P_0402_50V8J
2
10 mils
100P_0402_50V8J
100P_0402_50V8J
680P_0402_50V8J
680P_0402_50V8J
680P_0402_50V8J
10K_0402_5%
10K_0402_5%
1
RA30
@ 0_0402_5%
2
follow ESD require @03/21
A A

JACK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
5 4 3 2 1
A B C D E F G H
Main Func = HDD
RS21 RS16
for modern standby
+3VS +5V_HDD
+5VALW
US1 TI@ US1 PARADE@ 0_0402_5% 0_0402_5%
SD028000080 SD028000080 US5
1 80 mils
@ @
80 mils 5 OUT
1 IN 2 1
GND
0.01U_0402_16V7K
0.1U_0402_25V6K
SN75LVCP601RTJR PS8527CTQFN20GTR2-A2 4
[9] HDD_EN# EN
1 1 3 1 MODS@ 2 +5VS
OCB
2
SA00003ZX00 SA00007JU10 1 RS60 10K_0402_5%

RS3
RS4
4.7K_0402_5%
4.7K_0402_5%
CS40 SY6288D20AAC_SOT23-5
1
1
CS1
CS2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1U_0402_10V6K MODS@
2 2 MODS@
2
RS5
RS6
RS7
RS8
TI@ TI@
1
+3VS
2
2
US1 @ TI@ TI@
RS9 1 20_0402_5% 7 6 DEW2
EN VDD 16 DEW1
CS3 1 2 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_P0 1 VDD
[6] SATA_ATX_DRX_P0 SATA_ATX_C_RD_DRX_N0 2 A_INp
[6] SATA_ATX_DRX_N0 CS4 1 2 0.01U_0402_16V7K 10
A_INn NC 20 HDD_REXT_SATA0
1 2 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_P0 5 REXT
CS5
[6] SATA_ARX_DTX_P0 SATA_ARX_C_RD_DTX_N0 4 B_OUTp HDD_A0_PRE0
CS6 1 2 0.01U_0402_16V7K 9
[6] SATA_ARX_DTX_N0 B_OUTn A_PRE0 HDD_B0_PRE0
8
HDD_B0_PRE1 B_PRE0
+3VS RS10 1 @ 2 0_0402_5% 17
HDD_A0_PRE1 B_PRE1 SATA_ATX_RD_DRX_P0 SATA_ATX_C_DRX_P0
RS11 1 @ 2 0_0402_5% 19 15 CS7 1 2 0.01U_0402_16V7K
A_PRE1 A_OUTp 14 SATA_ATX_RD_DRX_N0 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_N0
CS8
RS12 1 @ 2 0_0402_5% 18 A_OUTn
3 TEST 11 SATA_ARX_RD_DTX_P0 CS9 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P0
HDD_B0_EQ GND B_INp 12 SATA_ARX_RD_DTX_N0 SATA_ARX_C_DTX_N0
RS13 1 TI@ 20_0402_5% 13 CS10 1 2 0.01U_0402_16V7K
21 GND B_INn
EPAD
SN75LVCP601RTJR_QFN20_4X4
+5V_HDD Source
+3VS 60 mils
+5VS +5V_HDD
JP4
RS15 1 @ 2 0_0402_5% 1 2
1 2
HDD_B0_EQ
2 RS16 1 TI@ 20_0402_5% JUMP_43X79 2
DEW2 RS17 1 @ 2 4.7K_0402_5%
DEW1 RS18 1 @ 2 4.7K_0402_5%

SHORT
HDD_B0_PRE0 RS19 1 @ 2 0_0402_5% JHDD1 CONN@
1
HDD_B0_PRE1 SATA_ATX_C_DRX_P0 1
RS20 1 TI@ 2 0_0402_5% 2
SATA_ATX_C_DRX_N0 3 2
+5V_HDD
HDD_A0_PRE1 3
RS21 1 TI@ 2 0_0402_5% 4
SATA_ARX_C_DTX_N0 5 4
SATA_ATX_DRX_P0 SATA_TX_P0 SATA_ATX_C_DRX_P0 HDD_A0_PRE0 SATA_ARX_C_DTX_P0 5
RS22 1 NRDSA@2 0_0402_5% CS11 1NRDSA@
2 0.01U_0402_16V7K RS23 1 @ 2 2K_0402_5% 6
6
1000P_0402_50V7K
0.1U_0402_25V6K 7
SATA_ATX_DRX_N0 SATA_TX_N0 SATA_ATX_C_DRX_N0 HDD_REXT_SATA0 2 0_0402_5% JHDD_P10 7
10U_0805_10V6K
RS25 1 NRDSA@2 0_0402_5% CS15 1NRDSA@
2 0.01U_0402_16V7K RS24 1 @ 2 5.1K_0402_1% RS61 1 8
[9] DEVSLP0_HDD FFS_INT2_Q 8
9
1 1 1 9
10
SATA_ARX_DTX_P0 SATA_RX_P0 SATA_ARX_C_DTX_P0 10
RS26 1 NRDSA@2 0_0402_5% CS16 1NRDSA@
2 0.01U_0402_16V7K CS13 CS14 CS12 11
12 11
SATA_ARX_DTX_N0 SATA_RX_N0 SATA_ARX_C_DTX_N0 2 2 2 +5V_HDD 12
RS27 1 NRDSA@2 0_0402_5% CS17 1NRDSA@
2 0.01U_0402_16V7K
13
14 GND
GND
ACES_51625-01201-001
SP010028W00
Main Func = FFS Main Func = ODD

3
SATA ODD Connector (FFC Type) 3
+3VS
SATA_ATX_DRX_P1 1 2 SATA_ATX_C_DRX_P1
APU TX [6] SATA_ATX_DRX_P1
SATA_ATX_DRX_N1
CS18
1 2
0.01U_0402_16V7K
SATA_ATX_C_DRX_N1
JODD1 CONN@
[6] SATA_ATX_DRX_N1
CS19 0.01U_0402_16V7K 1 2
APU RX SATA_ARX_DTX_P1 SATA_ARX_C_DTX_P1 SATA_ATX_C_DRX_P1 1 2 SATA_ATX_C_DRX_P1
0.1U_0402_25V6K
10U_0805_10V6K
1 2 3 4
[6] SATA_ARX_DTX_P1 SATA_ATX_C_DRX_N1 3 4 SATA_ATX_C_DRX_N1
APU TX
CS20 FFS@
CS21
1 1 CS22 0.01U_0402_16V7K 5 6
US4 FFS@ SATA_ARX_DTX_N1 1 2 SATA_ARX_C_DTX_N1 7 5 6 8
[6] SATA_ARX_DTX_N1 SATA_ARX_C_DTX_N1 7 8 SATA_ARX_C_DTX_N1
LNG2DM CS23 0.01U_0402_16V7K 9 10
2 2
@
10 5
SATA_ARX_C_DTX_P1 11
13
9
11
10
12
12
14
SATA_ARX_C_DTX_P1
APU RX
9 VDD_IO RES SATA_ODD_PRSNT# 15 13 14 16 SATA_ODD_PRSNT#
VDD 15 16 SATA_ODD_PRSNT# [9,27]
12 +5VS_ODD 17 18 +5VS_ODD
INT 1 FFS_INT2 FFS_INT1 [9] 17 18
3 11 19 20
SDO/SA0 INT 2 FFS_INT2 [9] 19 20
4 21 22
[9,13,14,36]
[9,13,14,36]
APU_SDATA0
APU_SCLK0
1
2
SDA/SDI/SDO
SCL/SPC GND
GND
6
7
8
ODD Power Control ODD_DA# 23
25
21
23
22
24
24
26
ODD_DA#
T46
CS GND GND GND

+5VS ACES_50673-0120N-001
LNG2DMTR_LGA12_2X2 +5VS_ODD DC02151119A
JP5
1 2
1 2
+5V_HDD
10U_0805_10V6K
1000P_0402_50V7K
0.1U_0402_25V6K
JUMP_43X79 1 1 1
1
CS24
CS25
CS26
+3VS RS28 FFS@

100K_0402_5% 60 mils 2 2 2
1
need short 11/30

2
FFS@ RS29 FFS_INT2_Q

100K_0402_5%
3
QS1B FFS@
2
4 L2N7002DW1T1G 4
5
4
6
QS1A FFS@
FFS_INT2 L2N7002DW1T1G
2
1

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F121P
D at e : Thursday, November 09, 2017 She e t 22 of 61
A B C D E F G H
5 4 3 2 1
Main Func = USB3.0 Port1

+5V_USB_PWR1
JUSB1
USB3_ATX_L_DRX_0_P1 9
1 STDA_SSTX+
USB3_ATX_L_DRX_0_N1 VBUS
10U_0603_10V6M
0.1U_0402_16V7K
8
+5VALW USB20_0_P1_R STDA_SSTX-
47U_0805_6.3V4Z
47U_0805_6.3V4Z
3
4 D+
1 1 1 USB20_0_N1_R GND_1
1
1 @EMI@ 2 @ 2
USB3_ARX_DTX_0_P1_R D-
CU1
CU2
CU3
CU4
RU1 0_0402_5% 6
7 STDA_SSRX+
1 1
2
LU1 EMI@ CU5 CU6 2 2 2 USB3_ARX_DTX_0_N1_R 5 GND_2
USB3_ARX_DTX_0_P1 2 1 USB3_ARX_C_DTX_0_P1 2 1 USB3_ARX_DTX_0_P1_R STDA_SSRX-
[10] USB3_ARX_DTX_0_P1 10
D CU38 0.33U_0402_10V6K 4.7U_0805_10V4Z 0.1U_0402_16V7K D
2 2 11 GND1
USB3_ARX_DTX_0_N1 2 1 USB3_ARX_C_DTX_0_N1 3 4 USB3_ARX_DTX_0_N1_R 12 GND2
[10] USB3_ARX_DTX_0_N1 13 GND3
CU39 0.33U_0402_10V6K
INPAQ HCM1012GD670A05P GND4
ACON_TARAN-9R1391
CONN@
3
1 @EMI@ 2
RU2 0_0402_5%
3
ESD@
1 @EMI@ 2 +5V_USB_PWR1 AZC199-02SPR7G_SOT23-3
+5VALW EU2
1
RU3 0_0402_5%
UI1 USB connector1
1
INPAQ HCM1012GD670A05P_4P 1
[10] USB3_ATX_DRX_0_N1
USB3_ATX_DRX_0_N1 2
CU7
1 USB3_ATX_C_DRX_0_N1
0.22U_0402_10V6K
3 4 USB3_ATX_L_DRX_0_N1 5
IN
OUT
2
USB20 port1
USB_EN#
[10] USB3_ATX_DRX_0_P1
USB3_ATX_DRX_0_P1 2 1 USB3_ATX_C_DRX_0_P1 2 1 USB3_ATX_L_DRX_0_P1 [25,27] USB_EN#
4
EN
GND
3 USB_OC0#
USB_OC0# [10]
USB30 port1
CU8 0.22U_0402_10V6K OCB
1
LU2 EMI@ SY6288D20AAC_SOT23-5 1
CU9 SA00007AO00
0.1U_0402_16V7K
CU10
0.1U_0402_16V7K
1 @EMI@ 2 2
RU4 0_0402_5% 2
EU3
USB3_ARX_DTX_0_N1_R1 USB3_ARX_DTX_0_N1_R
1 10 9
1 @EMI@ 2 USB3_ARX_DTX_0_P1_R2 8 USB3_ARX_DTX_0_P1_R
2 9
RU5 0_0402_5%
EMI@ USB3_ATX_L_DRX_0_N1 4 7 USB3_ATX_L_DRX_0_N1
4 7
MCM1012B900F06BP_4P
USB20_0_P1 3 4 USB20_0_P1_R USB3_ATX_L_DRX_0_P1 5 6 USB3_ATX_L_DRX_0_P1
[10] USB20_0_P1 5 6
3 3
USB20_0_N1 2 1 USB20_0_N1_R
[10] USB20_0_N1 8
LU3 follow esd require @0619
C L05ESDL5V0NA-4_SLP2510P8-10-9 C
ESD@
1 @EMI@ 2
RU6 0_0402_5%
Main Func = USB3.0 Port2

+5V_USB_PWR1
1 @EMI@ 2
USB3_ATX_L_DRX_0_P2
USB3_ATX_L_DRX_0_N2
9
1
JUSB2
STDA_SSTX+
VBUS
10U_0603_10V6M
RU7 0_0402_5% 0.1U_0402_16V7K USB20_0_P2_R

8
STDA_SSTX-
47U_0805_6.3V4Z
47U_0805_6.3V4Z
3
INPAQ HCM1012GD670A05P 4 D+
USB3_ARX_DTX_0_N2 USB3_ARX_C_DTX_0_N2 USB3_ARX_DTX_0_N2_R 1 1 1 USB20_0_N2_R GND_1
1
2 1 3 4 @ 2
[10] USB3_ARX_DTX_0_N2 USB3_ARX_DTX_0_P2_R D-
CU11
CU12
CU13
CU14
CU40 0.33U_0402_10V6K 6
7 STDA_SSRX+
2
USB3_ARX_DTX_0_P2 2 1 USB3_ARX_C_DTX_0_P2 2 1 USB3_ARX_DTX_0_P2_R 2 2 2 USB3_ARX_DTX_0_N2_R 5 GND_2

[10] USB3_ARX_DTX_0_P2 STDA_SSRX-
CU41 0.33U_0402_10V6K
LU4 EMI@ 10
11 GND1
12 GND2
1 @EMI@ 2 13 GND3
RU8 0_0402_5% GND4
ACON_TARAN-9R1391
CONN@
3
2
3
ESD@
B 1 @EMI@ 2 B
RU9 0_0402_5% AZC199-02SPR7G_SOT23-3
1 EU4
INPAQ HCM1012GD670A05P USB connector2
1
USB3_ATX_DRX_0_N2 2 1 USB3_ATX_C_DRX_0_N2 3 4 USB3_ATX_L_DRX_0_N2

[10] USB3_ATX_DRX_0_N2
CU15 0.22U_0402_10V6K follow esd require @0619
USB20 port2
USB3_ATX_DRX_0_P2 2 USB3_ATX_C_DRX_0_P2 USB3_ATX_L_DRX_0_P2
[10] USB3_ATX_DRX_0_P2
CU16
1
0.22U_0402_10V6K
2 1
USB30 port2
LU5 EMI@
1 @EMI@ 2
RU10 0_0402_5%
EU5
USB3_ARX_DTX_0_N2_R1 USB3_ARX_DTX_0_N2_R
1 10 9
USB3_ARX_DTX_0_P2_R2 8 USB3_ARX_DTX_0_P2_R
2 9
1 @EMI@ 2 USB3_ATX_L_DRX_0_N2 4 7 USB3_ATX_L_DRX_0_N2

4 7
RU11 0_0402_5%
USB3_ATX_L_DRX_0_P2 5 6 USB3_ATX_L_DRX_0_P2
5 6
LU6
USB20_0_P2 2 1 USB20_0_P2_R 3 3
[10] USB20_0_P2
8
USB20_0_N2 3 4 USB20_0_N2_R
[10] USB20_0_N2 follow esd require @0603 L05ESDL5V0NA-4_SLP2510P8-10-9
MCM1012B900F06BP_4P ESD@
EMI@
1 @EMI@ 2
RU12 0_0402_5%
A A

USB3.0
5 4 3 2 1
5 4 3 2 1
Main Func = Touch Pad
+3VS_TOUCH
+3VS_TOUCH Main Func = KBBL
Touch pad
2
Q1
G
1 LN2306LT1G_SOT23-3
1 3 TP_I2C_INT#
[9] TP_I2C_INT#_APU
C18
S
+3VS_TOUCH 1U_0402_6.3V6K~D
2 R10 1 @ 2 0_0402_5%
D D
+3VS_TOUCH
+5VS +5VS_KBL
JTP1
1
8 0.5A_13.2V_MF-NSMF050-2
I2C_3_SDA 7 8 10 R11 F3 KBBL@
[9] I2C_3_SDA I2C_3_SCL 6 7 G2 9 EC_TP_INT# 1 2 TP_I2C_INT# 1 2
100K_0402_5% [27] EC_TP_INT#
[9] I2C_3_SCL 5 6 G1 PTP@ R12 0_0402_5% 20mil
TP_I2C_INT# 5
1U_0603_10V6K
10U_0603_10V6M
4 1 2
2
PTP_DIS# TP_LOCK# 3 4 PTP_DIS#

[27] PTP_DIS# TP_DATA 3 1
1
CE1
C19
2 RE1
[27] TP_DATA TP_CLK 1 2 KBBL@ 0_0805_5% KBBL@
[27] TP_CLK 1 @
2
ACES_51524-0080N-001 2
CONN@
SP01001A900
+3VS
@
RE2
Close to UE1 [9] KB_DET#
1 2
+3VALW +3VS_TOUCH 10K_0402_5% +5VS_KBL

+3VS_TOUCH Close to UC1 JKBBL1
TP_CLK +3VS_TOUCH D
1
1
4.7K_0402_5% 1 2 R13 1
TP_DATA KB_DET 1
4.7K_0402_5% 1 2 R14 RP4 TP_WAKE@ 2 2
I2C_3_SDA 1 8 3 2 5
R15 G
I2C_3_SCL 2 7 0_0402_5% QE1 KB_BL_PWM 4 3 G1 6
S
3
TP_I2C_INT# 4 G2
1
3 6 2N7002KW 1N SOT323-3
2
4 5 KBBL@ RE3 ACES_51575-00401-001

100K_0402_5%
TP_DATA
2.2K_0804_8P4R_5% +3VS_TOUCH Discharge KBBL@ CONN@
TP_CLK
2
Q2 +3VS_TOUCH
C20
C21
NTK3139PT1G_SOT723-3
100P_0402_50V8J
100P_0402_50V8J
1 1
1
D
Q3
3 1 1 2 2
S
C KBBL@ C
[27] KB_LED_PWM
@ESD@
@ESD@
1 G
2 2 TP_WAKE@ TP_WAKE@ R16 S
3
C22 100_0603_1% LN2306LT1G_SOT23-3
G
2
.1U_0402_16V7K
2 D Q4
1 2 TP_ON#_GATE 2 2N7002K_SOT23-3
[27] TP_EN
G
R17 S
20K_0402_1%
3
www.laptoprepairsecrets.com Main Func = KB
Main Func = FAN Control +5VS

SP01001LM00
ACES_50699-03041-P01
RE4
1 @ 2 30 32
KSI7 29 30 GND 31
240_0402_1% KSI6 28 29 GND
KSI4 27 28
KSI2 26 27
KSI5 25 26
B 25 B
KSI[0..7] KSI1 24
[27] KSI[0..7] 23 24
KSI3
KSO[0..16] KSI0 22 23
[27] KSO[0..16] 21 22
KSO5
KSO4 20 21
KSO7 19 20
KSO6 18 19
+3VS KSO8 17 18
KSO3 16 17
KSO1 15 16
KSO2 14 15
KSO0 13 14
13
1
KSO12 12
R18 KSO16 11 12
100K_0402_5% KSO15 10 11
CAP LED Control KSO13 9 10
9
+5VS KSO14 8
LOW actived from KBC GPIO Q6
2
8
2
G
KSO9 7
R2
3 KSO11 6 7
3 1 CAP_LED_R# 2 KSO10 5 6
R19
[27] CAPS_LED R1
1 CAP_LED_Q 1 2 CAP_LED 4 5
S
1K_0402_5% 3 4
+3VS +5VS 2 3
Q5 DDTA144VCA-7-F-GP CAPS_LED R20 1 @ 2 0_0402_5% 1 2
LN2306LT1G_SOT23-3 1
JKB1
1
22U_0805_10V6M
1
R21
10K_0402_5%
10K_0402_5%
10K_0402_5%
CF1
@ 0_0402_5%
2
2
RF1
RF2
RF3
2
1
JFAN1
A 1 A
2 1
[27] FAN_PWM DF1
2 1 3 2
[27] FAN_SPEED1 4 3
5 4
6 G1
DB2J31400L_SOD323-2 G2
ACES_50224-00401-001
CONN@
SP02000GC10
FAN / TP / PWR SW / KBBL
5 4 3 2 1
5 4 3 2 1
Main Func = IO Connector

swap @04/14
1 @EMI@ 2
RU13 0_0402_5%
+5VALW
USB20_CR_P1 2
LU7
1 USB20_CR_P1_R
I/O Board Connector
[35] USB20_CR_P1
1 1 JIOB1
CU17 CU18 USB20_CR_N1 3 4 USB20_CR_N1_R 1
[35] USB20_CR_N1 1
2
4.7U_0805_10V4Z 0.1U_0402_16V7K MCM1012B900F06BP_4P USB20_CR_P1_R 3 2
D 2 2 EMI@
CardReader USB20_CR_N1_R
USB20_1_P0_R
4
5
3
4
5
D
1 @EMI@ 2 6
RU14 0_0402_5% USB20_1_N0_R 7 6
USB2.0 DB 8
9
7
8
10 9
11 10
+RTCBATT 11
12
+3VS 12
+5V_USB_PWR2
13
14 13
15 14
80 mils 16 15
16
+5V_USB_PWR2 17
+5VALW 18 GND
UU1 1 @EMI@ 2 GND
1 RU15 0_0402_5% ACES_51524-0160N-001
5 OUT
IN CONN@
2 LU8
USB_EN# 4 GND USB20_1_P0 2 1 USB20_1_P0_R
[23,27] USB_EN# EN USB_OC1# [10] USB20_1_P0
3
OCB USB_OC1# [10]
1 USB20_1_N0 USB20_1_N0_R
CU20 SY6288D20AAC_SOT23-5 1 3 4
[10] USB20_1_N0
SA00007AO00 CU19
0.1U_0402_16V7K MCM1012B900F06BP_4P
2 0.1U_0402_16V7K EMI@
2
1 @EMI@ 2
RU16 0_0402_5%
C C
B B
A A
Security Classification Compal Secret Data

IO-DB
5 4 3 2 1
A B C D E
Main Func = DC Interface

+5VS and +3VS switch +3VS to +3VGS
+1.8V_ALW to +1.8VGS
R705 MODS@ 0_0402_5%
SHORT C34 @
2 1
1U_0402_6.3V6K
DIS@
S0A3_GPIO 1 2
J1 @
Max:7.0A U3
2 1 1 14
+5VALW 2 1 +3VS VIN1 VOUT1 +3VGS
1 +5VS 2 13 1 1
JUMP_43X118 R438 DIS@ 0_0402_5% VIN1 VOUT1 C24 C25
C23 PXS_PWREN 1 2 3VSDGPU_ON 3 12 @ 1 2 1000P_0402_50V7K
0.01U_0603_25V7K 0.1U_0402_10V6K
1 2 [10,55,57] PXS_PWREN ON1 CT1
U4 J3 DIS@
1 14 5VS 2 1 1
DIS@ 2 4 11 2
VIN1 VOUT1 2 1 +5VALW VBIAS GND
2 13 R23 C26 0.1U_0402_10V6K C27
VIN1 VOUT1 PXS_PWREN 1.8VSDGPU_ON
C29
10U_0805_10V4Z
C30
10U_0603_10V6M
JUMP_43X79 DIS@ 1 2 47K_0402_5% 5 10 1 2

SUSP# 1 2 5VS_GATE 3 12 1 2 ON2 CT2
@ @ 1 DIS@ 1000P_0402_50V7K 20mil(0.5A)
[27,50] SUSP# ON1 CT1
1
R24 0_0402_5% C28 470P_0402_50V7K 1

DIS@ 2 6 9
+1.8V_ALW VIN2 VOUT2 +1.8VGS
4 11 C31 0.1U_0402_10V6K 7 8
10mil VBIAS GND @ 1
VIN2 VOUT2
1
2
5 10 2 C32 15 C33
ON2 CT2 0.1U_0402_10V6K GPAD 0.1U_0402_10V6K
6 9 @ EM5209VF DFN 14P DUAL LOAD SW DIS@
7 VIN2 VOUT2 8 2 2
VIN2 VOUT2 SA00007PM00
15
GPAD
EM5209VF DFN 14P DUAL LOAD SW
SA00007PM00
R704 MODS@ 0_0402_5%

S0A3_GPIO 1 2
+5VALW +3VALW
Max:5.07A +3VS
C35 0.01U_0603_25V7K J4
1 2 U6 3VS 2 1
1 14 2 1
2 VIN1 VOUT1 2
C39
10U_0603_6.3V6M
C40
10U_0603_6.3V6M
2 13 JUMP_43X118
10mil 3VS_GATE
VIN1 VOUT1 @ 1 1
SUSP# 1 @ 2 3 12 1 2
R26 0_0402_5% ON1 CT1 C38 470P_0402_50V7K
1K_0402_5%
correct netname@0216 4
VBIAS GND
11 SHORT @
2 2
SUSP# 1 2 +1.8VS_GATE 5 10 2 1
R27
ON2 CT2 C41 330P_0402_50V7K +1.8VS
+1.8V_ALW
1 2 6 9 J5
1 2 7 VIN2 VOUT2 8 +1.8VS_LS 1 2
C42 0.1U_0402_16V7K
C43 @ VIN2 VOUT2 1 2
2
R703 MODS@ 0_0402_5% 1U_0402_6.3V6K 15 JUMP_43X79
S0A3_GPIO 1 2 GPAD C44
EM5209VF DFN 14P DUAL LOAD SW .1U_0402_16V7K
1
SA00007PM00
1500mA
Max:4A
U7
DMN3009LFV-13_POWERDI3333-8-5 +0.9VS
+0.9VALW 3
3 2 3
+3VALW +5VALW 5 1
4.7U_0603_6.3V6K
C46
1U_0402_6.3V6K
C47
1 1 1
C45
4.7U_0603_6.3V6K
4
2 2 @2
C48
10U_0603_6.3V6M
C49
10U_0603_6.3V6M
C50
10U_0603_10V6M
C51
10U_0603_10V6M
1 1
1
+5VALW
2
2 2 1 2 0.9VS_GATE
R28 1
4.7K_0402_5% C52
1
.1U_0402_16V7K
D
2 2
[27] 0.9VS_PWR_EN#
G
S Q7
R702 MODS@ 0_0402_5% 2N7002K_SOT23-3
3
1 2
[9,20,27] S0A3_GPIO
4 4

DC/DC Interface
A B C D E
5 4 3 2 1
Main Func = KBC +RTC_APU_R Board ID Analog Board ID definition,

Please see page 4.
1
D Q9 +3VALW
RTC_DIS 2 2N7002K_SOT23-3
G
2
Typec ID S
RE5
3
+3VALW R30 DVT2 use Ra 100K_0402_1%
+EC_VCCA 100K_0402_5% RE9 EVT use
+3VALW +3VALW_EC LE1 RE9 UMA@ RE9 UMA@ @
1
AD_BID0
2
FBMA-L11-160808-800LMT_0603
2 1 0_0603_5% +3VALW_EC 1 2 +EC_VCCA
RE8 RE6 0.1U_0402_16V7K 0.1U_0402_16V7K
2
@ Rc 100K_0402_1% 1 1 1 1 2 2 1 1
+3.3V_VDD_PIC CE4 CE5 CE6 CE2 CE7 CE3 0.1U_0402_16V7K RE9 CE9
@ CE8
D @ 12K_0402 +-1% Rb 0_0402_1% D
1
TYPEC_ID 2 @ 1 0_0603_5%
RE508 1000P_0402_50V7K 43K +-1% 0402 27K +-1% 0402
@ 2 2 2 2 1 1 2 ECAGND SD034120280 EVT use 2
1
ECAGND [46]
2
0.1U_0402_16V7K 0.1U_0402_16V7K 1000P_0402_50V7K SD034430280 SD034270280 0.1U_0402_16V7K

@
RE11
Rd 0_0402_1% 2 1 +3VLP DVT2 use
RE12 0_0402_5%
RE9 DIS@ RE9 DIS@ DVT1 use DVT1 use
1
111
125 Reserved for KB9012 RE9 @ RE9 @
22
33
96
67
UE1
9
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
MEM_ERROR_A BATT_CHG_LED# 56K +-1% 0402 1/16W 33K +-1% 0402

1 21 15K_0402_1% 20K_0402_1%
[9] MEM_ERROR_A KB_RST# 2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 BATT_CHG_LED# [29]
BEEP# SD034560280 SD034330280
[10] KB_RST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 FAN_PWM BEEP# [18]
SERIRQ SD034150280 SD034200280
[10] SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 AC_DIS FAN_PWM [24]
[10] LPC_FRAME# LPC_AD3 LPC_FRAME# PWM Output AC_OFF/GPIO13 AC_DIS [48]
+3VALW CE12 5 2 1 ECAGND
[10] LPC_AD3 LPC_AD2 7 LPC_AD3
@EMI@ 22P_0402_50V8J @EMI@ CE11 100P_0402_50V8J
2 1 [10] LPC_AD2 LPC_AD1 LPC_AD2 BATT_TEMP
RE14 2 1 33_0402_5% 8 63
[10] LPC_AD1 LPC_AD0 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 MEM_ERROR_B BATT_TEMP [46,48]
[10] LPC_AD0 LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 ADP_I MEM_ERROR_B [9]
65
12 ADP_I/AD2/GPIO3A 66 AD_BID0 ADP_I [48]
[10] LPC_CLK0_EC CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B BATT_I
13 75
2 1 [9,10,19,20] PLT_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 PANEL_BKLEN BATT_I [48]
CE13 0.1U_0402_16V7K +5VALW
EC_SCI# 20 EC_RST# AD5/GPIO43 PANEL_BKLEN [8]
1 2 LID_SW# [10] EC_SCI# 1 2 CLKRUN#_R 38 EC_SCI#/GPIO0E
ESD@ [10] CLKRUN# @
CLKRUN# CLKRUN#/GPIO1D
RE17 10K_0402_5% 0_0402_5% RE52
68 GPU_AC_LIGHT USB_EN#
RE18 1 2 10K_0402_5%
1 2 WLAN_WAKE# DA0/GPIO3C 70 del EN_DFAN1 12/03
DA Output EN_DFAN1/DA1/GPIO3D EC_ENVDD
RE19 10K_0402_5% KSI0 55 71
56 KSI0/GPIO30 DA2/GPIO3E 72 EC_ENVDD [16]
KSI1
57 KSI1/GPIO31 DA3/GPIO3F LCD_TEST [16]
KSI2 CE14 100P_0402_50V8J
KSI3 58 KSI2/GPIO32 83 EC_MUTE# HW_ACAV_IN 2 1
59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 USB_EN# EC_MUTE# [18]
KSI4
1 2 EC_PME# 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 TYPEC_CLK USB_EN# [23,25]
KSI5
KSI[0..7] 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 TYPEC_SDA TYPEC_CLK [31]
C RE23 10K_0402_5% KSI6 PS2 Interface C
[24] KSI[0..7] 62 KSI6/GPIO36 PSDAT2/GPIO4D 87 TP_CLK TYPEC_SDA [31]
KSI7
1 2 EC_SCI# KSO[0..16] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK [24]
KSO0
[24] KSO[0..16] 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA [24]
RE24 10K_0402_5% KSO1
KSO2 41 KSO1/GPIO21
+3VS KSO3 42 KSO2/GPIO22 97 TYPEC_ID PID change to Typec_id @1/19
KSO4 43 KSO3/GPIO23 ENKBL/GPXIOA00 98 WOL_EN
PM_SLP_S5# PM_SLP_S3#_R KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 0.9VS_PWR_EN# WOL_EN [19] WOL_EN (Hi Act i ve) EC_RSMRST# 1 2 ESD@
1 @ 2 EC_SCI# KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 0.9VS_PWR_EN# [26]
CE16 1000P_0402_50V7K
RE25 10K_0402_5% KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH [46]
1 @EMI@ 1 @EMI@ KSO7/GPIO27
CE17 CE18 KSO8 47 SPI Device Interface
KSO9 48 KSO8/GPIO28 119
KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120
2 2 KSO11 50 KSO10/GPIO2A MOSI/GPIO5C 126
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
0.1U_0402_16V7K 0.1U_0402_16V7K KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A
KSO13/GPIO2D
KSO14 53 ERP_LOT6 del @ 3/5
KSO15 54 KSO14/GPIO2E 73 WLAN_EN
ESD Request at SSI KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 WLAN_EN [20]
KSO16 81 74 VGATE
TP_EN KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 DBC_EN VGATE [9,51,53] +3VALW_EC
82 89
+3VALW [24] TP_EN KSO17/GPIO49 GPIO50 90 WLAN_WAKE# DBC_EN [16]
BATT_CHG_LED#/GPIO52 91 CAPS_LED WLAN_WAKE# [20]
typec@
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 del PWR_LED# @ 3/6 CAPS_LED [24] INT#_TYPEC 1 2 2.2K_0402_5%
EC_SMB_DA1
CHARGER [46,48] EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 GPIO PWR_LED#/GPIO54 BATT_LOW_LED#
RE506
RE509 1 2 2.2K_0402_5% 78 93
1 2 2.2K_0402_5% EC_SMB_CK1 [46,48] EC_SMB_DA1 EC_SMB_CK2 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95 BATT_LOW_LED# [29]
RE510 SYSON
[8,28,39] EC_SMB_CK2 EC_SMB_DA2 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON [50,52] FPR_SCAN#
APU, GPU, Thermal RE507 1 2 10K_0402_5%
RPE change to resistor*2 @1/25 [8,28,39] EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 0.9_1.8VALW_PWREN VR_ON [53]
DPWROK_EC/GPIO59 0.9_1.8VALW_PWREN [51,52]
SM Bus
PM_SLP_S3#_EC EC_RSMRST# 0.9VS_PWR_EN#
0_0402_5%1 @ 2 RE30 6 100 RE31 1 2 10K_0402_5%
[9] PM_SLP_S3#_R PWR_SELECT 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 SATA_ODD_PRSNT# EC_RSMRST# [9]
[46] PWR_SELECT GPIO07 GPXIOA04 INT#_TYPEC SATA_ODD_PRSNT# [9,22]
15 102 follow EC del EC_LID_OUT#_R @ 1/19
[9,20,26] S0A3_GPIO 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PH INT#_TYPEC [31]
[46] PS_ID 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 1 2
VCOUT0 @
[8] THERMTRIP# 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 VCOUT0_PH# [49]
BKOFF# 0_0402_5% RE35
[55,56] DGPU_PWROK PTP_DIS# 19 GPIO0C BKOFF#/GPXIOA08 106 EC_TP_INT# BKOFF# [16]
[24] PTP_DIS# KB_LED_PWM AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 PCH_PWR_EN EC_TP_INT# [24]
25 107
[24] KB_LED_PWM FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 HW_ACAVIN_NB PCH_PWR_EN [11] GPU_AC_LIGHT
B 0_0402_5%1 @ 2 RE36
1 [24] 2 FAN_SPEED1 EC_PME# 29 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 HW_ACAVIN_NB [46,47,48] ACIN_65W [39] B
[9,19,34] APU_PCIE_WAKE# EC_TX
1.8VS
0_0402_5% RE37 30 FANFB1/GPIO15 ADD HW_ACAVIN_NB @3/2
[20] EC_TX EC_RX 31 EC_TX/GPIO16 110 HW_ACAV_IN
[20] EC_RX APU_FCH_POK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 EC_ON HW_ACAV_IN [39,46,47,48]
[9] APU_FCH_POK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON [49]
[31,46,49] POK RTC_DIS
34
36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03
114
115
ON/OFF#
LID_SW# ON/OFF# [29]
NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# [29]
116 SUSP# 0_0402_5%
SUSP#/GPXIOD05 117 SUSP# [26,50] 2 1 SATA_LED#_R
RE39
GPXIOD06 118 SATA_LED#_R [29]
PBTN_OUT# FPR_SCAN# 1.8VS
[35]
122 PECI/GPXIOD07 @
[9] PBTN_OUT# PM_SLP_S5#_R PBTN_OUT#/GPIO5D SATA_ACT#_RR SATA_ACT#
0_0402_5%1 @ 2 RE50 123 124 +V18R 2 1
+1.8V_ALW
1
0_0402_5% 2RE41
SATA_ACT# [9,29,34]
[9] PM_SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 RE40 @ 0_0402_5%
AGND
0_0402_5%
GND
GND
GND
GND
GND
change PM_SLP_S5# @ 1/19 RE42 2 1

+3VALW_EC
11
24
35
94
113
69
KB9022QD_LQFP128_14X14
20mil LE2
ECAGND 2 1
FBMA-L11-160808-800LMT_0603
delete off-page 11/25

VCOUT1_PH 1 2 H_PROCHOT#
@
H_PROCHOT# [8,10,46,48,53]
0_0402_5% RE43
D1
LID_SW# 1 2 TS_EN_R
TS_EN_R [16]
A RB751V-40_SOD323-2 A

EC ENE-KB9012A4/KB9022QC
5 4 3 2 1
5 4 3 2 1
Main Func = Thermal Sensor
D D
+3VS
1 1
10U_0603_6.3V6M
C53 @
C54
0.1U_0402_16V7K +3VS
2 2
+3VS
change part SA00000V200 05/06 change to SB00000PV00
1
NCT7718_DXP
Q10 U8 R31
1 8 THM_SML1_CLK 2.2K_0402_5%
1 1 VDD SCL
1
C @
LMBT3904LT1G_SOT23-3
2
2 C55 C56 2 7 THM_SML1_DATA
2
B 470P_0603_50V8J 2200P_0402_50V7K D+ SDA @ Q11B
G
1 THM_SML1_DATA
E 2 2 3 6 ALERT# C57 @ 6 1
1 [8,27,39] EC_SMB_DA2
3
C NCT7718_DXN D- ALERT# C
S
C58 L2N7002DW1T1G 2N
1
T_CRIT# 4 5
0.1U_0402_16V7K
T_CRIT# GND 2 R32

DIMM
0.1U_0402_16V7K
2 2.2K_0402_5%
5
G781-1P8F MSOP 8P Q11A
2
3 4 THM_SML1_CLK
Layout Note: [8,27,39] EC_SMB_CK2
S
L2N7002DW1T1G 2N
DXN and DXP routing width and spacing is 10 mil / 10 mil.
B B
+3VS
R33 1 2 18.7K_0402_1% ALERT#
R34 1 2 2K_0402_1% T_CRIT#
A A

Thermal Sensor
5 4 3 2 1
5 4 3 2 1
Main Func = POWER BTN

+3VS Power button
For ESD Reserved
1
R83 ESD@
LID_SW# EC1 1 2 .1U_0402_16V7K
100K_0402_5% JPWR1
D +3VS D
1
2
ON/OFF# 2 1
2
1
SATA_ACT#_R LID_SW# 3
[27] LID_SW# 3
R82 +3VALW 4
4
100K_0402_5%
3
5
Q26B @ 6 GND1
2
GND2
L2N7002DW1T1G
5
JXT_FP226H-004S1AM
SP01002BJ00
4
6
Q26A @
L2N7002DW1T1G
SATA_ACT# 2 Pop only before MP
[9,27,34] SSD_DAS#
1
change to SB00000PV00
ON/OFF switch
C TOP Side C
SW1
+3VLP
+5VALW
RE44 100K_0402_5%
1 2
Main Func = LED
1
S TACT SW TST71A-N-220-S017 SPST H0
@
2
change to SB00000PV00 +5VALW
ON/OFF# [27]
Q15
2
CE19 0.1U_0402_16V7K
1 1 ESD@
2
1000P_0402_50V7K
3
R2
BATT_LOW_LED# BATT_LOW_LED_R#
EC2
ED2
1 6 2
[27] BATT_LOW_LED# BATT_LOW_LED
1
R1
Q14A 2 2
Low actived from KBC GPIO L2N7002DW1T1G BOT Side
DDTA144VCA-7-F-GP
@ESD@
SW2
+5VALW
1 2
B
Low actived from KBC GPIO Q16 B
1
5
3
R2
BATT_CHG_LED# 4 3 BATT_CHG_LED_R# 2
[27] BATT_CHG_LED# BATT_CHG_LED S TACT SW TST71A-N-220-S017 SPST H0
1 follow esd require @0619
R1
SATA HDD LED Q14B @
LOW actived from PCH GPIO L2N7002DW1T1G
DDTA144VCA-7-F-GP
+3VS
swap 06/02 LED1

BATT_CHG_LED 2 1 2 1
2
R69 200_0402_5% W
R36
BATT_LOW_LED 2 1 4 3
10K_0402_5%
R68 200_0402_5% Y
1
LTW-295DSKS-5A_YEL-WHITE~D
SATA_LED#_R
[27] SATA_LED#_R
follow intel LED change to SC500008J00 06/20
A A
2
2N7002KW_SOT323-3
G
R800
SATA_ACT# 1 2
0_0402_5%
SATA_ACT#_R 3 1 BATT_CHG_LED_R#
[9,27,34] SATA_ACT# Issued Date 2016/01/07 Deciphered Date 2017/01/07 Title
S
LED/PWR-DB
Q17 Size Document Number Rev
5 4 3 2 1
5 4 3 2 1
Main Func = Screw Hole
ZZZ ZZZ2
Part Number Description Part Number Description
DAZ21O00100 PCB CAL51 LA-F121P LS-F114P/F121P/F122P DAZ21O00102 PCB CAL51 LA-F121P LS-F114P/F121P/F122P TRIPOD A31 !
PCB_R1@ PCB_R3T@
D D
ZZZ1 ZZZ3
Part Number Description Part Number Description
DAZ21O00101 PCB CAL51 LA-F121P LS-F114P/F121P/F122P GOLD A31 ! DAZ21O00104 PCB CAL51 LA-F121P LS-F114P/F121P/F122P T-MAC A31 !
PCB_R3G@ PCB_R3H@
Screw hole/FD del clip1 @04/24
@
H1 H3 H4 H5 H6 H7 CLIP2
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA 1
1
EMIST_SQ-55G_1P
1
C C
H_3P0 H_5P0-G H_3P0-G H_3P0-G H_3P0-G H_3P0-G
H8 H9 H10 H11 H12 H13 H14

HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
H_5P6N
H_3P3 H_3P5 H_3P5 H_3P2 H_3P2 H_3P0X4P0
HCPU1
HOLEA
HCPU2
HOLEA
HCPU3
HOLEA
HCPU4
HOLEA
1
H_4P0X3P7 H_3P7 H_4P0 H_3P7X4P0
B B
FD1 FD2 FD3 FD4
1
A A

Screw Hole
5 4 3 2 1
5 4 3 2 1
+5V_CONN_P1 +3.3V_VDD_PIC
+CCG_VBUS
+3.3V_VDD_PIC UT1 @
1
1 1 1 1 1 1 1 31 11
1U_0603_16V7
1U_0603_16V7
VDDD VBUS_P_CTRL_P1 VBUS_P_CTRL_P1 [32,47]

0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
22U_0805_10V6M
RT1
CT50
32 12 TYPEC@ 100K_0402_1%
CT3
CT4
CT5
CT6
CT7
CT49
VDDIO VBUS_C_CTRL_P1 VBUS_C_CTRL_P1 [47]

2 2 2 2 2 2 2 TYPEC@ 20
2
VBUS_DISCHARGE_P1 VBUS_DISCHARGE [32] VBUS_MON_P1
CT8 2 1 1U_0603_16V7 33
VCCD hpd pull up @ for CRB
@
1
TYPEC@ TYPEC@ TYPEC@ @ 2 RT2 1 +3.3V_VDD_PIC 1
TYPEC@ TYPEC@ @ 10K_0402_5%
8 18 APU_DP3_HPD
+5V_CONN_P1 RT3 CT9
VCONN_V5V_P1 HPD_P1 APU_DP3_HPD [8,33] 0.1U_0402_10V7K
10K_0402_1%
23 2
place near UT1.8 place near UT1.31/32 20 mils
2
VCONN_V5V_P2 7 TYPEC@
CC2_P1 CCG4_CC2_P1 [32]
TYPEC@ TYPEC@
CT10 1 2 390P_0402_50V7K
3
D I2C_SDA_SCB2_AR D
4
I2C_SCL_SCB2_AR 9
CC1_P1 CCG4_CC1_P1 [32]
5 TYPEC@
[32] MUX_USB2_FILP I2C_INT_AR_P1 CT11 1 2 390P_0402_50V7K
6
I2C_INT_AR_P2 26 del MUX_A_EN @3/7
MUX_CTRL3_P1/SDA_3 28 CCG4_APU_USBC_SDA
MUX_CTRL2_P1/SDA_4 CCG4_APU_USBC_SCL CCG4_APU_USBC_SDA [10,33]
29
VBUS_MON_P1 MUX_CTRL1_P1/SCL_4 CCG4_APU_USBC_SCL [10,33]
13
VBUS_MON_P1
37
VBUS_MON_P2 30
HPD_P2 RT117
100K_0402_1%
VBUS_P_CTRL_P1 1 TYPEC@2
22
CCG4_SWD_IO CC1_P2 RT118
TP1 1 100K_0402_1%
SWD_IO VBUS_C_CTRL_P1 1 TYPEC@2
TYPEC@ RT116
TP2 CCG4_SWD_CLK 2 APU_DP3_HPD 2 1
SWD_CLK/I2C_CFG_EC
10K_0402_5%
15 24
[27] INT#_TYPEC I2C_INT_EC CC2_P2
UT3
+5VALW 16
[27] TYPEC_SDA I2C_SDA_SCB1_EC
2
GND 17
[27] TYPEC_CLK I2C_SCL_SCB1_EC
1 34
IN MUX_CTRL3_P2 35
1 MUX_CTRL2_P2
3 +5V_CONN_P1 36
CT12 OUT MUX_CTRL1_P2
0.1U_0402_10V7K 19
2 AP2330W-7_SC59-3 20 mils VCONN_MON_P1/GPIO
TYPEC@
TYPEC@ 14
[32,47] OVP_TRIP_P1 OVP_TRIP_P1
0.2A OCP for VCONN! CCG4_ID1 25 del by ccg4 comment @1229
SCL_3/VCONN_MON_P2
CCG4_ID2 27
VSEL_2_P2/GPIO
+3VALW 38
VBUS_C_CTRL_P2
21 39
OVP_TRIP_P2 VBUS_P_CTRL_P2
C 40 C
1
VBUS_DISCHARGE_P2
1
RT73 +3.3V_VDD_PIC TYPEC@

RT72 2.2K_0402_5%
1 2 4.7K_0402_5% CCG4_XRES 10
2.2K_0402_5% RT6
XRES 41
2
TP3 EPAD
TYPEC@ 1
2
TYPEC_SDA
0.1U_0402_10V7K
TYPEC@
TYPEC@
CT13
+3.3V_VDD_PIC CYPD4225-40LQXIT_QFN40_6X6
TYPEC_CLK 2
Note:Cypress 4125
1
1
RT71
RT70 2.2K_0402_5%
2.2K_0402_5%
2
TYPEC@
2
CCG4_APU_USBC_SDA
TYPEC@
UT1
CCG4_APU_USBC_SCL
SA00009U530
CYPD4125@
DT1
S IC CYPD4125-40LQXIT QFN 40P FOR AMD FW
+3VALW 2 1
S SCH DIO RB551V-30 SOD323 PANJIT

TYPEC@ +3.3V_VDD_PIC
UT4
RT9069-33GB_SOT23-5 +3.3V_VDD_PIC
DT2
1 5
VCC OUT 2 1
+CCG_VBUS_1
2 JCCG4_T CONN@
GND 1
1 S SCH DIO RB551V-30 SOD323 PANJIT 1
1
2.2U_0603_10V6K
@ 3 4 2
2.2K_0402_5%
NC EN TYPEC@ 2 3 CCG4_XRES
CT17
RT134
1 1
TYPEC@
1U_0603_25V
CCG4_SWD_CLK
0.1U_0402_25V6
3 4
CT55
2 4 5 CCG4_SWD_IO
CT56
TYPEC@
5
2
2 2 CVILU_CH31052VA00-NH
PCB Footprint = DC021611210
TYPEC@ TYPEC@
TYPEC@
Test Point only
1 2
RT112 200K_0402_1%
B B
TYPEC@ TYPEC@
1
D RT113 0_0402_5%
RT59 200k CT53:1U delay 70ms
1U_0603_25V6
1
2 1 2
POK [27,46,49]
CT53
G
S QT4
2
TYPEC@ @ CT54
1U_0402_16V6K
2
LN2306LT1G_SOT23-3
Loki AMD
CCG4 ID1: 4* VDD/8
CCG4 ID2: 0
+3.3V_VDD_PIC +3.3V_VDD_PIC
1
RT4 RT64
TYPEC@ 10K_0402_5% @ 20K_0402_5%
2
CCG4_ID1 CCG4_ID2
1
RT115 RT65
TYPEC@ 10K_0402_5% TYPEC@ 10K_0402_5%
2
A A

Cypress PD Control
5 4 3 2 1
5 4 3 2 1
Main Func = USB2 Mux

+3.3V_VDD_PIC Close to JUSBC1 <500mil +CCG_VBUS
+CCG_VBUS
1 @EMI@ 2
2
RT9 0_0402_5% 1 1 1
RT130 TYPEC@
TYPEC@ TYPEC@ CT21 CT22 @ CT57
10U_0603_25V6M
22U_0805_25V6M
22U_0805_25V6M
0_0402_5% LT1 TYPEC@EMI@ del 100U 06/19
TYPEC@ TOP_MUX_P 2 1 TOP_MUX_P_R @ESD@ 2 2 2
1
UT10
2
10 1 BOT_MUX_P D2
MUX_USB2_FILP 9 VCC 1D+ 2 BOT_MUX_N TOP_MUX_N 3 4 TOP_MUX_N_R
[31] MUX_USB2_FILP USB20_0_P0 S 1D- TOP_MUX_P L30ESD24VC3-2_SOT23-3
8 3
[10] USB20_0_P0 USB20_0_N0 D+ 2D+ TOP_MUX_N
7 4 MCM1012B900F06BP_4P
D [10] USB20_0_N0 D- 2D- D
6 5
OE# GND 1 @EMI@ 2
RT10 0_0402_5%
1
NX3DV221GM_XQFN10U10_2X1P55 +CCG_VBUS +CCG_VBUS
1
RT119
TYPEC@ 10K_0402_5% follow esd require @0621
JUSBC1
2
A1 B12
GND1 GND3
1 @EMI@ 2 USB3_DP3_MTX_L_DRX_P2 A2 B11 USB3_DP3_MRX_L_DTX_P3
RT102 0_0402_5% USB3_DP3_MTX_L_DRX_N2 A3 SSTXP1 SSRXP1 B10 USB3_DP3_MRX_L_DTX_N3
SSTXN1 SSRXN1
CT26 2 1 A4 B9 1 2 CT27
LT3 TYPEC@EMI@ 0.47U_0402_50V6K TYPEC@ VBUS1 VBUS3 TYPEC@ 0.47U_0402_50V6K
BOT_MUX_P 2 1 BOT_MUX_P_R A5 B8
[31] CCG4_CC1_P1 CC1 SUB2 MUX_SBU2 [33]
S OE# OUT PUT TOP_MUX_P_R A6 B7 BOT_MUX_N_R
BOT_MUX_N 3 4 BOT_MUX_N_R TOP_MUX_N_R A7 DP1 DN2 B6 BOT_MUX_P_R
DN1 DP2
Low Low 1D+/1D- MCM1012B900F06BP_4P A8 B5
Bottom
[33] MUX_SBU1 SUB1 CC2 CCG4_CC2_P1 [31]
High Low 2D+/2D- 1 @EMI@ 2 2 1 A9 B4 1 2
TOP
CT28 CT29
RT103 0_0402_5% 0.47U_0402_50V6K TYPEC@ VBUS2 VBUS4 TYPEC@ 0.47U_0402_50V6K
USB3_DP3_MRX_L_DTX_N0 A10 B3 USB3_DP3_MTX_L_DRX_N1
USB3_DP3_MRX_L_DTX_P0 A11 SSRXN2 SSTXN2 B2 USB3_DP3_MTX_L_DRX_P1
SSRXP2 SSTXP2
A12 B1
GND2 GND4
1 4
2 GND5 GND8 5
3 GND6 GND9 6
GND7 GND10
JAE_DX07S024JJ2R1300~D
CONN@
C C
1 @EMI@ 2
RT104 0_0402_5% 1 @EMI@ 2
RT108 0_0402_5%
swap pin 4/18
LU13 TYPEC@EMI@
2 0.1U_0402_10V7K USB3_DP3_MTX_C_DRX_P2
CT58 1TYPEC@ 2 1 USB3_DP3_MTX_L_DRX_P2 INPAQ HCM1012GD670A05P
[33] USB3_DP3_MTX_RD_DRX_P2 USB3_DP3_MRX_L_DTX_P3 3 4
USB3_DP3_MRX_RD_DTX_P3 [33]
2 0.1U_0402_10V7K USB3_DP3_MTX_C_DRX_N2
CT59 1TYPEC@ 3 4 USB3_DP3_MTX_L_DRX_N2
[33] USB3_DP3_MTX_RD_DRX_N2 USB3_DP3_MRX_L_DTX_N3 2 1
INPAQ HCM1012GD670A05P USB3_DP3_MRX_RD_DTX_N3 [33]
LU15 TYPEC@EMI@
1 @EMI@ 2
RT105 0_0402_5% 1 @EMI@ 2
RT109 0_0402_5%
5V@3A 1 @EMI@ 2
RT106 0_0402_5%
1 @EMI@ 2
RT110 0_0402_5%
CT62 TYPEC@ 10U 6.3V 0402

1 2 LU14 TYPEC@EMI@ LU16 TYPEC@EMI@
2 0.1U_0402_10V7K USB3_DP3_MTX_C_DRX_N1
CT60 1TYPEC@ 2 1 USB3_DP3_MTX_L_DRX_N1 USB3_DP3_MRX_L_DTX_P0 2 1
[33] USB3_DP3_MTX_RD_DRX_N1 USB3_DP3_MRX_RD_DTX_P0 [33]
UT8 TYPEC@
+CCG_VBUS
+5VALW
5 1 2 0.1U_0402_10V7K USB3_DP3_MTX_C_DRX_P1
CT61 1TYPEC@ 3 4 USB3_DP3_MTX_L_DRX_P1 USB3_DP3_MRX_L_DTX_N0 3 4
IN OUT [33] USB3_DP3_MTX_RD_DRX_P1 USB3_DP3_MRX_RD_DTX_N0 [33]
INPAQ HCM1012GD670A05P INPAQ HCM1012GD670A05P
3
[10] USB_OC2# FLAG 1 @EMI@ 2 1 @EMI@ 2
B B
RT107 0_0402_5% RT111 0_0402_5%
1 3 4 2
D
[31,47] VBUS_P_CTRL_P1 EN GND

1
QT5 SY6861A1AAC SOT23

TYPEC@ LN2306LT1G_SOT23-3 RT62
G
2
TYPEC@ 10K_0402_5%
2
EU7 EU8
[31,47] OVP_TRIP_P1 TOP_MUX_N TOP_MUX_N CCG4_CC1_P1 CCG4_CC1_P1
1 1 10 9 1 1 10 9
1
RT63 TOP_MUX_P 2 2 8 TOP_MUX_P MUX_SBU1 2 2 8 MUX_SBU1

9 9
TYPEC@ 100K_0402_5% BOT_MUX_N 4 4 7 BOT_MUX_N MUX_SBU2 4 4 7 MUX_SBU2

7 7
2
BOT_MUX_P 5 5 6 BOT_MUX_P CCG4_CC2_P1 5 5 6 CCG4_CC2_P1

6 6
3 3 3 3
8 8
+CCG_VBUS L05ESDL5V0NA-4_SLP2510P8-10-9 L05ESDL5V0NA-4_SLP2510P8-10-9
change footprint 06/19 TYPEC@ESD@ TYPEC@ESD@
1
RT33
100_1206_5% USB3_DP3_MTX_L_DRX_P2 1 2
TYPEC@ESD@ USB3_DP3_MRX_L_DTX_P3 1 2
TYPEC@ESD@
DT3 AZ5B75-01B.R7G_CSP0603P2Y2 DT7 AZ5B75-01B.R7G_CSP0603P2Y2
TYPEC@ USB3_DP3_MTX_L_DRX_N2 1 2
TYPEC@ESD@ USB3_DP3_MRX_L_DTX_N3 1 2
TYPEC@ESD@
2

USB3_DP3_MRX_L_DTX_N0 1 2
TYPEC@ESD@ USB3_DP3_MTX_L_DRX_N1 1 2
TYPEC@ESD@
1

D QT3 USB3_DP3_MRX_L_DTX_P0 1 2
TYPEC@ESD@ USB3_DP3_MTX_L_DRX_P1 1 2
TYPEC@ESD@
2 2N7002K_SOT23-3 DT6 AZ5B75-01B.R7G_CSP0603P2Y2 DT10 AZ5B75-01B.R7G_CSP0603P2Y2
[31] VBUS_DISCHARGE
G
A S A
1
RT32
TYPEC@
100K_0402_5%
2
TYPEC@
TYPE-C CONN
Type-C 5V Provide Path Control THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
C
Document Number
LA-F121P
Re v
0.3(X02)
5 4 3 2 1
5 4 3 2 1
Main Func = TYPEC Re-driver

+3VALW
+3VALW
1
TYPEC@
1
RT17
RT18
RT19
RT20
RT21
RT22
RT23
TYPEC@
TYPEC@
TYPEC@
TYPEC@
TYPEC@
RT24
RT25
RT26
RT27
RT28
RT29
RT30
TYPEC@
TYPEC@ 1K_0402_5%
TYPEC@
TYPEC@
TYPEC@
@
@ @
2
2
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
2
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
TYPEC_I2C_EN#
TYPEC_DEQ1
D D
TYPEC_UEQ1/A1
TYPEC_DEQ0
TYPEC_UEQ0/A0
RT131 TYPEC_SWAP
TYPEC@ TYPEC@ TYPEC@ TYPEC@
1 TYPEC@2 +3VALW_TYPEC TYPEC_CTL1
+3VALW TYPEC_DIR1
TYPEC_CFG1
1 0_0402_5% 1 1 1 1 TYPEC_DIR0
0.1U_0402_10V7K
TYPEC_CFG0
TYPEC@
CT32
CT33
CT34
CT35
CT36
TYPEC_FLIP
2 2 2 2 2 TYPEC_VIO_SEL
TYPEC_CTL0
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
typec@ =>@ 06/02

1
1
RT40
RT41
RT42
RT43
RT44
RT45
RT46
RT47
RT48
RT49
RT50
RT51
RT52
0_0402_5% RT53
0_0402_5%
near UT
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
TYPEC@
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
@ @ @ @ @ @
@
@
@ @ @ @ @
+3VALW_TYPEC
change to TUSB544 @ 1/25
UT9 TYPEC@
20
28
1
6
C C
VCC_1
VCC_2
VCC_3
VCC_4
USB3_DP3_MRX_DTX_P0 2 0.1U_0402_10V7K USB3_DP3_MRX_C_RD_DTX_P0 USB3_DP3_MRX_RD_DTX_P0

CT37 1TYPEC@ 9 40
[10] USB3_DP3_MRX_DTX_P0 USB3_DP3_MRX_DTX_N0 2 0.1U_0402_10V7K USB3_DP3_MRX_C_RD_DTX_N0
CT38 1TYPEC@ 10 URX2p DRX2p 39 USB3_DP3_MRX_RD_DTX_N0 USB3_DP3_MRX_RD_DTX_P0 [32]
[10] USB3_DP3_MRX_DTX_N0 URX2n DRX2n USB3_DP3_MRX_RD_DTX_N0 [32]
USB3_DP3_MRX_DTX_P3 2 0.1U_0402_10V7K USB3_DP3_MRX_C_RD_DTX_P3
CT39 1TYPEC@ 19 30 USB3_DP3_MRX_RD_DTX_P3
[10] USB3_DP3_MRX_DTX_P3 USB3_DP3_MRX_DTX_N3 2 0.1U_0402_10V7K USB3_DP3_MRX_C_RD_DTX_N3
CT40 1TYPEC@ 18 URX1p DRX1p 31 USB3_DP3_MRX_RD_DTX_N3 USB3_DP3_MRX_RD_DTX_P3 [32]
[10] USB3_DP3_MRX_DTX_N3 URX1n DRX1n USB3_DP3_MRX_RD_DTX_N3 [32]
USB3_DP3_MTX_DRX_P1 2 0.1U_0402_10V7K USB3_DP3_MTX_C_RD_DRX_P1 USB3_DP3_MTX_RD_DRX_P1
CT41 1TYPEC@ 12 37
[10] USB3_DP3_MTX_DRX_P1 USB3_DP3_MTX_DRX_N1 USB3_DP3_MTX_RD_DRX_P1 [32]
2 0.1U_0402_10V7K USB3_DP3_MTX_C_RD_DRX_N1
CT42 1TYPEC@ 13 UTX2p DTX2p 36 USB3_DP3_MTX_RD_DRX_N1
[10] USB3_DP3_MTX_DRX_N1 UTX2n DTX2n USB3_DP3_MTX_RD_DRX_N1 [32]
USB3_DP3_MTX_DRX_P2 2 0.1U_0402_10V7K USB3_DP3_MTX_C_RD_DRX_P2 USB3_DP3_MTX_RD_DRX_P2 +3VALW
CT43 1TYPEC@ 16 33
[10] USB3_DP3_MTX_DRX_P2 USB3_DP3_MTX_DRX_N2 USB3_DP3_MTX_RD_DRX_P2 [32]
2 0.1U_0402_10V7K USB3_DP3_MTX_C_RD_DRX_N2
CT44 1TYPEC@ 15 UTX1p DTX1p 34 USB3_DP3_MTX_RD_DRX_N2
[10] USB3_DP3_MTX_DRX_N2 UTX1n DTX1n USB3_DP3_MTX_RD_DRX_N2 [32]
RT31
TYPEC_UEQ1/A1 2 29 TYPEC_DEQ1
TYPEC_UEQ0/A0 35 UEQ1/A1 DEQ1 38 TYPEC_DEQ0
UEQ0/A0 DEQ0
APU_DP3_HPD TYPEC_SWAP
2
10K_0402_5%
32 5
[8,31] APU_DP3_HPD HPDIN SWAP
TYPEC_I2C_EN# TYPEC_DIR1
17 11 TYPEC@
I2C_EN DIR1 8 TYPEC_DIR0
TYPEC_USBC_SCL 2 TYPEC@1 0_0402_5% TYPEC_FLIP 21 DIR0
RT54
1
TYPEC_USBC_SDA 2 TYPEC@1 0_0402_5% TYPEC_CTL0 22 FLIP/SCL 7 TYPEC_TI_EN#

RT55
TYPEC_CTL1 23 CTL0/SDA SLP_S0#
TYPEC_CFG1 4 CTL1 14 TYPEC_VIO_SEL
TYPEC_CFG0 CFG1 VIO_SEL
1
3 1
CFG0
0.1U_0402_10V7K
RT61
2 TYPEC@1 0_0402_5% MUX_SBU1

RT132 TYPEC@ CT45 1 2 0.1U_0402_10V7K 24 27
CT46
[8] APU_DP3_AUXP AUXp SBU1 MUX_SBU2 MUX_SBU1 [32]

RT133 2 TYPEC@1 0_0402_5% TYPEC@ CT47 1 2 0.1U_0402_10V7K 25 26 @
AUXn SBU2 MUX_SBU2 [32]
[8] APU_DP3_AUXN @ 2
0_0402_5%
2
41
TGND
2
TUSB544RNQ_QFN40_4X6
2
RT35
RT101
RT34
RT60
TYPEC@ TYPEC@
2
2M_0402_1%
TYPEC@ TYPEC@
1
2M_0402_1%
100K_0402_5%
100K_0402_5%
1
+3VALW
B +3VALW B
TYPEC_USBC_SCL
4.7K_0402_5% 1 TYPEC@2 RT36
TYPEC_USBC_SDA
4.7K_0402_5% 1 TYPEC@2 RT37
+3VALW
TYPEC@
2
G
QT6A
L2N7002DW1T1G
CCG4_APU_USBC_SCL 6 1 TYPEC_USBC_SCL
S
[10,31] CCG4_APU_USBC_SCL
D
5
G
QT6B TYPEC@
CCG4_APU_USBC_SDA 3 4 TYPEC_USBC_SDA
S
[10,31] CCG4_APU_USBC_SDA
D
L2N7002DW1T1G
A A
Security Classification
2014/05/19
Compal Secret Data
2015/12/31 Title
Compal Electronics, Inc.
TYPEC REDRIVER
5 4 3 2 1
5 4 3 2 1
+3VS
+3VS_SSD
Main Func = SSD 1
JP10
1
PJP@
2
2
10U_0805_25V6K~D
1U_0402_6.3V6K~D
0.1U_0402_25V6K~D
1000P_0402_50V7K~D
22U_0603_6.3V6M
22U_0603_6.3V6M
47U_0805_6.3V6M
47U_0805_6.3V6M
JUMP_43X79
1 1 1 1 1 1 1 1
CS70
CS71
CS72
CS73
@ @ @ @
CS31
CS32
CS29
CS33
2 2 2 2 2 2 2 2
D D
NGFF Key M
+3VS_SSD
JSSD1
1 2
3 GND1 3.3VAUX1 4
5 GND2 3.3VAUX2 6
[6] PCIE_ARX_DTX_N3 PETn3 N/C1
7 8
[6] PCIE_ARX_DTX_P3 PETp3 N/C2
9 10 RS62 1 2 0_0402_5%
PCIE_ATX_C_DRX_N3 GND3 DAS/DSS# SSD_DAS# [9,27,29]
CS51 1 2 0.22U_0402_16V7K 11 12
[6] PCIE_ATX_DRX_N3 PCIE_ATX_C_DRX_P3 PERn3 3.3VAUX3
CS50 1 2 0.22U_0402_16V7K 13 14 @
[6] PCIE_ATX_DRX_P3 PERp3 3.3VAUX4
15 16
17 GND4 3.3VAUX5 18
[6] PCIE_ARX_DTX_N2 PETn2 3.3VAUX6
19 20
21 22
CS48 1 2 0.22U_0402_16V7K PCIE_ATX_C_DRX_N2 23 GND5 N/C4 24
[6] PCIE_ATX_DRX_N2 PCIE_ATX_C_DRX_P2 PERn2 N/C5
CS49 1 2 0.22U_0402_16V7K 25 26
[6] PCIE_ATX_DRX_P2 PERp2 N/C6
27 28
29 GND6 N/C7 30
[6] PCIE_ARX_DTX_N1 PETn1 N/C8
31 32
33 34
[6] PCIE_ATX_DRX_N1 PCIE_ATX_C_DRX_P1 PERn1 N/C11
CS47 1 2 0.22U_0402_16V7K 37 38
[6] PCIE_ATX_DRX_P1 PERp1 DEVSLP SSD_DEVSLP [9]
39 40
41 GND8 N/C12 42
[6] PCIE_ARX_DTX_N0 PETn0/SATA-B+ N/C13
43 44
[6] PCIE_ARX_DTX_P0 PETp0/SATA-B- N/C14
45 46
[6] PCIE_ATX_DRX_N0 PCIE_ATX_C_DRX_P0 PERn0/SATA-A- N/C16 APU_PCIE_RST#_SSD
CS44 1 2 0.22U_0402_16V7K 49 50
[6] PCIE_ATX_DRX_P0 PERp0/SATA-A+ PERST#
51 52
CLK_PCIE_N3 GND10 CLKREQ# CLKREQ_PCIE#3 [10]
53 54
[10] CLK_PCIE_N3 CLK_PCIE_P3 REFCLKN PEWake# APU_PCIE_WAKE# [9,19,27]
55 56
[10] CLK_PCIE_P3 REFCLKP N/C17
C 57 58 C
GND11 N/C18
Key M
67 68
69 N/C19 SUSCLK(32kHz)(O)(0/3.3V) 70 confirm key part del sus_clk @1/25
71 PEDET(OC-PCIe/GND-SATA) 3.3VAUX7 72
73 GND13 3.3VAUX8 74
75 GND15 3.3VAUX9
GND17
77 76
PTH2 PTH1
LCN_DAN05-67306-0103
+3VALW
B B
5
GPIO89 2
P
[9] GPIO89 B APU_PCIE_RST#_SSD

4
APU_PCIE_RST# 1 Y
[9,19,20,38] APU_PCIE_RST# A
G
UC21
3
@ MC74VHC1G08DFT2G SC70 5P
RS63 1 2 0_0402_5%
A A

2014/05/19 2015/12/31 Title
SSD
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3(X02)
5 4 3 2 1
5 4 3 2 1
Main Func = USB HUB

+3V_HUB
1
R63
+3VS +3V_HUB 10K_0402_5%
R56
2
2 1
HUB_BUSJ
0_0603_5%
D +3V_HUB +3V_HUB D
2
+3VALW
@ R801 @ R64
1
2 1 100K_0402_5%
0_0603_5% 1 R58
+3V_HUB 10K_0402_5%
1
C60
10U_0603_10V6M
2
2 HUB_OVCJ
+3V_HUB 1
R59 1 2 100K_0402_5% HUB_XRSTJ
C61
HUB_VBUSM 0.01U_0402_16V7K
R61 1 2 100K_0402_5% 2
U58
20 10 USB20_CR_N1
VDD5 DM1 11 USB20_CR_P1 USB20_CR_N1 [25]
21 DP1 USB20_CR_P1 [25]
USB HUB Source VDD33F USB20_TOUCH_N2
RC103 0_0402_5% 8
USB20_1_N1 2 1 USB20_1_N1_R 15 DM2 9 USB20_TOUCH_P2 USB20_TOUCH_N2 [16]
[10] USB20_1_N1 USB20_1_P1 USB20_1_P1_R DMU DP2 USB20_TOUCH_P2 [16]
2 1 16
[10] USB20_1_P1 DPU USB20_FP_N3
RC102 6
0_0402_5% 25 DM3 7 USB20_FP_P3
26 PWRJ DP3
HUB_XOUT OVCJ 4 USB20_MINI1_N4
DM4 5 USB20_MINI1_P4 USB20_MINI1_N4 [20]
HUB_XRSTJ DP4 USB20_MINI1_P4 [20]
1
17
HUB_VBUSM 18 XRSTJ 27 +3V_HUB
RC104
@ HUB_BUSJ 19 VBUSM TESTJ 23
1M_0402_5% BUSJ LED1
22 24
Y1 DRV LED2
2
4 3 HUB_XIN 12
1 2 HUB_XIN 3 NC1 13
HUB_XOUT 2 XIN NC2 28
12MHZ_12PF_5YEA12000122IFA2Q3 XOUT NC3
1 1 1 14
VSS REXT
1
@ C65 @ C66 FE1.1S-BSOP28BLTR SSOP 28P HUB CTRL

C 12P_0402_50V8J~N 12P_0402_50V8J~N C
2 2 2.7K_0402_1%
SA00006XI20 change to SA00006XI30 @0220 R65
2
Finger Printer +3VS +5VS
www.laptoprepairsecrets.com 0_0603_5%
1
1
R701
@ 0_0603_5%
R700
2
CU37 0.1U_0402_16V7K 2 JFP1
2 1 +FP_VCC 8
7 8 10
USB20_FP_N3 6 7 G2 9
USB20_FP_N3 USB20_FP_P3 5 6 G1
4 5
USB20_FP_P3 3 4
2 3
[27] FPR_SCAN# 1 2
1
SP01001AE00 ACES_51522-00801-001
CONN@
3
change pin define @3/20

EU4012
TVNST52302AB0_SOT523-3
ESD@
B B
1

2
3
2
ESD@
AZC199-02SPR7G_SOT23-3
DU2
1
1
CONN@
JFP
8
7 G2
+FP_VCC 6 G1
5 6
USB20_FP_N3 4 5
USB20_FP_P3 3 4 change pin define @3/20
2 3
1 2
1
ACES_51522-00601-001
A A

Title
USB HUB
Size Document Number Re v
Custom 0.3(X02)
5 4 3 2 1
5 4 3 2 1
CRT
JCRT
1
APU_DP2_P0_C 2 1
APU_DP2_N0_C 3 2
4 3
D APU_DP2_P1_C 4 D
5
APU_DP2_N1_C 6 5
7 6
APU_DP2_AUXP_C 8 7
APU_DP2_AUXN_C 9 8
10 9
11 10
[9,13,14,22] APU_SDATA0 12 11
[9,13,14,22] APU_SCLK0 13 12
[8] APU_DP2_HPD 14 13
+3VS 14
15
16 15
+5VS 16
17
APU_DP2_HPD 18 GND17
GND18
ACES_51625-01601-001
1
CRT@
RP5
100K_0402_5%
2
2 0.1U_0402_10V7K APU_DP2_P0_C
C300 1 CRT@
[10] APU_DP2_P0 2 0.1U_0402_10V7K APU_DP2_N0_C
C301 1 CRT@
[10] APU_DP2_N0
2 0.1U_0402_10V7K APU_DP2_P1_C
C302 1 CRT@
[10] APU_DP2_P1 2 0.1U_0402_10V7K APU_DP2_N1_C
C303 1 CRT@
[10] APU_DP2_N1
2 0.1U_0402_10V7K APU_DP2_AUXP_C
C304 1 CRT@
C
[8] APU_DP2_AUXP 2 0.1U_0402_10V7K APU_DP2_AUXN_C
C305 1 CRT@ C
[8] APU_DP2_AUXN
B B
A A

Issued Date Deciphered Date 2017/01/07 Title
Reserve
Date: Sheet 36 of 61
5 4 3 2 1
5 4 3 2 1
Boot Enter S3 S3 Resume Shut Down

HW_ACAV_IN
EC Pin 110 Intput
EC_ON
EC Pin 112 Output
6.645ms
+5VALW
6.769ms
AC Plug +3VALW
D D
7.541ms
POK
EC Pin 34 Input
0.9_1.8VALW_PWREN
EC Pin 127 Output 71.34ms
+1.8V_ALW 72.20ms
72.20ms
0.9VALW
72.20ms
0.9VALW_POK
EC Pin 114 Intput ON/OFF

42.71ms rising time:37.46ns
EC Pin 100 Output EC_RSMRST#
16.16ms
RTC_CLK
95.60ms
EC Pin 122 Output PBTN_OUT#

Need to update
PM_SLP_S5#
EC Pin 123 Intput 138.9ms
EC Pin 6 Intput PM_SLP_S3# 139ms
EC Pin 95 Output SYSON 197.2ms

C C
640 us
2.364ms
+1.2V_DDR
-39.89ms
EC Pin 116 Output SUSP# 20 ms
EC Pin 99 Output 0.9VS_PWR_EN#

1 ms 893.8us 491.7us 769.7us
+5VS
768 us 1.375ms 376.2us 1.615ms
+3VS
220.5 μ s
287.4us 112us 264.6us
+1.8VS
700 μ s 398.9us 449.5us 249.9us

+0.9VS
4.5 us 569.2μ s 463.3us
3.96μ s
0.6VS
121.0 ms 39.65ms 39.92ms

EC Pin 121 Output VR_ON
118.6ms
6.21 ms 120 ms 6.216ms 79.4ms

+APU_VDDCORE
6.205 ms 207.8us 6.211ms
+APU_VDDSOC 290.5us
B 6.34 ms B
256.1us 6.302ms 400ns
EC Pin 74 Intput VGATE
AR15 138 ms rising time:31.49ns
39.48ms
139.3ms 39.48ms
(APU Intput) EC Pin 32 Output APU_FCH_POK
14.2ms 122ms 14.8ms 114.5ms
(APU Output) APU_PWRGD AW2
14.8 ms 123.1ms 15.8ms 119.2ms
388ms 65.2ms
(APU Output) EC Pin 13 Intput PLT_RST#
15.79 ms 119.7ms 15.79ms 119ms
67.2ms
BD5 386ms
(APU Output) APU_PCIE_RST#
21.51 ms 116.5ms 120.3ms
69.4ms 21.5ms
APU_RST#
AW4 380.4ms
(APU Output)
(APU Output) PXS_RST# 1.24s
868.5 ms 153.1 ms 555.7 ms 155.2 ms

PXS_PWREN
(APU Output)
2.237ms 12.89 ms 12.28 ms
2.245 ms
+3VGS
190.3us 16.41 ms 176 us 15.90 ms

+1.8VGS
A <20ms A
6.177ms
6.013ms 6.010 ms 5.144 ms
+VGA_CORE
7.395ms 43.76ms
6.619ms 43.47ms
+1.35V_MEM_GFX

Title
S5_MUX_CTRL
Re v
5 4 3 2 1
1 2 3 4 5
PEG_ATX_GRX_P[0..3]
[6] PEG_ATX_GRX_P[0..3]
PEG_ATX_GRX_N[0..3] No Use GPU Display Port outpud
[6] PEG_ATX_GRX_N[0..3]
PEG_ARX_GTX_P[0..3]
@
[6] PEG_ARX_GTX_P[0..3]
UV1F
PEG_ARX_GTX_N[0..3] +VGA_CORE
[6] PEG_ARX_GTX_N[0..3]
@ AB11
UV1A VARY_BL AB12
place near UC1 12/08 DIGON
A A
AL15
TXCAP_DPA3P AK14
PEG_ATX_GRX_P0 PEG_ATX_C_GRX_P0 PEG_ARX_C_GTX_P0 PEG_ARX_GTX_P0 TXCAM_DPA3N
DIS@ 1 2CV312 0.22U_0402_16V7K AF30 AH30 DIS@ 1 2CV1 0.22U_0402_16V7K
PEG_ATX_GRX_N0 DIS@ 1 2CV306 0.22U_0402_16V7K PEG_ATX_C_GRX_N0 AE31 PCIE_RX0P PCIE_TX0P AG31 PEG_ARX_C_GTX_N0 DIS@ 1 2CV2 0.22U_0402_16V7K PEG_ARX_GTX_N0 AH16
PCIE_RX0N PCIE_TX0N TX0P_DPA2P AJ15
TX0M_DPA2N
PEG_ATX_GRX_P1 DIS@ 1 2CV308 0.22U_0402_16V7K PEG_ATX_C_GRX_P1 AE29 AG29 PEG_ARX_C_GTX_P1 DIS@ 1 2CV3 0.22U_0402_16V7K PEG_ARX_GTX_P1 AL17
PEG_ATX_GRX_N1 DIS@ 1 2CV305 0.22U_0402_16V7K PEG_ATX_C_GRX_N1 AD28 PCIE_RX1P PCIE_TX1P AF28 PEG_ARX_C_GTX_N1 DIS@ 1 2CV4 0.22U_0402_16V7K PEG_ARX_GTX_N1 TX1P_DPA1P AK16
PCIE_RX1N PCIE_TX1N TX1M_DPA1N
AH18
PEG_ATX_GRX_P2 DIS@ 1 2CV307 0.22U_0402_16V7K PEG_ATX_C_GRX_P2 AD30 AF27 PEG_ARX_C_GTX_P2 DIS@ 1 2CV5 0.22U_0402_16V7K PEG_ARX_GTX_P2 TX2P_DPA0P AJ17
PEG_ATX_GRX_N2 DIS@ 1 2CV309 0.22U_0402_16V7K PEG_ATX_C_GRX_N2 AC31 PCIE_RX2P PCIE_TX2P AF26 PEG_ARX_C_GTX_N2 DIS@ 1 2CV6 0.22U_0402_16V7K PEG_ARX_GTX_N2 TX2M_DPA0N
PCIE_RX2N PCIE_TX2N AL19
NC_TXOUT_L3P AK18
PEG_ATX_GRX_P3 PEG_ATX_C_GRX_P3 PEG_ARX_C_GTX_P3 PEG_ARX_GTX_P3 NC_TXOUT_L3N
DIS@ 1 2CV313 0.22U_0402_16V7K AC29 AD27 DIS@ 1 2CV7 0.22U_0402_16V7K
PEG_ATX_GRX_N3 DIS@ 1 2CV304 0.22U_0402_16V7K PEG_ATX_C_GRX_N3 AB28 PCIE_RX3P PCIE_TX3P AD26 PEG_ARX_C_GTX_N3 DIS@ 1 2CV8 0.22U_0402_16V7K PEG_ARX_GTX_N3
PCIE_RX3N PCIE_TX3N TMD P
AB30 AC25 AH20

AA31 PCIE_RX4P PCIE_TX4P AB25 TXCBP_DPB3P AJ19
PCIE_RX4N PCIE_TX4N TXCBM_DPB3N
AL21
AA29 Y23 TX3P_DPB2P AK20
Y28 PCIE_RX5P PCIE_TX5P Y24 TX3M_DPB2N
PCIE_RX5N PCIE_TX5N AH22
TX4P_DPB1P AJ21
Y30 AB27 TX4M_DPB1N
W31 PCIE_RX6P PCIE_TX6P AB26 AL23
GPU R3 PCIE_RX6N PCIE_TX6N TX5P_DPB0P
TX5M_DPB0N
AK22
W29 Y27 AK24

V28 PCIE_RX7P PCIE_TX7P Y26 NC_TXOUT_U3P AJ23
B R17M-M2-50 V30
PCIE_RX7N PCIE_TX7N
W24
NC_TXOUT_U3N
B
U31 NC#V30 NC#W24 W23

NC#U31 NC#W23
2160856030-A0_FCBGA631
UV1 ?
U29 V27
T28 NC#U29 NC#V27 U26
SA0000B1W1L NC#T28 NC#U26
PCI EXPRESS INTERFACE
M2_50_R3@
T30 U24
R31 NC#T30 NC#U24 U23
S IC 216-0889004 A0 R17M-M2-50 WESTON XT BGA 631P GPU A31 ! NC#R31 NC#U23
R29 T26
NC#R29 NC#T26
P28 T27
NC#P28 NC#T27
P30 T24
N31 NC#P30 NC#T24 T23
NC#N31 NC#T23
UV1
N29 P27
M28 NC#N29 NC#P27 P26
SA0000B1W0L NC#M28 NC#P26
M2_50@
M30 P24
L31 NC#M30 NC#P24 P23
S IC 216-0889004 A0 R17M-M2-50 WESTON XT BGA 631P GPU 0FD NC#L31 NC#P23
L29 M27
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
C CLOCK C
CLK_PEG_P0 AK30
[10] CLK_PEG_P0 CLK_PEG_N0 PCIE_REFCLKP
AK32
[10] CLK_PEG_N0 PCIE_REFCLKN +0.95VSDGPU
CALIBRATI ON
Y22 RV1 1 DIS@ 2 1.69K_0402_1%
PCIE_CALR_TX
RV2 1 DIS@ 2 1K_0402_1% N10 AA22 RV3 1 DIS@ 2 1K_0402_1%
TEST_PG PCIE_CALR_RX
PLT_RST_VGA# AL27
PERSTB
2160856030-A0_FCBGA631
+3VGS
UV2
DIS@
5
PXS_RST# 1
P
[10] PXS_RST# IN1 PLT_RST_VGA#

4
APU_PCIE_RST# 2 O
[9,19,20,34] APU_PCIE_RST# IN2
G
1
3
RV4
MC74VHC1G08DFT2G_SC70-5 100K_0402_5%
D D
DIS@
2

Title
Size
M30/M70_PCIE/DP
Document Number Re v
Date:
LA-F121P
Thursday, November 09, 2017 Sheet 38 of 61
1 2 3 4 5
1 2 3 4 5
+3VGS
@
Resistor Divider Lookup Lable
UV1B +1.8VGS
U? 0402 1% resistors are equired PS_0[3:1]=001 Strap Name :
R_pu (ohm) R_pd (ohm) Bitd [3:1] PS_0[5:4]=11
1
1
RV5 RV6 AF2
PS_0[1] ROM_CONFIG[0]
NC#AF2
5
45.3K_0402_1% AF4 RV8

45.3K_0402_1% NC 4.75k 000 PS_0[2] ROM_CONFIG[1]
G
QV1B DIS@ DIS@ NC#AF4 8.45K_0402_1%

DIS@ @ 1 N9 AG3 DIS@
T50 8.45k 2k 001 PS_0 PS_0[3] ROM_CONFIG[2]
2
2
@ 1 L9 DBG_DATA16 NC#AG3 AG5
3 4 VGA_SMB_DA3 T51 1 AE9 DBG_DATA15 NC#AG5
@ DPA 4.53k 2k 010 PS_0[4] N/A
S
[8,27,28] EC_SMB_DA2 T52 DBG_DATA14
1
@ 1 Y11 AH3
D
0.68U_0402_10V
T53 DBG_DATA13 NC#AH3 1
@ 1 AE8 AH1 6.98k 4.99k 011 PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
T54 DBG_DATA12 NC#AH1
2
L2N7002DW1T1G @ 1 AD9 CV29 RV9

G
T55 1 AC10 DBG_DATA11 AK3

QV1A @ 4.53k 4.99k 100 @ 2K_0402_1%
T47 DBG_DATA10 NC#AK3 2
DIS@ @ 1 AD7 AK1 DIS@
2
T56 1 AC8 DBG_DATA9 NC#AK1
A @ DVO 3.24k 5.62k 101 A
VGA_SMB_CK3 T48 DBG_DATA8
6 1 @ 1 AC7 AK5
S
[8,27,28] EC_SMB_CK2 T57 1 AB9 DBG_DATA7 NC#AK5 AM3

@
D
T58
@ 1 AB8 DBG_DATA6 NC#AM3 3.4k 10k 110
T49 1 AB7 DBG_DATA5 AK6
L2N7002DW1T1G @ 4.75k NC 111
T59 1 AB4 DBG_DATA4 NC#AK6 AM5
@ change to support gen3 11/24
T60 1 AB2 DBG_DATA3 NC#AM5
@ DP B
T61 1 Y8 DBG_DATA2 AJ7
@ Strap Name :
T62 1 Y7 DBG_DATA1 NC#AJ7 AH6 +1.8VGS
@ PS_1[3:1]=001
T63 DBG_DATA0 NC#AH6
AK8
Capacitor Divider Lookup Lable
NC#AK8 PS_1[5:4]=11 PS_1[1] STRAP_BIF_GEN3_EN_A
1
AL7
NC#AL7 DIS@
Cap (nF) Bitd [5:4] RV11
PS_1[2] TRAP_BIF_CLK_PM_EN
W6 8.45K_0402_1% PS_1[3] N/A
V6 NC#W6
680nF 00 PS_1
2
NC#V6 V4
AC6 NC#V4 U5
PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING
NC#AC5 NC#U5 82nF 01
1
AC5
0.68U_0402_10V
NC#AC6 W3
1
DIS@
PS_1[5] STRAP_TX_DEEMPH_EN
AA5 NC#W3 V2
10nF 10
CV28 RV12
+1.8VGS AA6 NC#AA5 NC#V2 @ 2K_0402_1%
NC#AA6 DP C
Y4
NC 11 2
2
+1.8VGS NC#Y4 W5
RV152 @ NC#W5
GPIO19_CTF BP_0 PLL_Analog_out
2 1 RV82 2 DIS@ 1 4.7K_0402_5% U1 AA3
+3VGS FB_VDDCI NC#U1 NC#AA3
@ 1 W1 Y2
T64 BP_1 NC#W1 NC#Y2
1
10K_0402_5% RV81 2 DIS@ 1 4.7K_0402_5% U3
NC#U3
2
Y6 J8 RV83
PLL_Analog_in NC#Y6 NC#J8 +1.8VGS
RV154 1 @ 2 5.1K_0402_1% RV151 @ 1 AA1 16.2K_0402_1% PS_2[3:1]=000 Strap Name :
T65 NC#AA1
10K_0402_5% DIS@
DIS@ PS_2[5:4]=11
1
RV17 1 DIS@ 2 1K_0402_1% TESTEN
PS_2[1] N/A
1
@
I2C RV28 PS_2[2] N/A
+3VGS 8.45K_0402_1%
@ 1 R1
T66 PS_2 PS_2[3] STRAP_BIOS_ROM_EN
2
@ 1 R3 SCL
1 8 JTAG_TDO_GPU T67 SDA
JTAG_TDI_GPU PS_2[4] STRAP_BIF_VGA_DIS
1
2 7 AM26
0.082U_0402_16V
JTAG_TMS_GPU R 1
3 6 +VGA_CORE AK26
4 5 JTAG_TRSTB U6
GENERAL PURPOSE I/O AVSSN#AK26 +3VGS CV11 RV13
PS_2[5] N/A
U10 GPIO_0 AL25 @ 4.75K_0402_1%
RV260 T10 GPIO_1 G AJ25 2
RPV34 10K_8P4R_5% DIS@ 4.7K_0402_5% DIS@
VGA_SMB_DA3
2
GPIO_2 AVSSN#AJ25
1
1 2 U8
B @ JTAG_TCK +3VGS VGA_SMB_CK3 SMBDATA B
2 1 U7 AH24 RV162
VGA_AC__BATT T9 SMBCLK B AG25 4.7K_0402_5%
RV24 DIS@ RV369 @ 10K_0402_5% T8 GPIO_5_AC_BATT AVSSN#AG25 @
1M_0402_5% T7 GPIO_6 DAC1 AH26
2
XTALOUT XTALIN P10 GPIO_7_BLON HSYNC AJ27 WAKEB

P4 GPIO_8_ROMSO VSYNC
GPIO_9_ROMSI
1
YV1 DIS@ P2 +1.8VGS

N6 GPIO_10_ROMSCK AD22
PS_3[3:1]=000 Strap Name :
27MHZ_10PF_7V27000050 RV163
+VGA_CORE N5 GPIO_11 RSET 4.7K_0402_5%
GPIO_12 PS_3[5:4]=11
1
3 1 N3 AG24 DIS@
3 1 Y9 GPIO_13 AVDD AE22 @
PS_3[1] BOARD_CONFIG[0] (Memory ID)
1 1 VRAM Type
2
CV18 GND GND CV17 N1 GPIO_14_HPD2 AVSSQ RV15

GPIO_15_PWRCNTL_0 PS_3[2] BOARD_CONFIG[1] (Memory ID)
8.2P_0402_50V8D
DIS@ 4 2
8.2P_0402_50V8D
DIS@
M4
R6 GPIO_16 VDD1DI
AE23
AD23
8.45K_0402_1% Need reference
PS_3 PS_3[3] BOARD_CONFIG[2] (Memory ID) X76 Schemat i c
2
2 2 W10 GPIO_17_THERMAL_INT VSS1DI
GPIO19_CTF M2 GPIO_18
GPIO_19_CTF FutureASIC/SEYMOUR/PARK PS_3[4] AUD_PORT_CONN_PINSTRAP[1]
1
P8 AM12
0.68U_0402_10V
GPIO_20_PWRCNTL_1 CEC_1 1
P7 @
N8 GPIO_21 CV15 RV16
PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
SVI2_SVD
AK10 GPIO_22_ROMCSB AK12 DIS@ 1 RV155 2 0_0402_5% @ 4.75K_0402_1%
GPIO_29 RSVD#AK12 SVI2_SVT SVI2_SVD [55] 2
AM10 AL11 DIS@ 1 RV156 2 0_0402_5% SD034475180
CLKREQ_PEG#0_R SVI2_SVC
2
1 @ 2 N7 GPIO_30 RSVD#AL11 AJ11 DIS@ 1 RV157 2 0_0402_5% SVI2_SVT [55]
[10] CLKREQ_PEG#0 CLKREQB RSVD#AJ11 SVI2_SVC [55]
RV153 0_0402_5% JTAG_TRSTB
L6
JTAG_TDI_GPU JTAG_TRSTB
L5
JTAG_TCK JTAG_TDI
L3
JTAG_TMS_GPU L1 JTAG_TCK AL13
JTAG_TDO_GPU JTAG_TMS GENLK_CLK
K4 AJ13
TESTEN K7 JTAG_TDO GENLK_VSYNC
AF24 TESTEN
+VGA_CORE NC#AF24 AG13
SWAPLOCKA AH12
AB13 SWAPLOCKB
W8 GENERICA
W9 GENERICB
W7 GENERICC AC19 PS_0
AD10 GENERICD PS_0
GENERICE PS_1
AJ9 AD19
@ 1 AL9 NC#AJ9 PS_1
NC#AL9 AE17 PS_2
T68
AC14 PS_2
1 PX_EN AB16 HPD1 AE20 PS_3
@
T69 PX_EN PS_3
C AE19 C
AC16 TS_A
DBG_VREFG
CLKREQ_PEG#0_R
DDC/ A UX
AE6
PLL/CLOCK DDC1CLK AE5
DDC1DATA
2
AD2
AUX1P AD4 +VGA_CORE
RV368 AUX1N
10K_0402_5% AC11
1
DIS@ DDC2CLK AC13

DDC2DATA
XTALIN AM28 AD13
XTALOUT AK28 XTALIN AUX2P AD11 change to 0 ohm 11/23
XTALOUT AUX2N
FB_GND VSSSENSE_VGA VSSSENSE_VGA [55]
RV29 1 DIS@ 2 10K_0402_5% AC22 AD20 RV158 2 DIS@ 1 0_0402_5%
XO_IN NC#AD20 FB_VDDC VCCSENSE_VGA VCCSENSE_VGA [55]
RV59 1 DIS@ 2 10K_0402_5% AB22 AC20 RV159 2 DIS@ 1 0_0402_5%
XO_IN2 NC#AC20
AE16
NC#AE16 AD16
NC#AD16
REMOVE THERMAL SENSOR SIGNAL 11/24
SEYMOUR/FutureASIC AC1
+1.8VGS T4 DDCVGACLK AC3
2 @ 1 0_0402_5% LV2 DIS@ T2 DPLUS THERMA L DDCVGADATA +1.8VGS
+3VALW
RV165 1 2 13mA DMINUS
BLM15BD121SN1D_0402
1 2 DIS@ GPIO28 R5 1 DIS@ 2
+3VGS GPIO28_FDO
RV164 0_0402_5% CV19 2 1 10U_0603_6.3V6M +TSVDD AD17 RV71 0_0402_5%
DIS@ AC17 TSVDD
@ TSVSS
2
1 CV20 2 1 1U_0402_6.3V4Z
DIS@ @
CV25 CV21 2 1 0.1U_0402_10V6K RV84 RV87
0.1U_0402_10V7K 2160856030-A0_FCBGA631 10K_0402_5% 10K_0402_5% Boot-VID Code
2 RV21 1 @ 2 10K_0402_5% ? DIS@
@ Voltage
1
TOPAZ Thermal Address-->0x82 SVC SVD

SVI2_SVD Selected (V)
Enable MLPS SVI2_SVC
UV8 Enable --> Low
@ 0 0 1.1
Disable --> High
5
0 1 1.0
2
1
P
D [27,46,47,48] HW_ACAV_IN IN1 VGA_AC__BATT D

4
[27] ACIN_65W
2 O @ RV88 1 0 0.9
IN2
G
RV89 10K_0402_5%
MC74VHC1G08DFT2G_SC70-5 10K_0402_5% DIS@ 1 1 0.8
3
2 DIS@ 1 0_0402_5%
RV150

Title
Issued Date 2016/01/07 Deciphered Date 2017/01/07 M30/M70_MSIC
Custom 0.3(X02)
Date:
LA-F121P
1 2 3 4 5
1 2 3 4 5
A A
@
UV1E U?
370mA (HDMI) AA27 A3

188mA (Display Port) No Use GPU Display Port outpud AB24 GND GND A30
+1.8VGS AB32 GND GND AA13
RV27 0_0603_5% @ AC24 GND GND AA16
1 @ 2 +DP_VDDR UV1G AC26 GND GND AB10
U?
AC27 GND GND AB15
B
AD25 GND GND AB6
B
CV26
CV27
CV35
DP POWER NC/DP POWER

AD32 GND GND AC9
1 1 1 GND GND
AG15 AE11 AE27 AD6
@ @ @ AG16 DP_VDDR#AG15 NC#AE11 AF11 AF32 GND GND AD8
AF16 DP_VDDR#AG16 NC#AF11 AE13 AG27 GND GND AE7
DP_VDDR#AF16 NC#AE13 GND GND
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 AG17 AF13 AH32 AG12

AG18 DP_VDDR#AG17 NC#AF13 AG8 K28 GND GND AH10
AG19 DP_VDDR#AG18 NC#AG8 AG10 K32 GND GND AH28
AF14 DP_VDDR#AG19 NC#AG10 L27 GND GND B10
DP_VDDR#AF14 M32 GND GND B12
N25 GND GND B14
N27 GND GND B16
P25 GND GND B18
AG20 AF6 P32 GND GND B20
AG21 DP_VDDC#AG20 NC#AF6 AF7 R27 GND GND B22
+0.95VSDGPU AF22 DP_VDDC#AG21 NC#AF7 AF8 T25 GND GND B24
RV30 0_0603_5% 280mA AG22 DP_VDDC#AF22 NC#AF8 AF9 T32 GND GND B26
1 @ 2 +DP_VDDC AD14 DP_VDDC#AG22 NC#AF9 U25 GND GND B6
DP_VDDC#AD14 U27 GND GND B8
V32 GND GND C1
CV30
CV33
CV34
W25 GND GND C32

1 1 1 GND GND
AG14 AE1 W26 E28
@ @ @ AH14 DP_VSSR NC#AE1 AE3 W27 GND GND F10
AM14 DP_VSSR NC#AE3 AG1 Y25 GND GND F12
DP_VSSR NC#AG1 GND GND
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 AM16 AG6 Y32 F14

AM18 DP_VSSR NC#AG6 AH5 GND GND F16
AF23 DP_VSSR NC#AH5 AF10 GND F18
AG23 DP_VSSR NC#AF10 AG9 GND F2
AM20 DP_VSSR NC#AG9 AH8 GND F20
AM22 DP_VSSR NC#AH8 AM6 M6 GND F22
AM24 DP_VSSR NC#AM6 AM8 N13 GND GND F24
AF19 DP_VSSR NC#AM8 AG7 N16 GND GND F26
AF20 DP_VSSR NC#AG7 AG11 N18 GND GND F6
AE14 DP_VSSR NC#AG11 N21 GND GND
GND F8
C
DP_VSSR P6 GND GND G10 C
P9 GND GND G27
R12 GND GND G31
AF17 AE10 R15 GND GND G8
DPAB_CALR NC#AE10 R17 GND GND H14
R20 GND GND H17
T13 GND GND H2
T16 GND GND H20
2160856030-A0_FCBGA631 GND GND
? T18 H6
T21 GND GND J27
T6 GND GND J31
U15 GND GND K11
U17 GND GND K2
U20 GND GND K22
U9 GND GND K6
V13 GND GND
V16 GND
V18 GND
Y10 GND
Y15 GND
Y17 GND
Y20 GND
R11 GND A32
T11 GND VSS_MECH AM1
AA11 GND VSS_MECH AM32
M12 GND VSS_MECH
N11 GND
V11 GND
GND
2160856030-A0_FCBGA631
?
D D

Title
Size
M30/M70_Power/GND
Date:
LA-F121P
1 2 3 4 5
1 2 3 4 5
A A
+VGA_CORE 10uF 1uF 0.1uF
VDDC 4 30 0 @
VDDC and VDDCI TDC 28A UV1D +1.8VGS
+1.35V_MEM_GFX
U?
100mA
AM30 +PCIE_PVDD
VDDCI 1 3 3 2A MEM I/O PCIE_PVDD
PCIE
CV38
CV46
CV39
H13 AB23
CV179
VDDR1 NC#AB23 1 1 1 1
H16 AC23
H19 VDDR1 NC#AC23 AD24 DIS@ DIS@ DIS@ DIS@
CV43
CV44
CV45
CV40
CV47
CV48
CV41
CV42
CV49
CV50
CV51
CV52
CV53
CV174
CV175
CV176
CV177
CV178
J10 VDDR1 NC#AD24 AE24
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VDDR1 NC#AE24
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 2
0.01U_0402_16V7K
J23 AE25
+0.95VSDGPU 10uF 1uF 0.1uF DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
DIS@ DIS@ DIS@ DIS@ DIS@
J24 VDDR1 NC#AE25 AE26
J9 VDDR1 NC#AE26 AF25
VDDR1 NC#AF25
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
K10 AG26
K23 VDDR1 NC#AG26
PCIE_VDDC 2A 2 7 0 K24 VDDR1
K9 VDDR1 L23
L11 VDDR1 PCIE_VDDC L24
L12 VDDR1 PCIE_VDDC L25
BIF_VDDC 0.8A 1 2 0 L13 VDDR1 PCIE_VDDC L26
L20 VDDR1 PCIE_VDDC M22 +0.95VSDGPU
L21 VDDR1 PCIE_VDDC N22 2A
L22 VDDR1 PCIE_VDDC N23 +PCIE_VDDC RV364 1 @ 2 0_0603_5%
SPLL_VDDC 100mA 1 1 1 VDDR1 PCIE_VDDC N24
CV54
CV55
CV56
CV57
CV58
CV59
CV60
CV120
CV121
PCIE_VDDC R22
PCIE_VDDC 1 1 1 1 1 1 1 1 1
T22
+1.8VGS 13mA LEVEL PCIE_VDDC U22 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
LV3 DIS@ TRANSLATI ON PCIE_VDDC V22
+VDD_CT PCIE_VDDC
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 2 AA20 2 2 2 2 2 2 2 2 2
+1.35V_MEM_GFX 10uF 2.2uF 0.1uF 0.01uF BLM15BD121SN1D_0402 AA21 VDD_CT
AB20 VDD_CT AA15
CV61
CV62
CV63
B
AB21 VDD_CT CORE VDDC N15
B
1 1 1 VDD_CT VDDC N17
VDDR1 2A 3 5 5 5 DIS@ DIS@ DIS@ +3VGS VDDC R13
LV4 DIS@ 25mA I/O VDDC R16
VDDC
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 1 2 +VDDR3 AA17 R18

BLM15BD121SN1D_0402 AA18 VDDR3 VDDC Y21
AB17 VDDR3 VDDC T12
CV64
CV65
CV66
CV123
AB18 VDDR3 VDDC T15 +VGA_CORE

+1.8VGS 10uF 1uF 0.1uF 0.01uF 1 1 1 1 VDDR3 VDDC T17
DIS@ DIS@ DIS@ DIS@ V12 VDDC T20
Y12 VDDR4 VDDC U13
CV67
CV68
CV69
CV70
CV71
CV72
CV73
CV74
CV75
CV76
CV77
CV78
CV79
CV80
VDDR4 VDDC
10U_0402_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 2 2 U12 U16
PCIE_PVDD 100mA 1 1 1 1 VDDR4 VDDC U18
1 1 1 1 1 1 1 1 1 1 1 1 1 1
VDDC V21 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
VDDC
V15
VDDC
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
V17 2 2 2 2 2 2 2 2 2 2 2 2 2 2
MPLL_PVDD 90mA 1 1 1 VDDC V20
0 VDDC
POWER
Y13
VDDC Y16
VDDC Y18
SPLL_PVDD 75mA 1 1 1 VDDC AA12
0 VDDC M11
VDDC N12
VDDC U11
VDD_CT 13mA 1 1 CIS SYMBOL VDDC
CV101
CV104
CV100
CV106
CV103
CV109
CV102
CV107
CV108
CV105
1 0 +1.8VGS
LV6 DIS@ 90mA PLL
1 1 1 1 1 1 1 1 1 1
1 2 +MPLL_PVDD DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
+DP_VDDR 40mA 1(@) 1(@) 1(@) BLM15BD221SN1D_2P
CV81
CV82
CV124
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 2 2 2 2 2 2 2 2
1 1 1
R21 0.8A
DIS@ DIS@ DIS@ BIF_VDDC U21 +BIF_VDDC
+DP_VDDC 1(@) 1(@) 1(@) 0 BIF_VDDC
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 L8
C +1.8VGS MPLL_PVDD C
LV7 DIS@ 75mA ISOLATED
1 2 +SPLL_PVDD
CORE I/O
BLM15BD121SN1D_0402 M13
CV84
CV85
CV86
H7 VDDCI M15
1 1 1 SPLL_PVDD VDDCI M16
CV111
CV114
CV110
CV117
CV113
CV118
CV112
CV116
CV119
CV115
DIS@ DIS@ DIS@ VDDCI M17
VDDCI 1 1 1 1 1 1 1 1 1 1
+0.95VSDGPU M18
100mA VDDCI
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 LV8 DIS@ M20 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
1 2 +SPLL_VDDC H8 VDDCI M21
SPLL_VDDC VDDCI
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
BLM15BD121SN1D_0402 N20 2 2 2 2 2 2 2 2 2 2
CV91
CV92
CV93
J7 VDDCI
+3VGS 10uF 1uF 0.1uF 1 1 1 SPLL_PVSS
DIS@ DIS@ DIS@
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2
VDDR3 25mA 1 3 0 2160856030-A0_FCBGA631
+0.95VSDGPU
+BIF_VDDC 2 @ 1
RV31 0_0603_5%
+VGA_CORE
CV122
CV181
CV180
1 2 2
DIS@ DIS@ DIS@
CV88
CV89
CV90
CV87
CV125
CV126
CV127
1 1 1 1
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 1 1
1 1 1
DIS@ DIS@ DIS@ DIS@
DIS@ DIS@ DIS@
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 2 2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
2 2 2
D D

Title
Size
M30/M70_Power
Date:
LA-F121P
1 2 3 4 5
1 2 3 4 5
M_DA[63..0]
[43,44] M_DA[63..0]
M0_MA[8..0]
[43] M0_MA[8..0]
A A
M1_MA[8..0]
[44] M1_MA[8..0]
@
UV1C U?
GDDR5/DDR3 GDDR5/DDR3
M_DA0 K27 K17 M0_MA0
M_DA1 J29 DQA0_0 MAA0_0/MAA_0 J20 M0_MA1
M_DA2 H30 DQA0_1 MAA0_1/MAA_1 H23 M0_MA2
M_DA3 H32 DQA0_2 MAA0_2/MAA_2 G23 M0_MA3
M_DA4 G29 DQA0_3 MAA0_3/MAA_3 G24 M0_MA4
M_DA5 F28 DQA0_4 MAA0_4/MAA_4 H24 M0_MA5
M_DA6 F32 DQA0_5 MAA0_5/MAA_5 J19 M0_MA6
+1.35V_MEM_GFX +1.35V_MEM_GFX M_DA7 F30 DQA0_6 MAA0_6/MAA_6 K19 M0_MA7
M_DA8 C30 DQA0_7 MAA0_7/MAA_7 G20 M0_MA8
M_DA9 F27 DQA0_8 MAA0_8/MAA_13 L17
M_DA10 A28 DQA0_9 MAA0_9/MAA_15
M_DA11 DQA0_10 M1_MA0
1
C28 J14
M_DA12 E27 DQA0_11 MAA1_0/MAA_8 K14 M1_MA1
RV33 RV32 M_DA13 G26 DQA0_12 MAA1_1/MAA_9 J11 M1_MA2
40.2_0402_1% 40.2_0402_1% M_DA14 D26 DQA0_13 MAA1_2/MAA_10 J13 M1_MA3
DIS@ DIS@ M_DA15 F25 DQA0_14 MAA1_3/MAA_11 H11 M1_MA4
2
M_DA16 A25 DQA0_15 MAA1_4/MAA_12 G11 M1_MA5

+MVREFDA +MVREFSA M_DA17 C25 DQA0_16 MAA1_5/MAA_BA2 J16 M1_MA6
M_DA18 E25 DQA0_17 MAA1_6/MAA_BA0 L15 M1_MA7
M_DA19 D24 DQA0_18 MAA1_7/MAA_BA1 G14 M1_MA8
M_DA20 DQA0_19 MAA1_8/MAA_14
1
E23 L16
MEMORY INTERFACE
1 1 M_DA21 DQA0_20 MAA1_9/RSVD

F23
RV34 CV94 RV35 CV95 M_DA22 D22 DQA0_21 E32 M_WCKA0_0
M_DA23 F21 DQA0_22 WCKA0_0/DQMA0_0 E30 M_WCKA0_0# M_WCKA0_0 [43]
100_0402_1% 1U_0402_6.3V4Z 100_0402_1% 1U_0402_6.3V4Z
2 DIS@ 2 M_DA24 DQA0_23 WCKA0B_0/DQMA0_1 M_WCKA0_1 M_WCKA0_0# [43]
DIS@ DIS@ DIS@ E21 A21
M_WCKA0_1 [43]
2
M_DA25 D20 DQA0_24 WCKA0_1/DQMA0_2 C21 M_WCKA0_1#

M_DA26 DQA0_25 WCKA0B_1/DQMA0_3 M_WCKA1_0 M_WCKA0_1# [43]
F19 E13
B M_DA27 DQA0_26 WCKA1_0/DQMA1_0 M_WCKA1_0# M_WCKA1_0 [44] B
A19 D12
M_DA28 D18 DQA0_27 WCKA1B_0/DQMA1_1 E3 M_WCKA1_1 M_WCKA1_0# [44]
M_DA29 F17 DQA0_28 WCKA1_1/DQMA1_2 F4 M_WCKA1_1# M_WCKA1_1 [44]
M_DA30 A17 DQA0_29 WCKA1B_1/DQMA1_3 M_WCKA1_1# [44]
M_DA31 C17 DQA0_30 H28 M_EDC_0
M_DA32 DQA0_31 EDCA0_0/QSA0_0 M_EDC_1 M_EDC_0 [43]
E17 C27
M_DA33 D16 DQA1_0 EDCA0_1/QSA0_1 A23 M_EDC_2 M_EDC_1 [43]
F15 E19
M_DA35 A15 DQA1_2 EDCA0_3/QSA0_3 E15 M_EDC_4 M_EDC_3 [43]
M_DA36 D14 DQA1_3 EDCA1_0/QSA1_0 D10 M_EDC_5 M_EDC_4 [44]
F13 D6
M_DA38 A13 DQA1_5 EDCA1_2/QSA1_2 G5 M_EDC_7 M_EDC_6 [44]
RV36 DIS@ RV37 DIS@
M_DA39 DQA1_6 EDCA1_3/QSA1_3 M_EDC_7 [44]
49.9_0402_1% 10_0402_1% C13
1 2 2 1 DRAM_RST_G M_DA40 E11 DQA1_7 H27 M_DBI0#
[43,44] DRAM_RST M_DA41 DQA1_8 DDBIA0_0/QSA0_0B M_DBI1# M_DBI0# [43]
A11 A27
M_DA42 DQA1_9 DDBIA0_1/QSA0_1B M_DBI2# M_DBI1# [43]
C11 C23
1
1 1 F11 C19
@ A9 C15
CV96 RV38 CV97 C9 E9
120P_0402_50V8J M_DA46 DQA1_13 DDBIA1_1/QSA1_1B M_DBI6# M_DBI5# [44]
5.1K_0402_1% 68P_0402_50V8J F9 C5
2 2 M_DA47 DQA1_14 DDBIA1_2/QSA1_2B M_DBI7# M_DBI6# [44]
DIS@ DIS@ D8 H4
M_DBI7# [44]
2
M_DA48 E7 DQA1_15 DDBIA1_3/QSA1_3B

M_DA49 A7 DQA1_16 L18 M_ADBI0
M_DA50 DQA1_17 ADBIA0/ODTA0 M_ADBI1 M_ADBI0 [43]
C7 K16
M_DA51 DQA1_18 ADBIA1/ODTA1 M_ADBI1 [44]
F7
M_DA52 A5 DQA1_19 H26 M_CLK0
M_DA53 E5 DQA1_20 CLKA0 H25 M_CLK#0 M_CLK0 [43]
M_DA54 C3 DQA1_21 CLKA0B M_CLK#0 [43]
M_DA55 E1 DQA1_22 G9 M_CLK1
Place close to GPU (within 25mm) M_DA56 G7 DQA1_23 CLKA1 H9 M_CLK#1 M_CLK1 [44]
and place componment within (5mm) close to each other M_DA57 G6 DQA1_24 CLKA1B M_CLK#1 [44]
M_DA58 G1 DQA1_25 G22 M_RAS#0
M_DA59 DQA1_26 RASA0B M_RAS#1 M_RAS#0 [43]
G3 G17
M_DA60 DQA1_27 RASA1B M_RAS#1 [44]
J6
M_DA61 J1 DQA1_28 G19 M_CAS#0
C C
M_DA62 J3 DQA1_29 CASA0B G16 M_CAS#1 M_CAS#0 [43]
M_DA63 J5 DQA1_30 CASA1B M_CAS#1 [44]
DQA1_31 H22 M_CS0B#0
CSA0B_0 M_CS0B#0 [43]
+MVREFDA K26 J22
+MVREFSA J26 MVREFDA CSA0B_1
MVREFSA G13 M_CS1B#0
J25 CSA1B_0 K13 M_CS1B#0 [44]
RV39 1 DIS@ 2 120_0402_1% K25 NC#J25 CSA1B_1
MEM_CALRP0 K20 M_CKE0
CKEA0 J17 M_CKE1 M_CKE0 [43]
CKEA1 M_CKE1 [44]
G25 M_WE#0
DRAM_RST_G WEA0B M_WE#1 M_WE#0 [43]
L10 H10
DRAM_RST WEA1B M_WE#1 [44]
RV40 @ 1 2 51.1_0402_1% CV98 @1 2 0.1U_0402_16V4Z K8
RV41 @ 1 2 51.1_0402_1% CV99 @1 2 L7 CLKTESTA
0.1U_0402_16V4Z CLKTESTB
2160856030-A0_FCBGA631
?
D D

Title
Size
M30/M70_MEM
Date:
LA-F121P
1 2 3 4 5
5 4 3 2 1
clamshell configuration
UV12 @ MF=0 UV13 @ MF=1
M_DA[0..31]
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
[42] M_DA[0..31]
A4 M_DA19 A4 M_DA2
M_EDC_2 DQ24 DQ0 M_DA22 M_EDC_0 DQ24 DQ0 M_DA0
C2 A2 C2 A2
[42] M_EDC_2 C13 EDC0 EDC3 DQ25 DQ1 B4 M_DA17 [42] M_EDC_0 C13 EDC0 EDC3 DQ25 DQ1 B4 M_DA3
M_EDC_1 EDC1 EDC2 DQ26 DQ2 M_DA20 M_EDC_3 EDC1 EDC2 DQ26 DQ2 M_DA1
R13 B2 R13 B2
[42] M_EDC_1 R2 EDC2 EDC1 L DQ27 DQ3 E4 M_DA18 H [42] M_EDC_3 R2 EDC2 EDC1 H DQ27 DQ3 E4 M_DA6
M_DA21 BYTE2 M_DA7 L
+1.35V_MEM_GFX +1.35V_MEM_GFX EDC3 EDC0 BYTE0 DQ28
DQ29
DQ4
DQ5
E2
M_DA16
+1.35V_MEM_GFX EDC3 EDC0 BYTE3 DQ28
DQ29
DQ4
DQ5
E2
M_DA5 BYTE0
D F4 F4 D
M_DBI2# DQ30 DQ6 M_DA23 M_DBI0# DQ30 DQ6 M_DA4
D2 F2 D2 F2
[42] M_DBI2# D13 DBI0# DBI3# DQ31 DQ7 A11 [42] M_DBI0# D13 DBI0# DBI3# DQ31 DQ7 A11
M_DBI1# P13 DBI1# DBI2# DQ16 DQ8 A13 M_DBI3# P13 DBI1# DBI2# DQ16 DQ8 A13
M_CLK0 [42] M_DBI1# DBI2# DBI1# DQ17 DQ9 [42] M_DBI3# DBI2# DBI1# DQ17 DQ9
1 DIS@ 2 P2 B11 P2 B11
RV79 120_0402_1% DBI3# DBI0# DQ18 DQ10 B13 DBI3# DBI0# DQ18 DQ10 B13
M_CLK0 DQ19 DQ11 M_CLK0 DQ19 DQ11
J12 E11 J12 E11
[42] M_CLK0 M_CLK#0 J11 CK DQ20 DQ12 E13 M_CLK#0 J11 CK DQ20 DQ12 E13
M_CLK#0 [42] M_CLK#0 M_CKE0 CK# DQ21 DQ13 M_CKE0 CK# DQ21 DQ13
1 DIS@ 2 J3 F11 J3 F11
[42] M_CKE0 CKE# DQ22 DQ14 F13 CKE# DQ22 DQ14 F13
RV80 120_0402_1%
DQ23 DQ15 U11 M_DA15 DQ23 DQ15 U11 M_DA30
M0_MA2 H11 DQ8 DQ16 U13 M_DA13 M0_MA4
H11 DQ8 DQ16 U13 M_DA28
[42] M0_MA2 M0_MA5 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 M_DA11 M0_MA3 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 M_DA31
[42] M0_MA5 M0_MA4
K11 BA1/A5 BA3/A3 H DQ10 DQ18 T13 M_DA9
L
M0_MA2 K11 BA1/A5 BA3/A3 L DQ10 DQ18 T13 M_DA29
[42] M0_MA4 M0_MA3 M_DA10 M0_MA5 M_DA27
[42] M0_MA3
H10 BA2/A4
BA3/A3
BA0/A2
BA1/A5
BYTE2 DQ11
DQ12
DQ19
DQ20
N11
M_DA12 BYTE0 H10 BA2/A4
BA3/A3
BA0/A2
BA1/A5
BYTE1 DQ11
DQ12
DQ19
DQ20
N11
M_DA26 H
+1.35V_MEM_GFX N13 N13
DQ13 DQ21 M11
M_DA8 DQ13 DQ21 M11
M_DA24 BYTE3
M0_MA7 K4 DQ14 DQ22 M13 M_DA14 M0_MA0 K4 DQ14 DQ22 M13 M_DA25
[42] M0_MA7 M0_MA1 A8/A7 A10/A0 DQ15 DQ23 M0_MA6 A8/A7 A10/A0 DQ15 DQ23
2.37K_0402_1%
H5 U4 H5 U4
1
H4 U2 H4 U2
RV52 DIS@
K5 T4 K5 T4
[42] M0_MA6 M0_MA8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 M0_MA8 J5 A11/A6 A9/A1 DQ2 DQ26 T2
[42] M0_MA8 A12/RFU/NC DQ3 DQ27 N4 A12/RFU/NC DQ3 DQ27 N4
A5 DQ4 DQ28 N2 A5 DQ4 DQ28 N2
2
U5 VPP/NC DQ5 DQ29 M4 U5 VPP/NC DQ5 DQ29 M4

VPP/NC DQ6 DQ30 M2 +1.35V_MEM_GFX VPP/NC DQ6 DQ30 M2
+FB0_VREFDL DQ7 DQ31 DQ7 DQ31
RV134 2 DIS@ 1 1K_0402_1% J1 +1.35V_MEM_GFX RV131 2 DIS@ 1 1K_0402_1% J1 +1.35V_MEM_GFX
MF MF
1U_0402_6.3V6K
5.49K_0402_1%
RV135 2 DIS@ 1 1K_0402_1% J10 RV133 2 DIS@ 1 1K_0402_1% J10

SEN SEN
1
1 RV123 2 DIS@ 1 121_0402_1% J13 B1 RV132 2 DIS@ 1 121_0402_1% J13 B1

ZQ VDDQ ZQ VDDQ
CV394 DIS@
RV53 DIS@
D1 D1
VDDQ F1 VDDQ F1
M_ADBI0 J4 VDDQ M1 M_ADBI0 J4 VDDQ M1
2 [42] M_ADBI0 M_RAS#0 G3 ABI# VDDQ P1 M_CAS#0 G3 ABI# VDDQ P1
M_CS0B#0 M_WE#0
2
[42] M_RAS#0 G12 RAS# CAS# VDDQ T1 G12 RAS# CAS# VDDQ T1
[42] M_CS0B#0 M_CAS#0 L3 CS# WE# VDDQ G2 M_RAS#0 L3 CS# WE# VDDQ G2
[42] M_CAS#0 M_WE#0 CAS# RAS# VDDQ M_CS0B#0 CAS# RAS# VDDQ
L12 L2 L12 L2
C
[42] M_WE#0 WE# CS# VDDQ
VDDQ
B3 WE# CS# VDDQ
VDDQ
B3 samsung 4G samsung 2G C
D3 D3
VDDQ F3 VDDQ F3
M_WCKA0_1# D5 VDDQ H3 M_WCKA0_0# D5 VDDQ H3
[42] M_WCKA0_1# M_WCKA0_1 D4 WCK01# WCK23# VDDQ K3 M_WCKA0_0 D4 WCK01# WCK23# VDDQ K3
+1.35V_MEM_GFX
[42] M_WCKA0_1 WCK01 WCK23 VDDQ M3 WCK01 WCK23 VDDQ M3 UV12
M_WCKA0_0# P5 VDDQ P3 M_WCKA0_1# P5 VDDQ P3 UV12
[42] M_WCKA0_0# M_WCKA0_0 WCK23# WCK01# VDDQ M_WCKA0_1 WCK23# WCK01# VDDQ
2.37K_0402_1%
P4 T3 P4 T3 SA00009TT1L
[42] M_WCKA0_0 WCK23 WCK01 VDDQ WCK23 WCK01 VDDQ
1
E5 E5 SA000092D1L
VDDQ VDDQ
RV54 DIS@
N5 N5 S2G_R3@
+FB0_VREFDL A10 VDDQ E10 +FB0_VREFDL A10 VDDQ E10 S4G_R3@
U10 VREFD VDDQ N10 U10 VREFD VDDQ N10
+FB0_VREFCL VREFD VDDQ +FB0_VREFCL VREFD VDDQ
S IC D5 128M32 K4G41325FE-HC28 FBGA A31!
J14 B12 J14 B12 S IC D5 256M32 K4G80325FB-HC28 FBGA A31!
2
VREFC VDDQ D12 VREFC VDDQ D12

VDDQ F12 VDDQ F12
+FB0_VREFCL VDDQ H12 VDDQ H12 UV13 UV13
DRAM_RST DRAM_RST
J2 VDDQ K12 J2 VDDQ K12
[42,44] DRAM_RST RESET# VDDQ RESET# VDDQ
1U_0402_6.3V6K
5.49K_0402_1%
M12 M12 SA000092D1L SA00009TT1L

VDDQ VDDQ
1
1 P12 P12
VDDQ VDDQ
CV395 DIS@
RV55 DIS@
T12 T12 S4G_R3@ S2G_R3@

VDDQ G13 VDDQ G13
H1 VDDQ L13 H1 VDDQ L13
VSS VDDQ VSS VDDQ
S IC D5 256M32 K4G80325FB-HC28 FBGA A31! S IC D5 128M32 K4G41325FE-HC28 FBGA A31!
2 K1 B14 K1 B14
2
B5 VSS VDDQ D14 B5 VSS VDDQ D14

G5 VSS VDDQ F14 G5 VSS VDDQ F14
L5 VSS VDDQ M14 L5 VSS VDDQ M14
T5 VSS
VSS
VDDQ
VDDQ
P14 T5 VSS
VSS
VDDQ
VDDQ
P14 Hynix 4G Hynix 2G
B10 T14 B10 T14
D10 VSS VDDQ D10 VSS VDDQ
G10 VSS G10 VSS
L10 VSS A1 L10 VSS A1 UV12 UV12
P10 VSS VSSQ C1 P10 VSS VSSQ C1
T10 VSS VSSQ E1 T10 VSS VSSQ E1
VSS VSSQ VSS VSSQ SA00009U11L SA00008HQ1L
+1.35V_MEM_GFX H14 N1 H14 N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1 H4G_R3@ H2G_R3@
+1.35V_MEM_GFX VSS VSSQ U1 +1.35V_MEM_GFX VSS VSSQ U1
VSSQ H2 VSSQ H2
VSSQ VSSQ
S IC D5 256M32 H5GC8H24MJR-R0C BGA A31! S IC D5 128M32/3G H5GC4H24AJR-R0C A31!
B G1 K2 G1 K2 B
VDD VSSQ VDD VSSQ
CV198
CV213
CV230
CV235
CV233
CV210
CV211
CV157
CV155
CV158
L1 A3 L1 A3
G4 VDD VSSQ C3 G4 VDD VSSQ C3
1 1 1 1 1 1 1 1 1 1 VDD VSSQ VDD VSSQ
L4 E3 L4 E3 UV13 UV13
C5 VDD VSSQ N3 C5 VDD VSSQ N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3
2 2 2 2 2 2 2 2 2 2 VDD VSSQ VDD VSSQ SA00009U11L SA00008HQ1L
C10 U3 C10 U3
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ R10 VDD VSSQ C4 R10 VDD VSSQ C4 H4G_R3@ H2G_R3@
D11 VDD VSSQ R4 D11 VDD VSSQ R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
VDD VSSQ VDD VSSQ
S IC D5 256M32 H5GC8H24MJR-R0C BGA A31! S IC D5 128M32/3G H5GC4H24AJR-R0C A31!
L11 M5 L11 M5
P11 VDD VSSQ F10 P11 VDD VSSQ F10
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ
VSSQ
A12 VSSQ
VSSQ
A12 Micron 4G Micron 2G
C12 C12
VSSQ E12 VSSQ E12
VSSQ N12 VSSQ N12 UV12
VSSQ R12 VSSQ R12 UV12
170-BALL VSSQ U12 170-BALL VSSQ U12
VSSQ VSSQ SA00009E31L
Stitching Caps OPTION for MEM signals that have a change of reference plane voltage H13 H13 SA00009TV1L
Add stitching caps when required, one cap per three signals SGRAM GDDR5 VSSQ K13 SGRAM GDDR5 VSSQ K13 M2G_R3@
VSSQ A14 VSSQ A14 M4G_R3@
VSSQ C14 VSSQ C14
VSSQ VSSQ
S IC D5 128M32 EDW4032BABG-70-F-R A31!
E14 E14 S IC D5 256M32 MT51J256M32HF-70:A A31!
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ UV13 UV13
H5GC4H24AJR-R0C_BGA170 H5GC4H24AJR-R0C_BGA170
SA00009TV1L SA00009E31L
+1.35V_MEM_GFX M4G_R3@ M2G_R3@
S IC D5 256M32 MT51J256M32HF-70:A A31! S IC D5 128M32 EDW4032BABG-70-F-R A31!

CV238
CV248
CV243
CV242
CV247
CV342
CV344
CV343
CV341
A A
1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@

GDDR5_A0
0.3(X02)
LA-F121P
5 4 3 2 1
5 4 3 2 1
clamshell configuration
MF=0 MF=1
UV14 @ UV15 @
M_DA[32..63]
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
[42] M_DA[32..63]
A4 M_DA41 A4 M_DA60
M_EDC_5 C2 DQ24 DQ0 A2 M_DA42 M_EDC_7 C2 DQ24 DQ0 A2 M_DA62
[42] M_EDC_5 EDC0 EDC3 DQ25 DQ1 M_DA43 [42] M_EDC_7 EDC0 EDC3 DQ25 DQ1 M_DA63
C13 B4 C13 B4
M_EDC_6 R13 EDC1 EDC2 DQ26 DQ2 B2 M_DA40 M_EDC_4 R13 EDC1 EDC2 DQ26 DQ2 B2 M_DA61
[42] M_EDC_6 R2 EDC2 EDC1 L DQ27 DQ3 E4
M_DA47 [42] M_EDC_4 R2 EDC2 EDC1 H DQ27 DQ3 E4
M_DA57
EDC3 EDC0 DQ28 DQ4 M_DA44 L EDC3 EDC0 DQ28 DQ4 M_DA58 H
+1.35V_MEM_GFX +1.35V_MEM_GFX BYTE0 DQ29 DQ5
E2
M_DA46 BYTE1
+1.35V_MEM_GFX BYTE3 DQ29 DQ5
E2
M_DA56 BYTE3
F4 F4
M_DBI5# D2 DQ30 DQ6 F2 M_DA45 M_DBI7# D2 DQ30 DQ6 F2 M_DA59
D [42] M_DBI5# DBI0# DBI3# DQ31 DQ7 [42] M_DBI7# DBI0# DBI3# DQ31 DQ7 D
D13 A11 D13 A11
M_DBI6# P13 DBI1# DBI2# DQ16 DQ8 A13 M_DBI4# P13 DBI1# DBI2# DQ16 DQ8 A13
1 DIS@ 2 M_CLK1 [42] M_DBI6# P2 DBI2# DBI1# DQ17 DQ9 B11 [42] M_DBI4# P2 DBI2# DBI1# DQ17 DQ9 B11
RV85 120_0402_1% DBI3# DBI0# DQ18 DQ10 B13 DBI3# DBI0# DQ18 DQ10 B13
M_CLK1 DQ19 DQ11 M_CLK1 DQ19 DQ11
J12 E11 J12 E11
[42] M_CLK1 M_CLK#1 CK DQ20 DQ12 M_CLK#1 CK DQ20 DQ12
J11 E13 J11 E13
1 DIS@ 2 M_CLK#1 [42] M_CLK#1 M_CKE1 J3 CK# DQ21 DQ13 F11 M_CKE1 J3 CK# DQ21 DQ13 F11
[42] M_CKE1 CKE# DQ22 DQ14 CKE# DQ22 DQ14
RV86 120_0402_1% F13 F13
DQ23 DQ15 U11 M_DA52 DQ23 DQ15 U11 M_DA33
M1_MA2 H11 DQ8 DQ16 U13 M_DA54 M1_MA4 H11 DQ8 DQ16 U13 M_DA32
[42] M1_MA2 M1_MA5 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 M_DA50 M1_MA3 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 M_DA34
[42] M1_MA5 M1_MA4
K11 BA1/A5 BA3/A3 H DQ10 DQ18 T13 M_DA55
H
M1_MA2
K11 BA1/A5 BA3/A3 L DQ10 DQ18 T13 M_DA35
[42] M1_MA4 M1_MA3 BA2/A4 BA0/A2 DQ11 DQ19 M_DA49 M1_MA5 BA2/A4 BA0/A2 DQ11 DQ19 M_DA36
[42] M1_MA3
H10
BA3/A3 BA1/A5
BYTE2 DQ12 DQ20
N11
M_DA53 BYTE2 H10
BA3/A3 BA1/A5
BYTE1 DQ12 DQ20
N11
M_DA39 L
N13 N13
DQ13 DQ21 M11 M_DA48 DQ13 DQ21 M11 M_DA38 BYTE0
M1_MA7 DQ14 DQ22 M_DA51 M1_MA0 DQ14 DQ22 M_DA37
K4 M13 K4 M13
[42] M1_MA7 M1_MA1 H5 A8/A7 A10/A0 DQ15 DQ23 U4 M1_MA6 H5 A8/A7 A10/A0 DQ15 DQ23 U4
H4 U2 H4 U2
K5 T4 K5 T4
[42] M1_MA6 M1_MA8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 M1_MA8 J5 A11/A6 A9/A1 DQ2 DQ26 T2
[42] M1_MA8 A12/RFU/NC DQ3 DQ27 N4 A12/RFU/NC DQ3 DQ27 N4
A5 DQ4 DQ28 N2 A5 DQ4 DQ28 N2
U5 VPP/NC DQ5 DQ29 M4 U5 VPP/NC DQ5 DQ29 M4
VPP/NC DQ6 DQ30 M2 +1.35V_MEM_GFX VPP/NC DQ6 DQ30 M2
DQ7 DQ31 DQ7 DQ31
RV116 2 DIS@ 1 1K_0402_1% J1 +1.35V_MEM_GFX RV117 2 DIS@ 1 1K_0402_1% J1 +1.35V_MEM_GFX
RV118 2 DIS@ 1 1K_0402_1% J10 MF RV119 2 DIS@ 1 1K_0402_1% J10 MF
RV120 2 DIS@ 1 121_0402_1% J13 SEN B1 RV121 2 DIS@ 1 121_0402_1% J13 SEN B1
ZQ VDDQ D1 ZQ VDDQ D1
VDDQ F1 VDDQ F1
M_ADBI1 VDDQ M_ADBI1 VDDQ
J4 M1 J4 M1
[42] M_ADBI1 M_RAS#1 G3 ABI# VDDQ P1 M_CAS#1 G3 ABI# VDDQ P1
[42] M_RAS#1 M_CS1B#0 G12 RAS# CAS# VDDQ T1 M_WE#1 G12 RAS# CAS# VDDQ T1
[42] M_CS1B#0 M_CAS#1 L3 CS# WE# VDDQ G2 M_RAS#1 L3 CS# WE# VDDQ G2
[42]
[42]
M_CAS#1
M_WE#1
M_WE#1
L12 CAS#
WE#
RAS#
CS#
VDDQ
VDDQ
L2 M_CS1B#0
L12 CAS#
WE#
RAS#
CS#
VDDQ
VDDQ
L2
samsung 4G samsung 2G
B3 B3
VDDQ D3 VDDQ D3
C VDDQ VDDQ C
F3 F3
M_WCKA1_0# D5 VDDQ H3 M_WCKA1_1# D5 VDDQ H3
[42] M_WCKA1_0# M_WCKA1_0 D4 WCK01# WCK23# VDDQ K3 M_WCKA1_1 D4 WCK01# WCK23# VDDQ K3 UV14
[42] M_WCKA1_0 WCK01 WCK23 VDDQ M3 WCK01 WCK23 VDDQ M3
M_WCKA1_1# P5 VDDQ P3 M_WCKA1_0# P5 VDDQ P3 UV14 SA00009TT1L
[42] M_WCKA1_1# M_WCKA1_1 P4 WCK23# WCK01# VDDQ T3 M_WCKA1_0 P4 WCK23# WCK01# VDDQ T3
[42] M_WCKA1_1 WCK23 WCK01 VDDQ E5 WCK23 WCK01 VDDQ E5 SA000092D1L S2G_R3@
VDDQ N5 VDDQ N5
+FB1_VREFDL A10 VDDQ E10 +FB1_VREFDL A10 VDDQ E10 S4G_R3@ S IC D5 128M32 K4G41325FE-HC28 FBGA A31!
U10 VREFD VDDQ N10 U10 VREFD VDDQ N10
+FB1_VREFCL VREFD VDDQ +FB1_VREFCL VREFD VDDQ
J14 B12 J14 B12 S IC D5 256M32 K4G80325FB-HC28 FBGA A31!
VREFC VDDQ D12 VREFC VDDQ D12
VDDQ F12 VDDQ F12 UV15
VDDQ H12 VDDQ H12 UV15
DRAM_RST J2 VDDQ K12 DRAM_RST J2 VDDQ K12 SA00009TT1L
[42,43] DRAM_RST RESET# VDDQ M12 RESET# VDDQ M12
VDDQ VDDQ SA000092D1L
+1.35V_MEM_GFX P12 P12 S2G_R3@
VDDQ T12 +1.35V_MEM_GFX VDDQ T12 S4G_R3@
VDDQ G13 VDDQ G13
VDDQ VDDQ S IC D5 128M32 K4G41325FE-HC28 FBGA A31!
2.37K_0402_1%
H1 L13 H1 L13 S IC D5 256M32 K4G80325FB-HC28 FBGA A31!

VSS VDDQ VSS VDDQ
1
K1 B14 K1 B14
VSS VDDQ VSS VDDQ
RV48 DIS@
B5 D14 B5 D14
G5 VSS VDDQ F14 G5 VSS VDDQ F14
L5 VSS VDDQ M14 L5 VSS VDDQ M14
T5 VSS VDDQ P14 T5 VSS VDDQ P14 Hynix 4G Hynix 2G
CV162
CV166
CV216
CV221
CV219
CV165
CV164
CV161
CV153
CV160
2
B10 VSS VDDQ T14 B10 VSS VDDQ T14

VSS VDDQ 1 1 1 1 1 1 1 1 1 1 VSS VDDQ
D10 D10 UV14
+FB1_VREFDL G10 VSS G10 VSS
L10 VSS A1 L10 VSS A1 UV14
VSS VSSQ 2 2 2 2 2 2 2 2 2 2 VSS VSSQ SA00008HQ1L
1U_0402_6.3V6K
5.49K_0402_1%
P10 C1 P10 C1
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
VSS VSSQ VSS VSSQ

1
T10 E1
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
1 T10 E1 SA00009U11L H2G_R3@

VSS VSSQ VSS VSSQ
CV390 DIS@
RV49 DIS@
H14 N1 H14 N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1 H4G_R3@
VSS VSSQ VSS VSSQ
S IC D5 128M32/3G H5GC4H24AJR-R0C A31!
+1.35V_MEM_GFX U1 +1.35V_MEM_GFX U1
2 VSSQ H2 VSSQ H2 S IC D5 256M32 H5GC8H24MJR-R0C BGA A31!
2
G1 VSSQ K2 G1 VSSQ K2
L1 VDD VSSQ A3 L1 VDD VSSQ A3 UV15
B VDD VSSQ VDD VSSQ B
G4 C3 G4 C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3 UV15
VDD VSSQ VDD VSSQ SA00008HQ1L
C5 N3 C5 N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3 H2G_R3@
VDD VSSQ VDD VSSQ
SA00009U11L
C10 U3 C10 U3
+1.35V_MEM_GFX R10 VDD VSSQ C4 R10 VDD VSSQ C4 H4G_R3@
VDD VSSQ VDD VSSQ
S IC D5 128M32/3G H5GC4H24AJR-R0C A31!
D11 R4 D11 R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
VDD VSSQ VDD VSSQ S IC D5 256M32 H5GC8H24MJR-R0C BGA A31!
2.37K_0402_1%
L11 M5 Stitching Caps OPTION for MEM signals that have a change of reference plane voltage L11 M5
VDD VSSQ VDD VSSQ
1
P11 F10 Add stitching caps when required, one cap per three signals P11 F10
VDD VSSQ VDD VSSQ
RV50 DIS@
G14 M10 G14 M10

L14 VDD VSSQ C11 SAM 4G 11/17 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12 Micron 4G Micron 2G
2
VSSQ C12 VSSQ C12

VSSQ E12 VSSQ E12
+FB1_VREFCL VSSQ N12 VSSQ N12 UV14
VSSQ R12 VSSQ R12 UV14
VSSQ VSSQ
1U_0402_6.3V6K
5.49K_0402_1%
170-BALL U12 170-BALL U12 SA00009E31L

VSSQ VSSQ
1
1 H13 H13 SA00009TV1L

VSSQ VSSQ
CV391 DIS@
RV51 DIS@
SGRAM GDDR5 K13 SGRAM GDDR5 K13 M2G_R3@

VSSQ A14 VSSQ A14 M4G_R3@
VSSQ C14 VSSQ C14
VSSQ VSSQ S IC D5 128M32 EDW4032BABG-70-F-R A31!
2 E14 E14 S IC D5 256M32 MT51J256M32HF-70:A A31!
2
VSSQ N14 VSSQ N14

VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ UV15 UV15
H5GC4H24AJR-R0C_BGA170 H5GC4H24AJR-R0C_BGA170
SA00009TV1L SA00009E31L
M4G_R3@ M2G_R3@
+1.35V_MEM_GFX S IC D5 256M32 MT51J256M32HF-70:A A31! S IC D5 128M32 EDW4032BABG-70-F-R A31!
A A
CV225
CV227
CV170
CV169
CV173
CV335
CV334
CV336
CV333
1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

GDDR5_A1
0.3(X02)
LA-F121P
5 4 3 2 1
5 4 3 2 1
Power-Up/Down Sequence 1. All the ASIC supplies must reach their respective nominal voltages within 20 ms
of the start of the ramp-up sequence, though a shorter ramp-up duration is
preferred. The maximum slew rate on all rails is 50 mV/μ s.
2. It is recommended that the 3.3-V rail ramp up first.
3. It is recommended that the 0.95-V rail reach at least 90% of its nominal value
no later than 2 ms from the start of VDDC ramping up.
4. The power rails that are shared with other components on the system should be
gated for the dGPU so that when the dGPU is powered down (for example
AMD PowerXpress? idle state), all the power rails are removed from the dGPU.
D The gate circuits must meet the slew rate requirement (such as ? 50 mV/μ s). D
5. VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC
should reach 90% before VDD_CT starts to ramp up (or vice versa).
6. For power down, reversing the ramp-up sequence is recommended.
PCH_PLTRST#
AND PCH_PLTRST#_EC
GPU
GPP_B13
< 20mS < 20mS MCP GATE AND PLT_RST_VGA# PERSTB
GATE
VDDR3(3.3V)
>10uS
+3VGS DGPU_HOLD_RST#
(PXS_PWREN) GPP_D10
PCIE_VDDC(0.95V) GPP_D13 PXS_PW REN
+0.95VSDGPU
(PXS_PWREN with RC delay) DGPU_PW ROK
GPP_D18
1.8V_IO(1.8V)
+1.8VGS
(PXS_PWREN with RC delay)
VDDC/VDDCI(0.8~1.15V)
+VGA_CORE
(PXS_PWREN)
VMEMIO(1.35V or 1.5V) +3VS +3VGS
C +1.5V_MEM_GFX > 100mS > 100mS (SW) C
(DGPU_PWROK with RC delay) PXS_PW REN

LDO 1
PWRGOOD
DGPU_PWROK
+1.0V_PRIM +0.95VSDGPU +1.8V_PRIM +1.8VGS
PERSTb
> 100uS
PXS_PW REN
L DO 2 PXS_PW REN
LDO 2
PLT_RST_VGA# Asserted Before PERSTb
REFCLK B+ +VGA_CORE +1.35V_MEM +1.35V_MEM_GFX

CLK_PEG_VGA/CLK_PEG_VGA# PWM 3 L DO 3
PXS_PW REN DGPU_PW ROK
Device in Device Hardware Reset Device CFG Accessible Device Powering down Device Powered down
DEVICE Reset or Working
No requirements
B B
For AMD R17M-M2-50 VRAM Only 2GB

Memory ID R3 P/N Vendor Conf i gur a t i o n Size
Samsung 2G Hynix 2G Micron 2G 000 SA00009TT1L SAMSUNG S IC D5 128M32 K4G41325FE-HC28 FBGA A31! 2GB
RV16 2G_S@ RV15 2G_H@ RV16 2G_H@ RV15 2G_M@
110 SA00008HQ1L Hynix S IC D5 128M32/3G H5GC4H24AJR-R0C A31! 2GB
111 SA00009E31L Micron S IC D5 128M32 EDW4032BABG-70-F-R A31! 2GB
4.75K_0402_1% 3.4K_0402_1% 10K_0402_1% 4.75K_0402_1%
SD034475180 SD034340180 SD034100280 SD034475180 4GB
Memory ID R3 P/N Vendor Conf i gur a t i o Size
Samsung 4G Hynix 4G Micron 4G
RV16 4G_S@ RV15 4G_H@ RV16 4G_H@ RV15 4G_M@ 000 SA000092D1L SAMSUNG S IC D5 256M32 K4G80325FB-HC28 FBGA A31! 4GB
110 SA00009U11L Hynix S IC D5 256M32 H5GC8H24MJR-R0C BGA A31! 4GB
4.75K_0402_1% 3.4K_0402_1% 10K_0402_1% 4.75K_0402_1% 111 SA00009TV1L Micron S IC D5 256M32 MT51J256M32HF-70:A A31! 4GB
A A
SD034475180 SD034340180 SD034100280 SD034475180

Title
M30/M70_NOTE
Re v
5 4 3 2 1
A B C D
@ PJP1
Main Func = DCIN/BATT CONN 1
1 2
2
6KV
JUMP_43X79
+DC_IN PSID@ PQ1
FDV301N-G_SOT23-3
EMI@ PL1 PSID@ PR1
@ PJPDC1 5A Z150 20M 1210_2P 1 3 33_0402_5%
S
D
+19V_ADPIN 1 2 PSID-3 1 2
PS_ID [27]
8
GND 7
GND
1
10P_0402_50V8J
82P_0402_50V8J
1000P_0402_50V7K
2200P_0402_25V7K
1000P_0402_50V7K
2200P_0402_25V7K
G
6 PSID@ PR4 PR5 PSID@
2
6
1
1
100K_0402_1%
5 10K_0402_1% 2.2K_0402_5%
TVNST52302AB0_SOT523-3
5 4 2 1
@RF@ PC15
EMI@ PC1
EMI@ PC2
EMI@ PC3
EMI@ PC4
Mad@RF@ PC16
PSID@ PR3
4 +5VALW
3
3
2
2
3 2
ESD@ PD1
2 1 1 2
MMST3904-7-F_SOT323-3
+3VALW
2
1
1
EMI@ PL2 C
1 1
PSID@ PQ2
5A Z150 20M 1210_2P PSID-1 2
ACES_50458-00601-001 B
1
@PJP2 E @ PR7
3
1
PR6 PSID@
1 2 100K_0402_1% 3
15K_0402_1%
1 2 1 2 1 +5VALW
JUMP_43X79 EMI@ PL3 2
BLM15AG102SN1D_2P
1
PSID 1 2 @ PD2
2
@ PD3 BAV99W_SC70-3
BAV99W_SC70-3
3
PD4
S SCH DIO 5A 100V 15UA 0.88V TO227-3
2
1
3
+DC_IN +5VALW
S1 S2
+3.3V_ADP_DCIN
+3.3V_VBUS_IN
PQ3 PQ4
AON7409_DFN8-5 +DC_IN_SS AON7409_DFN8-5
1 1
+DC_IN +3.3V_ADP_DCIN 2
3 5 5
2
3 +SDC_IN
LM393_P +3.3V_ADP_DCIN
1
0.022U_0603_50V7K
0.022U_0603_50V7K
DFLS160-7_POWERDI123-2
3
S
PU1 PR47
4
4
1
1
G
RT9069-33GB_SOT23-5 2 300K_0402_5%
1M_0402_5%
1M_0402_5%
+3.3V_ADP_DCIN
1
1
1 5
PR8
PC6
Loki@ PR53
PC5
VCC OUT
PD12
PR9
0_0402_5%
2
2 2 1 HW_ACAVIN_NB
PR50 @ PR60
AO3409_SOT23-3
1000P_0603_50V7K
2
AC_B2B_S2_B
AC_B2B_S2_G
GND
PQ19
@ 100K_0402_5% 100K_0402_5%
D
2
1
2
1
3 4 @ PR51
2
2
NC EN
1
1
1
D
PC8
2 Loki@ PR13 PR14 0_0402_5% 2

AC_B2B_S2_A AC_B2B_S2
3
1
PC9 Mad@ 100K_0402_5% 10K_0402_1% 2 2 1
2.2U_0402_10V6M PD11 G
2
LRB715FT1G_SOT323-3 PD10 S PQ17

2
3
LRB715FT1G_SOT323-3 PR48 2N7002KW_SOT323-3 Mad@ PR49
1
1
1
2 D
PR61 100K_0402_5% 0_0402_5%
2
[47,48] AC_OK AC_B2B_S2_SW PWR_SELECT2
1
100K_0402_5% 1 PR11 2 2 1
1
1 2 3 510K_0402_5% PR12 G
PR10 1M_0402_5% PQ18 S (Barrel -> H / Type C -> L)
3
1
1
1M_0402_5% 2N7002KW_SOT323-3
2
2
1
1
1
Mad@ @ PC23
2N7002KDW_SOT363-6
PR63 Loki@ PR15 PR16 0.1U_0402_10V7K
2
3
D
PR62 100K_0402_5% 12K_0402_1% 100K_0402_5%
15K_0402_5% AC_B2B_S2 2
2
PQS30B
PR2 G PQ6
AC_B2B_ACOK
2
2
2
PWR_SE2 [47] D
Mad@
5 0_0402_5% S 2N7002KW_SOT323-3
2N7002KDW_SOT363-6
3
1 2AC_B2B_S1_A
2 PQ5
6
G 2N7002KW_SOT323-3
4
S PR17 PC10
3
+3.3V_ADP_DCIN
1
PQS30A
0.1U_0402_50V7K
1M_0402_5%
56K_0402_5%
1
Mad@
2
PR100
+3VALW_EC PC7 asserts H_PROCHOT# when TypeC is

2
LM393_P 0.1U_0402_50V7K
unplugged, keep low for 10ms
1
2
1
till SW PROCHOT# is issued by EC

0.1U_0402_10V7K
H_PROCHOT#
PR22
+3VALW
2N7002KW_SOT323-3
1
Mad@ PC21
100K_0402_5%
+CCG_VBUS
10K_0402_1%
1
1
Mad@
2
1
D D
1
PRS28
PR64 Type@
Type@
AC_B2B_S1 2
3
+EC_VCCA
PQ16
100K_0402_5% @ 2 PCS19
2N7002KDW_SOT363-6
AC_DIS1 [48]
2
Mad@ PR21 G G 0.1U_0402_25V6

2
Type@ PQS10B
PR65 100K_0402_5% S S
3
2
3
AC_B2B_S1 USBC_SW_PROCHOT
5
0_0402_5% PQ20 Type@ PRS26 1 2 5

2
PWR_SELECT1
1
D
2
2 1 1 2N7002KW_SOT323-3 1M_0402_1%
P
[27] PWR_SELECT IN1
6
1
4 2 PR52 @ PCS20
2N7002KDW_SOT363-6
4
O
1
(Barrel -> H / Type C -> L) 2 G PC22 16.9K_0402_1% 0.1U_0402_25V6 Type@
PWR_SELECT2
2
[27,47,48] HW_ACAVIN_NB IN2
G
1
D
1
Type@ PQS10A
Mad@ S 0.1U_0402_10V7K PRS29
3
USBC_SW_PROCHOT 1 2 2 2
3 PR66 Mad@ PU2 PQ15 @ PQS11 100K_0402_1% 3
3
1M_0402_1% SN74AHC1G08DCKR_SC70-5 2N7002KW_SOT323-3 [27] VCIN0_PH G 2N7002KW_SOT323-3

2
1
@ S
2
3
PRS30 Type@ PRS27

PH1 under CPU bot t e msi de :
2
100K_0402_1% 1M_0402_1%
Loki@ PR46
0_0402_5%
CPU thermal protect i on
at 92 +/- 3 degree C
1
2
1 2 PH1
+17.4V_BATT+ 100K_0402_1%_TSM0B104F4251RZ
2
1
@ PJP3
2
+17.4V_BATT++ [27] ECAGND
1 2
+17.4V_BATT+
JUMP_43X79
Adapter protect i on: Bat t er y pr ot ec t i on Erp lot6 Circuit
EMI@ PL4 if battery removed, adaptor only, asserts H_PROCHOT# when adaptor is
+DC_IN
5A Z150 20M 1210_2P
1 2 +17.4V_BATT++ then trigger the H_PROCHOT#, unplugged, keep low for 10ms
keep @ in BOM since battery can not till SW PROCHOT# is issued by EC @ PR31
3.3K_1206_5%
1000P_0402_50V7K
H_PROCHOT#
1
1
1
be removed by end user [27,39,47,48] HW_ACAV_IN 0_0402_5%

82P_0402_50V8J
+3VALW
0.01U_0402_25V7K
0.1U_0402_25V7K
1
1
1 2
EMI@ PC11
+DC_IN
@ PR32
ESD@ PD5 ESD@ PD6
10K_0402_1%
1
1
Mad@RF@ PC17
Mad@RF@ PC18
EMI@ PC12
TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
PR33
@ PR34
Battery Bot Side [8,10,27,48,53] H_PROCHOT#
2
PC13 1M_0402_1%
2N7002KDW_SOT363-6
2
3 2
0.1U_0402_25V6 @ PR35
2
3
2
2
1
PQ12B
0_0402_5%
PIN1 GND
2N7002KDW_SOT363-6
2
BATT_TEMP [27,48] PR36 AC_SW_PROCHOT

1 2 5 1 2
PIN2 GND
@ PQ13B
1M_0402_1%
6
POK [27,31,49] 5
2N7002KDW_SOT363-6
PIN3 GND
4
1
@ PBATT1 PC14
2N7002KDW_SOT363-6
2
1 1
PQ12A
0.1U_0402_25V6 PR40
PIN4 SYS_PRES
4
1
1
2 D 2
@ PQ13A
100K_0402_1%
BATT_TEMP
PIN5 BATT_PRS 2 3
SYS_PRES
PR39 PR41 1 2 2 PQ11 2 @ PR38
3
+3VALW
2
4 PR37 200_0402_5% 10K_0402_1% G 1M_0402_1%

PIN6 DAT_SMB 2N7002KW_SOT323-3
1
4
1
5 100_0402_5% 1 2 1 2 PR44
100K_0402_1%
S
3
5 DAT_SMB
1
PIN7 CLK_SMB 6
6
7 CLK_SMB
1
1
2
2
1M_0402_1% @ PR45
PR43
1M_0402_1%
4
PIN8 Batt+ 7 8 4
1
8 9
PIN9 Batt+ PR42
2
9 10 100_0402_5%
2
PIN10 Batt+ 10
GND
11
12 EC_SMB_CK1 [27,48]
SP021412220 GND
ACES_50458-01001-P01_10P-T
Other component (37.1)
ACES_50458-01001-P01_10P-T EC_SMB_DA1 [27,48]

PWR_DCIN/BATT CONN/OTP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X00
A B C D
A B C D
Main Func = Type-C PD Selector

DCIN_AC_Detector
@ PCS01 +3.3V_ADP_DCIN
0.01U_0402_25V7K
1 2
+DC_IN +3.3V_ADP_DCIN
2
2 LM393_P PRS44 Loki@

0_0402_5%
+3.3V_ADP_DCIN 1 Mad@ PRS43
0_0402_5%
1
3 1 2 @ PJPS01
1 2
+3.3V_VBUS_IN PDS01
4 BAT54CW_SOT323-3 PRS01 PAD-OPEN 4x4m 4
1.8M_0402_1%
1
1 2 Type@ PDS02
240K_0402_1%
1
PRS02 @ PQS61 S SCH DIO 5A 100V 15UA 0.88V TO227-3

102K_0402_1%
AON7409_DFN8-5 2
PRS03
1K_0402_1%
1 1
LM393_P
PRS04
2 3
+CCG_VBUS_1
2
5 3
2
PUS01A @ PRS63
S3 S4
4
1500P_0402_50V7K
8
AS393MMTR-G1_MSOP8 PRS39
S
300K_0402_1%
499K_0402_1%
1
3 0_0402_5%
G
2 Type@ Type@
+VBUS_DC_SS
P
+ PQS01 PQS02
(>17.6V) 1 1 2 +3.3V_ADP_DCIN
PRS62
PCS61
2 O HW_ACAVIN_NB [27,46,47,48] AON7409_DFN8-5 AON7409_DFN8-5

2
G
- 1 1
AO3409_SOT23-3
2
2 2
@ @ @ PRS66
+SDC_IN
D
PQS63
10K_0402_1%
4
1
100P_0402_50V8J
220P_0402_50V8J
1200P_0402_50V7K
100K_0402_5% 3 5 5 3
23.2K_0402_1%
84.5K_0402_1%
1
1
PCS02
PCS03
PRS65
1
1
2N7002KW_SOT323-3
@
PRS05
PRS06
PCS04
1 2
4.7U_0603_25V6K
0.47U_0603_25V7K
@ PRS64 499K_0402_1%
2
1500P_0402_50V7K
1
3
D S
0_0402_5% @ PRS10 Type@
499K_0402_1%
2
1
2 1 2 2 300K_0402_1%
G
PQS64
2
[46] PWR_SE2
1
1
G
Type@ PCS09
Type@ PRS08
PCS63
Type@ PRS09
Type@ PCS10
2
0.1U_0402_10V7K
USBC_B2B_S2_G
@ PRS61 S
3
2
1
49.9K_0402_1% @
@ PCS62
AO3409_SOT23-3
2
2
@ D
Type@ PQS06
2
1
2
1
+3.3V_ADP_DCIN
2N7002KW_SOT323-3
PRS15 Type@
100K_0402_5%
1
D
EMI Part USBC_B2B_S2
1
2 Type@Loki@
PQS62
2
1
Type@EMI@ PLS11 +CCG_VBUS_1 G PRS34 PRS45 @
1
5A_Z120_25M_0805_2P S Type@ PRS16 10K_0402_1% 0_0402_5%

3
2N7002KW_SOT323-3
1 2 @ 49.9K_0402_1%
PRS36 Type@ Type@ PRS18
2
1
D
1 2
+CCG_VBUS 300K_0402_1%
USBC_B2B_S3
0_0402_5%
2
3
S
Type@EMI@ PLS12 2 1 2
Type@ PQS07
2
5A_Z120_25M_0805_2P 2
2N7002KDW_SOT363-6
G
G
100P_0402_50V8J
100P_0402_50V8J
+3.3V_VBUS_IN S
100K_0402_5%
3
1
0.1U_0402_10V7K
Type@ @ PRS35
1000P_0402_50V7K
1
1
0.1U_0402_25V6
D
PRS37 0_0402_5%
PCS05
PCS06
PCS07
Type@ PRS07
PCS08
@ PCS17
Type@ PQS05A
AO3409_SOT23-3
D 2 1 2
Type@ PQS13
100K_0402_5% USBC_B2B_S2 VBUS_C_CTRL_P1 [31,47

1
2 @ PQS14 G
2
2
3 3
0.1U_0402_10V7K
Type@ 2N7002KW_SOT323-3 S
2
1 2
3
1
PRS38
Type@ PCS13
Type@EMI@
Type@EMI@
Type@EMI@
Type@EMI@
1
D
0_0402_5%
0.1U_0402_10V7K
[31,32,47] VBUS_P_CTRL_P1 1 2 2 PUS02 Type@
2
1
G PQS12 Type@ SN74AHC1G08DCKR_SC70-5
Type@ PCS12
5
S 2N7002KW_SOT323-3
3
P
VBUS_C_CTRL_P1 [31,47]
2
4 IN1
O 2
IN2 HW_ACAV_IN [27,39,46,48]
G
Type@ PRS32 Type@ PDS04
0_0402_5% SDMK0340L-7-F_SOD323-2
3
1 2 2 1
+3.3V_ADP_DCIN
1
PRS33 PDS05
49.9K_0402_1%
0_0402_5% SDMK0340L-7-F_SOD323-2 Type@Mad@

Type@ PRS11
+3.3V_VBUS_IN
1
1 2 2 1 PRS42
[46,48] AC_OK +3.3V_VBUS_IN
Type@ PRS25 0_0402_5%
USBC_B2B_S1
1
D
Type@Loki@ Type@Loki@ 1M_0402_1% 2 1
USBC_B2B_S1
2
1 2 2 1 2
[27,46,48] HW_ACAVIN_NB
1
G PQS08 Type@
0.1U_0402_10V7K
PRS23 PDS06 S 2N7002KW_SOT323-3
3
100K_0402_5% SDMK0340L-7-F_SOD323-2 Type@ PRS12 Type@Loki@
1
10K_0402_1% PDS03 PRS40 Type@Loki@
Type@ PCS14
Type@Loki@ Type@Loki@
+3.3V_VBUS_IN
2N7002KDW_SOT363-6
LRB715FT1G_SOT323-3 0_0402_5%
+CCG_VBUS
2
D
2 2 1
USBC_B2B_S1_A HW_ACAVIN_NB [27,46,47,48]
2
3
2 1
5
Type@ PUS04 G PQS04 Type@ Type@ PQS05B 3 2 1 AC_OK [46,48]
RT9058-33GX SOT-89 3P S 2N7002KW_SOT323-3 2 PRS41 Type@Loki@
P
3
IA
1
0.1U_0402_10V7K
5 4 0_0402_5%
O
1
1 1
Type@ PCS11
VBUS_P_CTRL_P1 [31,32,47]
3
G
VCC Type@ PRS14 IB
4
3 Type@ PRS13 100K_0402_5% PUS03 Type@

2
3
2 VOUT 100K_0402_5% TC7SH32FU_SSOP5
USBC_B2B_OVP
2
GND 1 2 5
+3.3V_VBUS_IN
1
Type@ PCS15 PCS16 Type@ PQS03B

4
1000P_0603_50V7K 2.2U_0402_10V6M 2N7002KDW_SOT363-6

2
2N7002KDW_SOT363-6
Type@
Type@ PQS03A
[31,32] OVP_TRIP_P1
2
1
2 2
1 1

PWR_Type-C PD Selector
A B C D
A B C D
Main Func = CHARGER
PRB01
0.02_1206_1% EMI@ PLB11
5A Z150 20M 1210_2P
1 4 +PWR_SRC_AC 1 2 +CHARGER_SRC
+SDC_IN
2 3
+19VB
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
33U_D2_25VM_R40M
33U_25V_M
82P_0402_50V8J
1 1
@EMI@ PCB01
@EMI@ PCB02
1
1
+ +
PCB03
PCB04
PCB05
PCB06
Mad@RF@ PCB47
@ PCB07
@ PCB08
@ PJPB01
1 1 2 1
2
2 2
PAD-OPEN 4x4m
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
1
1
PCB10
PCB11
PCB12
PCB13
PCB14
PCB15
PCB16
PCB17
2
2
1
PRB02 PRB03
2.2_0402_1% 2.2_0402_1%
2
2
CSIP_CHG
CSIN_CHG
PCB18
4.7U_0402_6.3V6M
2200P_0402_50V7K
2200P_0402_50V7K
1000P_0402_50V7K
1 2
82P_0402_50V8J
0.1U_0402_25V6
1
1
EMI@ PCB21
EMI@ PCB22
EMI@ PCB23
EMI@ PCB24
Mad@RF@ PCB46
1
PCB19 PCB20
2
+SDC_IN 1U_0402_25V6K 1U_0402_25V6K
2
2
0.22U_0603_25V7K
2
PCB25
2 1 1 2 ADP_CHG
+19VB
2 1
PDB01 PRB04
1
SDMK0340L-7-F_SOD323-2 0_0603_5%
3.3_0603_1%
PRB06
PRB05
2 1 442K_0402_1%
2 +VBUS_DC_SS 2
PDB02
2
SDMK0340L-7-F_SOD323-2
ACIN_CHG
BOOT1_CHG
0.1U_0402_25V6
2 1
UG1_CHG
LX1_CHG
LG1_CHG
+DC_IN_SS
1
PRB07
PCB26
PDB03 100K_0402_5%
1
SDMK0340L-7-F_SOD323-2 PRB09
2
4.7_0402_5%
2
PRB08 1 2 VDD_CHG
UG2_CHG
UG1_CHG
1_0805_5% PUB01
PCB27 ISL9538HRTZ-T_TQFN32_4X4
16
15
14
13
12
11
10
33
2
1U_0603_50V6K
2 1 DCIN_CHG
BOOT1
UGATE1
PHASE1
LGATE1
PAD
CSIN
ADP
CSIP
ASGATE
@ PRB10 PCB29 +VCHGR PQB03
0_0402_5% 1U_0402_10V6K PQB01 PQB02
OTGEN/CMIN_CHG VDDP_CHG
1
1
2 1 17 8 1 2 AON6994_DFN5X6D-8-7 AON6994_DFN5X6D-8-7 PRB12 AON7409_DFN8-5
DCIN VDDP PLB01 0.01_1206_1% 1
G1
D1
D1
G1
VDD_CHG LG2_CHG
2 1 18
VDD LGATE2
7 1UH_PCMB104T-1R0MH_18A_20%
1 4
2
3 5
+17.4V_BATT+
ACIN_CHG LX2_CHG LX1_CHG LX2_CHG
[46]
AC_DIS1
PCB28 @ PRB13 19 6 7 1 2 7
1U_0402_10V6K 0_0402_5% ACIN PHASE2 D2/S1 D2/S1 2 3
PRB11 2 1 20 5 UG2_CHG
4
100K_0402_1% CMIN UGATE2 PCB30
G2
G2
S2
S2
S2
S2
S2
S2
1 PRB14 2 0_0402_5% 21 4 BOOT2_CHG 1 2 1 2
@
2
ACAV_IN1 SDA BOOT2

1
[27,46] EC_SMB_DA1
4700P_0402_25V7K
4.7_1206_5%
4.7_1206_5%
10U_0805_25V6K~D
10U_0805_25V6K~D
3
3
6
1 PRB16 2 0_0402_5% 22 3
MAD@RF@ PRB17
MAD@RF@ PRB18
@ 0.22U_0603_25V7K PRB15
SCL VSYS
1
[27,46] EC_SMB_CK1
PCB31
PCB32
4.7_0603_1%
CSOP_CHG
1
1
1 PRB19 2 0_0402_5% 23 2
@ PCB33
PQB04
154K_0402_1%
PROCHOT# CSOP
1
D
AMON/BMON
[8,10,27,46,53] H_PROCHOT#
PRB20
2N7002KW_SOT323-3
1SNUB1_CHG 2
1SNUB2_CHG 2
2
CSON_CHG
LG1_CHG
LG2_CHG
2 24 1
BATGONE
BGATE_CHG
2
G ZTB02 ACOK CSON @ PRB21
CMOUT
BGATE
1 ACOK_CHG
COMP
PROG
PSYS
2
VBAT
S 0_0402_5%
3
PRB22 0_0402_5% 1 2
680P_0603_50V7K
680P_0603_50V7K
+19VB
1
@ PRB24 PCB34
25
26
27
105K_0402_1% 28
29
30
31
32
MAD@RF@ PCB36
MAD@RF@ PCB37
100K_0402_1% 10P_0402_50V8J
1M_0402_1%
100K_0402_1%
3 3
PRB43
PRB23
PRB25 1 2 1 2 1 2
1
100K_0402_1%
2
2 1 BATGONE_CHG
PRB26
@ PCB35
BGATE_CHG
2
[27,46] BATT_TEMP
VBAT_CHG
PRB27 0.1U_0402_25V6
100K_0402_1%
1
1 2
0_0402_5%
+3VALW
2
PRB28
@ PRB29
0_0402_5%
1 2
[27] AC_DIS ZTB01 @
2
@ PCB38
COMP_CHG
1U_0402_25V6K
1 2
499_0402_1%
1
PRB30
560P_0402_50V7K
0_0402_5%
10.5K_0402_1%
PRB31
1 2
0.1U_0402_25V6
1
1
@ PCB39
2
2
PRB33
PCB40
PCB41 PRB32 1_0402_1%

1
@ 1U_0402_25V6K
0_0402_5%
0_0402_5%
2
2
1
PRB34
PRB35
PRB36 1_0402_1%
2
PCB42 1 2
2
0.01U_0402_25V7K
2
@ @ LM393_P
I_BATT_R 2
@ PRB37
1 2
I_ADP_R
0_0402_5%
1 2
@ PCB43
ZTB03 0.22U_0402_25V6K
PRB38 PDB04 PCB44
0_0402_5% BAT54CW_SOT323-3 0.1U_0402_10V7K
1 2 3 1 2
+3.3V_VBUS_IN PUB02
1 SN74AHC1G08DCKR_SC70-5
5
[27] BATT_I ADP_I [27] 1 2 2 1

P
2 1 [27,46,47] HW_ACAVIN_NB IN1 4 1 2

4 ACAV_IN1 1 O 4
PRB40 2 2 HW_ACAV_IN [27,39,46,47]
+17.4V_BATT+ IN2
G
Close to EC ADP_I pin PRB39 0_0402_5% PRB42

1
100_0402_5% PRB41 0_0402_5%

3
@ PCB45 1 2 2 1 0_0402_5%
[46,47] AC_OK
0.1U_0402_25V6
2
PRB44
0_0402_5% PDB05
SDMK0340L-7-F_SOD323-2
DELL CONFIDENTIAL/PROPRIETARY
PWR_CHARGER
A B C D
A B C D E
Main Func = 3.3VALWP/5VALWP
1 1
EMI@ PL311
5A_Z120_25M_0805_2P PR302
1 2 499K_0402_1%
ENLDO_3V5V 1 2
@ PR301 PC307 +19VB
@ PJP301 0_0603_5% 0.1U_0402_10V7K
3V_VIN BST_3V1
1
150K_0402_1%
1 2 2 1 2
+19VB
PR303
JUMP_43X39
2200P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
4.7U_0805_25V6-K
0.1U_0402_25V6
4.7U_0805_25V6-K
PU301
5
1
82P_0402_50V8J
SY8286BRAC_QFN20_3X3
2
IN
IN
IN
IN
BS
1
1
EMI@ PC302
PC303
Mad@RF@ PC316
@EMI@ PC301
PC304
EMI@ PC305
EMI@ PC306
LX_3V 6 20 PL301
LX LX 1.5UH_9A_20%_7X7X3_M
2
7 19 LX_3V 1 2
GND LX +3VALWP
@EMI@ PR305
8 18
GND GND
4.7_1206_5%
9 17
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PG LDO +3VLP
1
PC310
PC311
PC313
@ PC314
PC312
10 16
NC NC
3VALWP
OUT
2
EN2
EN1
21
NC
FF
GND PC308 TDC 5 A

13V_SN 2
PR304 4.7U_0402_6.3V6M
Peak Current 7 A
11
12
13
14
15
680P_0603_50V7K
10K_0402_1%
@EMI@ PC309
1 2
+3VALWP 3.3V LDO 150mA~300mA OCP Current 8.4 A
ENLDO_3V5V
2 2
Vout is 3.234V~3.366V
POK [27,31,46]
2
POK
@ PJP302
150K_0402_1%
PC315 PR306 +3VALWP 1 2 +3VALW

1 2
1
@ PR307
1000P_0402_50V7K 1K_0402_1%
EN_3V 3V_FB 1 2 1 2 JUMP_43X118
EMI@ PL511
2
5A Z150 20M 1210_2P

1 2
1
150K_0402_1%
@ PJP502
@ PR308
@ PR501 +5VALWP 1 2 +5VALW

@ PJP501 0_0603_5% PC507 1 2
1 2 5V_VIN BST_5V 1 2 1 2 JUMP_43X79
+19VB 1 2
2
JUMP_43X79 0.1U_0402_10V7K @ PJP503

1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
1 2
PU501 1 2
82P_0402_50V8J
10U_0805_25V6K~D
0.1U_0402_25V6
10U_0805_25V6K~D
SY8180CRAC_QFN20_3X3 JUMP_43X79
1
1
Mad@RF@ PC518
PC504
EMI@ PC505
EMI@ PC506
@EMI@ PC501
EMI@ PC502
PC503
IN
IN
IN
IN
BS
LX_5V 6 20 PL501
2
LX LX 1.5UH_9A_20%_7X7X3_M
7 19 LX_5V 1 2
GND LX +5VALWP
8 18
4.7_1206_5%
GND GND
1
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
3 PC508 3
1
1
@EMI@
PR505
9 17 1 2
PC514
PC510
PC511
PC512
PC513
@ PC519
PG VCC
10 16
2
2
NC NC 4.7U_0402_6.3V6M
1 5V_SN
@ PR502
OUT
LDO
2
EN2
EN1
0_0402_5% 21
FF
EN_3V GND
680P_0603_50V7K
1 2
@EMI@
PC509
11
12
13
14
15
@ PR503 @ PR504
0_0402_5% +3VALWP 10K_0402_1% VL
2
EN_5V 1 2 1 2
ENLDO_3V5V
5V LDO 150mA~300mA
1
EN_5V
PC515
POK
4.7U_0402_6.3V6M
PR506
2.2K_0402_5%
5VALWP
2
150K_0402_1%
1 2
[27] EC_ON
TDC=7.56 A
1
@ PR510
@ PR507 PD501
0_0402_5% SDMK0340L-7-F_SOD323-2 Peak Current 10.8 A
[27] VCOUT0_PH#
1 2 1 2 OCP current 13 A
2
4.7U_0402_6.3V6M
1
1
1
150K_0402_1%
PC516
PR508 PC517 PR509

@ PR511
1M_0402_5% 1000P_0402_50V7K 1K_0402_1%

5V_FB 1 2 1 2
2
EN1 and EN2 dont't floating

4 4

PWR_3.3VALWP/5VALWP
A B C D E
DELL CONFIDE
A B C D
Main Func = +1.2V_DDR/+0.6V_DDR_VTT

PRM02
2.2_0603_5%
BST_1.2V_R 2 1 BST_1.2V
0.6Volt +/- 5%
1
EMI@ PLM11
5A_Z120_25M_0805_2P PCM12 +1.2VP TDC 1.2A
1 2 0.1U_0402_10V7K Peak Current 1.5A
2
1 +19VB 1
@ PJPM01
1 2 +19VB_1.2V UG_1.2V
+0.6VSP
1000P_0402_50V7K
1000P_0402_50V7K
JUMP_43X39
2200P_0402_50V7K
82P_0402_50V8J
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
10U_0603_6.3V6M
10U_0603_6.3V6M
1
LX_1.2V
@EMI@ PCM22
EMI@ PCM23
EMI@ PCM01
EMI@ PCM02
PCM03
PCM04
Mad@RF@ PCM24
1
PCM20
PCM21
16
17
18
19
20
2
PUM01
2
PHASE
UGATE
BOOT
VLDOIN
VTT
21
PAD
LG_1.2V 15 1
LGATE VTTGND
PRM03 14 2
PGND VTTSNS
4
18K_0402_1%
PQM01 2 1
D1
D1
D1
G1
PE642DT_PDFN8-10 CS_1.2V 13 3
PCM13 CS RT8207PGQW_WQFN20_3X3 GND
10 9 1U_0603_10V6K
D1 D2/S1 2 1 12 4 VTTREF_1.2V
PRM04 VDDP VTTREF
5.1_0603_5%
G2
High siede MOS:

S2
S2
S2
1 2 VDD_1.2V 11 5
VDD VDDQ +1.2VP
1
Vin30V +5VALW PGOOD
5
PCM19
Rds=8m(typ),12m(max)
TON
2 0.033U_0402_16V7K 2
FB
S5
S3
2
1
Vgs=1.3V(min),2.3V(max)
1
PRM05
Low siede MOS:
10
6
PCM14 2.2_0603_5%
1U_0603_10V6K
Rds=13m(typ),15.5m(max)
2
EN_0.6VSP
@ PCM17
EN_1.2V
FB_1.2V
TON_1.2V
2
220P_0402_50V8J
+5VALW 1 2
PRM10
60.4K_0402_1%
@ PRM06 PRM07 1 2
10K_0402_1% +19VB_1.2V 1 2 +1.2VP
1 2
+3VALW 453K_0402_1% +1.2V_MEM
1
1
For RT8207P @ PCM18 TDC 7.2 A
@ PRM08 PRM11
0_0402_5% 100K_0402_1%
0.1U_0402_25V6 Peak Current 10.3 A
2
PLM01 1 2 OCP Current 12.4 A
2
[27,52] SYSON
0.1U_0402_10V7K
1UH_11A_20%_7X7X3_M
1
1
PCM15
1 2
+1.2VP @ PRM12
0_0402_5%
2
@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@ PRM09
2
0_0402_5%
1 2
[26,27] SUSP#
1
1
PCM05
PCM06
PCM07
PCM08
PCM09
PCM10
0.1U_0402_10V7K
1
3 3
PCM16
@ PRM13
2
@ @EMI@ PRM01 0_0402_5% @ PJPM02

2
4.7_1206_5% 1 2 @ 1 2
[53] S0A3_GPIO +1.2VP 1 2 +1.2V_DDR
2
JUMP_43X118
1
@EMI@ PCM11
680P_0402_50V7K
2
@ PJPM03
1 2
+0.6VSP +0.6V_DDR_VTT
JUMP_43X39
Mode S3 S5 +1.2V_MEN +V_DDR_REF +0.6V_P

S5 L L of f off o
f
S3 L H on on of f
S0 H H on on on
4 4

Issued Date 2014/12/15 Title
2015/03/23 Deciphered Date
PWR_+1.2V_MEN/+0.6V_DDR_VTT
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom X00
A B C D
A B C D
Main Func = +VDDP_ALWP

The current limit is set to 4A, 6A or 8A when
this pin
is pull low, floating or pull high +VDDP_ALWP
TDC 4 A
OCP setting ILMT(pin3) Peak Current 5 A
OCP Current 6 A Fix by IC
4A Pull low TYP MAX
+3VALW Choke DCR 11.0mohm , 12.0mohm
6A Floating
1 1
8A Pull high
1
PRH06 PCH12
@ PRH05 10_0603_5% 0.1U_0402_10V7K
100K_0402_5% 1 2 BST_+VDDP_R 1 2
2
BST_+VDDP
EMI@ PLH11 7*7*3

5A_Z120_25M_0805_2P
1 2
DCR:6.2m(typ),7.2m(Max)
@ PJPH01 PUH01
+19VB_+VDDP
7
1 2 RT6226AGQUF_UQFN12_3X3 PLH01
+19VB 1 2 1UH_11A_20%_7X7X3_M
PGOOD
BOOT
JUMP_43X39 5 2 LX_+VDDP 1 2
82P_0402_50V8J
1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
+VDDP_ALWP
10U_0805_25V6K~D
10U_0805_25V6K~D
VIN LX
0.1U_0402_25V6
1
1
EMI@ PCH15
EMI@ PCH16
EMI@ PCH01
EMI@ PCH02
PCH03
PCH04
Mad@RF@ PCH17
1
@ PCH14
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10 FB_+VDDP 330P_0402_50V7K
2
FB
1
1
PCH05
PCH06
PCH07
PCH08
2+5VALW
2
6 11 1 @EMI@ PRH07
EN BYP PRH11 4.7_1206_5%
2
1
1
12 9 2.2_0402_1%
1U_0402_10V6K
1U_0402_10V6K
ILMT VCC
PGND
AGND
@ PRH12 PRH10
2
1
1
NC
1K_0402_1% 10_0402_1% @ PJPH02

PCH10
PCH11
R1 +VDDP_ALWP 1
1 2
2 +0.9VALW
Vfb=0.6
2
2
4
SNUB_+VDDP
@ PRH01 JUMP_43X118
0_0402_5% 1 2 @ PQH01
1 2 EN_+VDDP 2N7002KW_SOT323-3
PRH08 PRH13
LX_+VDDP
16.9K_0402_1% 1 2 1 3
S
[27,52] 0.9_1.8VALW_PWREN
1
@ PCH09 VDDP_SENSE_H [8]

ILMT_+VDDP
1
2 PRH02 0.1U_0402_25V6 0_0402_5% @ PCH19 2
1
1M_0402_1% PRH09 100P_0402_50V8J

R2
G
2
2
@EMI@ PCH13 31.6K_0402_1% @ PCH18
2
680P_0603_50V7K 100P_0402_50V8J
+3VALW
2
1 2
@ PRH15
0_0402_5%
1
@ PRH03 1 2
0_0402_5% VDDP_SENSE_L [8]
PRH14
0_0402_5%
2
Switching Fsw : 500K Hz +19VB

1
@ PRH04
0_0402_5% 1
+3VALW @ PRH16
2
750K_0402_1%
1
@ PRH18
100K_0402_5%
3
2N7002KDW_SOT363-6
1
2
@ PRH17
@ PQH02B
5 1M_0402_1%
6
2N7002KDW_SOT363-6
@ PRH19
4
0_0402_5%
@ PQH02A
1 2 2
[9,27,53] VGATE
1
1
@ PCH20
0.1U_0402_25V6
2
3 3
4 4

Title
PWR_+VDDP_ALWP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C X00
A B C D
A B C D
Main Func = +1.8VALWP / +2.5VP
@ PL1811 @ PJP1802
5A_Z120_25M_0805_2P 5*5*3 JUMP_43X79
1
1 2
PU1801
DCR:13m(typ),14m(Max) +1.8VALWP
1
1 2
2
+1.8V_ALW 1
11
10 TP 1 PL1801
@ PJP1801 PVIN NC 1UH_6.6A_20%_5X5X3_M
1 2 1.8VALW_VIN 9 2 LX_1.8VALW 1 2
+3VALW PVIN LX
+1.8VALWP
JUMP_43X39 8 3
2200P_0402_50V7K
SVIN LX
0.1U_0402_25V6
22U_0603_6.3V6M
82P_0402_50V8J
7 4
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
NC PGOOD
1
1
PC1807
PC1801
Mad@RF@ PC1808
Mad@RF@ PC1809
Mad@RF@ PC1810
1
6 5
PC1802
PC1803
PC1804
FB EN @ PR1803 @EMI@ PR1804 22P_0402_50V8J +1.8V_PRIM
2
2
4.7_1206_5%
100K_0402_5%
TDC 1.6 A
EN_1.8VALW
2
RT8061AZQW_WDFN10_3X3
2
Peak Current 2.3 A

1
FB=0.6Volt
+3VALW 2 1 OCP Current 3.5A f i x by I C
@ PR1801
0_0402_5% PR1807
1 2 20K_0402_1%
1
1
@EMI@ PC1806
0.1U_0402_10V7K
[27,51] 0.9_1.8VALW_PWREN
1
680P_0402_50V7K PR1805
PC1805
2
1
@ PR1802 10K_0402_1%
1M_0402_5%
2
2
2
FB_1.8VALW
2 2
1 2
+5VALW @ PJP2502
PR2504 1 2
+2.5VP +2.5V_MEM
1
2.2_0402_1% PC2504
1U_0402_10V6K JUMP_43X39
2
4 5
GND
@ PJP2501 VDD NC
2.5V_VIN
1 2 3 6 +2.5VP
+3VALW VIN VOUT
ADJ_2.5V
JUMP_43X39 2 7
10U_0805_10V6K
EN ADJ
1
+2.5V
1
1 8
PC2501
10U_0805_10V6K
PGOOD GND
1
PR2502 @ PC2505
TDC 0.45 A
2
21.5K_0402_1% 0.01U_0402_25V7K
PC2502
2
PU2501
Peak Current 0.57 A
2
RT9059GSP_SO8
@ PR2501
0_0402_5%
EN_2.5V Vref=0.8V
1
3 3
1 2
[27,50] SYSON
PR2503
10K_0402_1%
0.1U_0402_10V7K
1
@ PC2503
2
2
4 4

Title
PWR_+1.8V_PRIM and +2.5V
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C X00
A B C D
5 4 3 2 1
Main Func = APU_VDDCORE / APU_VDDSOC
@ PJPA01
+19VB_NB 2 1
2 1 +19VB
2200P_0402_50V7K
1000P_0402_50V7K
10U_0805_25V6K~D
10U_0805_25V6K~D
1000P_0402_50V7K
1000P_0402_50V7K
JUMP_43X79
PRA03=3.65K, PRZ03=732 and
1
PCZ01
EMI@ PCA01
EMI@ PCA02
PCA03
PCA04
EMI@ PCA05
EMI@ PCA06
PRZ01
330P_0402_50V7K 2K_0402_1%
PRZ10=191 to set loadline -2.1mV/A
UG_NB
1 2 1 2
2
PRZ02
[8] APU_VDDSOC_SEN
D PRZ03 PRZ04 PCZ02 PRZ05 D
10_0402_5% 732_0402_1% 36.5K_0402_1% 390P_0402_50V7K 34K_0402_1%
SH00001D800 (DCR:0.67m± 5 %)
1
1 2 1 2 1 2 1 2 1 2
+APU_VDDSOC
D1
G1
PQA01 PLA01
@ PRZ06 PCZ03 PCZ04 AON6992_DFN5X6D-8-7 0.15UH_MMD-06DZER15MEM1L__36A_20%
LX_NB 7 LX_NB 1 4
0_0402_5% 1000P_0402_50V7K 220P_0402_50V8J
D2/S1
VSUMP_NB
1 2 1 2 1
PRZ07
2 1 2
PRA01 PCA07 2 3
+APU_VDDSOC
1
@ PCZ05 301_0402_1% 2.2_0603_5% 0.22U_0402_16V7K @EMI@
2.61K_0402_1%
G2
S2
S2
S2
BST_NB
1
330P_0402_50V7K 1 2 1 2 PRA02
10K_0402_5%_ERTJ0ER103J
PRZ08
4.7_1206_5%
APU_VDDSOC
0.022U_0402_25V7K
6
0.1U_0603_50V7K
1 2
TDC 10A
680P_0603_50V7K
11K_0402_1%
PCZ06
1 2
1
PRA03
Peak Current 13A
1 2
PCZ07
3.65K_0603_1%
VSUMP_NB 1
PRZ09
LG_NB
@EMI@ 2 OCP current 19A
PCA08
2
2
PRZ10 PRA04
2
FSW=400kHz
PHA01
191_0402_1% PRZ10 set 191 ohm to OCP 19A 1_0402_1%

VSUMN_NB 1 2
VSUMN_NB
2
1 2
1
@ PRZ11 @ PCZ09
LG_NB
PHA01 near APU_CORE_NB choke 100_0402_1% 220P_0402_50V8J
PCZ08 1 2 1 2
LX_NB
2
0.1U_0603_50V7K
UG_NB
PRZ12 BST_NB
@ PJPZ01
150K_0402_1% 13.3K_0402_1% PRZ13 2 1
@ PRZ47 1 2 1 2 2 1
1 2 ENABLE_APU
JUMP_43X79
41
40
39
38
37
36
35
34
33
32
31
[50] S0A3_GPIO 1 2 PUZ01

0_0402_5% +19VB_APU EMI@ PLZ01
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
@ PHA02 470K_0402_5%_TSM0B474J4702RE 5A Z150 20M 1210_2P

+19VB_APU 1 2
+19VB
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
BST2_APU 1 1
1 30
33U_25V_M
33U_25V_M
0.1U_0402_25V6K
0.1U_0402_25V6K
PHA02 near APU_CORE_NB H/S mos NTC_NB BOOT2 + +
PCZ12
PCZ10
IMON_NB UG2_APU
1 2 2 29
IMON_NB UGATE2
1
PCZ11 1000P_0402_50V7K
PCZ19
PCZ14
PCZ15
PCZ13
@EMI@ PCZ16
EMI@ PCZ17
@EMI@ PCZ20
@EMI@ PCZ18
C
3 28 LX2_APU 2 2 C
PRZ14 133K_0402_1% [8] APU_SVC SVC PHASE2
1 2
LG2_APU
2
4 27 +5VS
[8,10,27,46,48] H_PROCHOT# VR_HOT_L LGATE2
@ PRZ15 100K_0402_1% UG2_APU
+3VS 1 2 5 26
[8] APU_SVD SVD VDDP
VDDIO_APU ISL62771HRTZ-T_TQFN40_5X5 PRZ17
1 2 6 25 1 2 PQZ01 PQZ02
+1.8VS VDDIO VDD 1_0603_5% AON6994_DFN5X6D-8-7 AON6994_DFN5X6D-8-7
1U_0603_10V6K
LG1_APU
1
@ PRZ16 7 24
[8] APU_SVT SVT LGATE1 SH00001D800 (DCR:0.67m± 5 %)
1
1
0_0402_5% PCZ21 @ PRZ19
1U_0603_10V6K
1 2ENABLE_APU8 23 LX1_APU
D1
G1
D1
G1
[27] VR_ON LX2_APU
2
ENABLE PHASE1
PCZ22
PCZ23
0.1U_0402_25V6K PLZ02
UG1_APU
2
0_0402_5% 9 22 0.15UH_MMD-06DZER15MEM1L__36A_20%
[8] APU_PWRGD PWROK UGATE1 LX2_APU
PCZ24 7 7 1 4
IMON_APU 10 BST1_APU PRZ21 D2/S1 D2/S1
1 2
IMON BOOT1
21
+3VS BST2_APU
1 2
0.22U_0402_16V7K
1 2 PRZ22 2 3
+APU_VDDCORE
PRZ20
@EMI@ 10K_0402_1%
PGOOD
G2
G2
133K_0402_1%
S2
S2
S2
S2
S2
S2
ISEN2_APU
ISUMN
ISUMP
1
COMP
ISEN2
ISEN1
2 1
VSEN
PRZ23
NTC
RTN
1 2 PCZ25 2.2_0603_5% 4.7_1206_5%
FB
6
1
1000P_0402_50V7K PRZ27
PRZ25 PRZ26 3.65K_0603_1%
VSUM+_APU 1
11
12
13
14
15
16
17
18
19
20
150K_0402_1% 13.3K_0402_1% PRZ24 @EMI@ 2
1 2
1 2 1 2 100K_0402_5% PCZ26
LG2_APU
680P_0603_50V7K
2
PRZ28
1_0402_1%
PHZ01 near APU_CORE H/S mos VSUM-_APU
2
1 2 VGATE [9,27,51] 1 2
PCZ27
@ PHZ01 0.22U_0402_16V7K
2 1 ISEN2_APU
470K_0402_5%_TSM0B474J4702RE
PCZ28
APU_VDDCORE (FP5)
0.22U_0402_16V7K
VSUM-_APU ISEN1_APU TDC 35A
2 1
Peak Current 45A
OCP current 57A
PCZ30
PCZ29 PRZ29 150P_0402_50V8J @ PRZ30
VSUM+_APU
1000P_0402_50V7K 301_0402_1%
1 2 1 2 1 2
210K_0402_1%
1 2
FSW=400kHz
330P_0402_50V7K
+19VB_APU
@ PCZ31
2.61K_0402_1%
1
B PRZ31 PRZ34 PCZ33 B

10K_0402_5%_ERTJ0ER103J
+19VB_APU
0.033U_0402_16V7K
0.15U_0603_16V7K
PRZ32
698_0402_1% 36.5K_0402_1% 390P_0402_50V7K

11K_0402_1%
1
1 2 1 2 1 2
PCZ32
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
10U_0805_25V6K~D
2
1
1
PRZ33
PCZ34
33U_D2_25VM_R40M
33U_D2_25VM_R40M
0.1U_0402_25V6K
0.1U_0402_25V6K
1 1
1 2
PRZ35 PCZ42 + +
@EMI@ PCZ35
EMI@ PCZ45
@EMI@ PCZ39
@EMI@ PCZ40
PCZ37
PCZ36
2
1
PCZ43
PCZ44
PCZ41
PCZ38
2K_0402_1% 330P_0402_50V7K
2
PRZ45=3.65K, PRZ31=698 and 1 2 1 2

PHZ02 near APU_CORE choke
2
2@ 2@
PRZ36=340 to set loadline -0.7mV/A
PHZ02
PRZ36 PRZ37
UG1_APU
2
340_0402_1% 10_0402_5%
VSUM-_APU 1 2 1 2 +APU_VDDCORE
PQZ03 PQZ04
@ PCZ47 @ PRZ38 AON6994_DFN5X6D-8-7 AON6994_DFN5X6D-8-7
1
@ PRZ39 820P_0402_50V7K 0_0402_5%

SH00001D800 (DCR:0.67m± 5 %)
2
PCZ46 100_0402_1% 1 2
0.1U_0603_50V7K 1 2 1 2 APU_VDDCR_SEN [8]
D1
G1
D1
G1
LX1_APU
2
PLZ03
0.15UH_MMD-06DZER15MEM1L__36A_20%
PRZ36 set 340 ohm to OCP 57A 1 2 7 7 LX1_APU 1 4
PCZ48
PRZ41 D2/S1 D2/S1
APU_VDD_RUN_FB_L [8]
+APU_VDDCORE
0.01U_0402_25V7K
PRZ43 0.22U_0402_16V7K
BST1_APU
1 2 1 2 2 3
0_0402_5% 10_0402_5% PRZ42
1
PCZ49
@ PRZ40 1 2 @EMI@ ISEN1_APU 10K_0402_1%

G2
G2
S2
S2
S2
S2
S2
S2
PRZ44 2 1
2.2_0603_5% 4.7_1206_5%
2
PRZ45
3.65K_0603_1%
VSUM+_APU 1 2
@EMI@
1 2
PCZ50
LG1_APU
680P_0603_50V7K
PRZ46
1_0402_1%
VSUM-_APU
2
1 2
A A

PWR_APU_CORE/APU_CORE_NB
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
5 4 3 2 1
A B C D E
Main Func = APU/ VGA / APU_SOC MLCC

+APU_VDDCORE
Total APU_VDDCORE Output Capacitor: +APU_VDDSOC
3 X 470uF_D2 Total APU_VDDSOC Output Capacitor:
12 X 22uF_0603 + 16 X 22uF_0603(EE side) 2 X 470uF_D2
1 X 180P_0402==> EE side 7X 22uF_0603 + 7 X 22uF_0603(EE side)
1 X 1uF_402==> EE side
470U_X_2VY_R9M
470U_X_2VY_R9M
470U_X_2VY_R9M
470U_X_2VY_R9M
1 1 1 1 1 1 1 X 180P_0402==> EE side
470U_X_2VY_R9M
470U_X_2VY_R9M
+ + + + + +
PCA171
PCA172
PCZ171
PCZ172
PCZ173
PCZ174
2 2 2 2 2 2
1 @ 1
+APU_VDDCORE +APU_VDDSOC
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PCA101
PCA102
PCA103
PCA104
PCA105
PCA106
PCA107
PCA108
PCA109
PCA110
PCZ101
PCZ102
PCZ103
PCZ104
PCZ105
PCZ106
PCZ107
PCZ108
PCZ109
PCZ110
2
2
@ @ @ @ @
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PCZ111
PCZ112
PCZ113
PCZ114
PCZ115
PCZ116
PCZ117
PCZ118
PCZ119
PCZ120
2
@ @ @ @ @ @
2 2
3 3
+VGA_CORE
1 1
560U_D2_2VM_R4.5M
560U_D2_2VM_R4.5M
+ +
VGA@ PCV171
VGA@ PCV172
2 2
For VGACORE
4 4

Issued Date 2014/11/05 2014/12/15 Title
Deciphered Date
PWR_APU&VGA & NB MLCC
A B C D E
5 4 3 2 1
Main Func = VGA CORE

@ PJPV01
2 1
2 1
+19VB_VGA JUMP_43X79
VGA@EMI@ PLV11
5A Z150 20M 1210_2P
2 1 +19VB
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
UG2_VGA
0.1U_0402_25V6K
0.1U_0402_25V6K
10U_0805_25V6K~D
10U_0805_25V6K~D
1
1
1
VGA@ PCV01
VGA@ PCV02
PCV03
PCV35
@EMI@ PCV04
@VGA@EMI@ PCV05
@EMI@ PCV06
VGA@EMI@ PCV07
VGA@ PQV03
G1
D1
D AON6994_DFN5X6D-8-7 D
2
VGA@
VGA@
7
D2/S1
SH000011H00 (DCR:0.98m± 5 %)
G2
S2
S2
S2
VGA@ PLV02
32.4K_0402_1%
6
10K_0402_1%
10K_0402_1%
0.22UH_24A_20%_7X7X4_MOLDING
LX2_VGA 4 1
LG2_VGA
+VGA_CORE
VGA@ PRV03 3 2
UG2_VGA @EMI@ ISEN2_VGA 10K_0402_1%
1
PRV06 2 1
2
2
@ PRV02
VGA@ PRV04
VGA@ PRV05
4.7_1206_5%
2
VGA@ PRV07
2
+5VALW PCV08 VGA@ 3.65K_0603_1%
VSUM+_VGA 2
VGA@ PQV04 0.22U_0402_16V7K @EMI@ 1
G1
D1
1 2
AON6994_DFN5X6D-8-7 PCV09
1
680P_0603_50V7K VGA@ PRV08
2
7 1_0402_1%
D2/S1 VSUM-_VGA 2 1
PRV01 @
2
0_0603_5%
VGA@
41
40
39
38
37
36
35
34
33
32
31
G2
S2
S2
S2
PUV01
1
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
BST2_VGA
VGA@ PRV10 100K_0402_1%
2 1 1 30 BST2_VGA
VGA@ PRV09 100K_0402_1% NTC_NB BOOT2 VGA_CORE (M2-50)
UG2_VGA
2 1 2
IMON_NB UGATE2
29 TDC 40A
3 28 LX2_VGA Peak Current 60A
[39] SVI2_SVC SVC PHASE2
LG2_VGA
LG2_VGA
+5VALW +19VB_VGA OCP current 72A
4 27
VR_HOT_L LGATE2
5 26
[39] SVI2_SVD SVD ISL62771HRTZ-T_TQFN40_5X5 VDDP VGA@ PRV13
FSW=300kHz
1 2 VGA@ PRV12 VDDIO_VGA6 25 2 1
0_0402_5%
+1.8VGS VDDIO VDD 1_0603_5%
1U_0603_10V6K
LG1_VGA UG1_VGA
1
@ PRV14 0_0402_5% 7 24
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
[39] SVI2_SVT
10K_0402_5% SVT LGATE1
1
C C
1 2
1U_0603_10V6K
VGA@ PRV15 ENABLE_VGA
0.1U_0402_25V6
0.1U_0402_25V6
+3VGS 1 2 8 23
LX1_VGA
VGA@ PCV11
PCV12
10U_0805_25V6K~D
10U_0805_25V6K~D
[10,26,57] PXS_PWREN
2
ENABLE PHASE1
1
VGA@ PCV10
PWRGD_VGA UG1_VGA
2
1
9 22
VGA@ PCV13
VGA@ PCV14
PCV15
PCV36
@EMI@ PCV16
@VGA@EMI@ PCV17
@EMI@ PCV18
PCV19
0.1U_0402_25V6K
G1
D1
PWROK UGATE1
IMON_VGA 10 BST1_VGA
+3VS
VGA@
2 1 21 VGA@ PQV01
2
IMON BOOT1 AON6994_DFN5X6D-8-7 7
D2/S1
VGA@
VGA@
VGA@EMI@
VGA@ PRV16
PGOOD
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VSEN
133K_0402_1%
NTC
RTN
2 1
G2
FB
S2
S2
S2
1
VGA@ PCV20 VGA@ PRV18 VGA@ PRV19 SH000011H00 (DCR:0.98m± 5 %)

11
12
13
14
15
16
17
18
19
20
1000P_0402_50V7K 150K_0402_1% 13.3K_0402_1% VGA@ PRV17 [10] PWRGD_VGA VGA@ PLV01

ENABLE_VGA
2 1 2 1 100K_0402_1% 0.22UH_24A_20%_7X7X4_MOLDING
@ PRV20
LX1_VGA
2
0_0402_5% 4 1
PWRGD_VGA LG1_VGA
2 1
1 2
VGA@ PRV22 3 2
+VGA_CORE
[27,56] DGPU_PWROK @EMI@ 10K_0402_1%
ISEN1_VGA 2
1
@ PHV01 VGA@ PCV22 PRV23 1
UG1_VGA
1
470K_0402_5%_TSM0B474J4702RE 0.22U_0402_16V7K 4.7_1206_5%

0.22U_0402_16V7K
ISEN2_VGA
2
2 1
VGA@ PCV37
VGA@ PRV24
PCV21 VGA@ 3.65K_0603_1%
VSUM+_VGA
2
VGA@ PCV23 0.22U_0402_16V7K @EMI@ 2 1

1
1 2
0.22U_0402_16V7K PCV24
G1
D1
VSUM-_VGA 2 1 ISEN1_VGA
VGA@ PQV02 680P_0603_50V7K VGA@ PRV25
2
1_0402_1%
7 VSUM-_VGA 2 1
VGA@ VGA@ VGA@ PCV26 AON6994_DFN5X6D-8-7 PRV21 @
2
PCV25 PRV26 180P_0402_50V8J @ PRV27 D2/S1

0_0603_5%
1000P_0402_50V7K 301_0402_1% 121K_0402_1%
VSUM+_VGA
1 2 1 2 1 2 1 2
G2
S2
S2
S2
1
330P_0402_50V7K
@ PCV27
VGA@ VGA@
2.61K_0402_1%
BST1_VGA
3
6
1
VGA@ PRV29 PRV31 PCV29

10K_0402_5%_ERTJ0ER103J
0.15U_0603_16V7K
VGA@ PRV28
0.033U_0402_16V7K
1.37K_0402_1% 22.1K_0402_1% 390P_0402_50V7K

11K_0402_1%
1
1 2 1 2 1 2
2
1
1
VGA@ PRV30
VGA@ PCV28
VGA@ PCV30
LG1_VGA
VGA@ VGA@
1 2
PRV32 PCV31
2
2
VGA@ PHV02
2K_0402_1% 330P_0402_50V7K
2
1 2 1 2
B B
VGA@ PRV33
2
665_0402_1%
VSUM-_VGA
1 2
@ PRV34
1
VGA@ @ PRV35 0_0402_5%

PCV32 100_0402_1% 2 1
0.1U_0603_50V7K 1 2 1 2 VCCSENSE_VGA [39]
2
@ PRV36
@ PCV33 0_0402_5%
820P_0402_50V7K 2 1
VSSSENSE_VGA [39]
0.01U_0402_25V7K
1
PCV34
2
VGA@
A A

PWR_VGA_CORE
5 4 3 2 1
A B C D
Main Func = +1.35VGPUP
OCP setting ILMT(pin3)

4A Pull low
1 1
6A Floating
8A Pull high
+3VS
+1.35VGPUP
TDC 4.3 A
Peak Current 5.3 A
1
@ PRW05
100K_0402_5% OCP Current 8 A Fix by IC
VGA@ PRW06 VGA@ PCW12
TYP MAX
Choke DCR 11.0mohm , 12.0mohm
2
10_0603_5% 0.1U_0402_10V7K
BST_+1.35VGPU1 2 BST_+1.35VGPU_R 1 2 7*7*3
DCR:6.2m(typ),7.2m(Max)
VGA@EMI@ PLW11
5A_Z120_25M_0805_2P @ PJPW02
1 2 VGA@ PUW01 +1.35VGPUP 1
1 2
2 +1.35V_MEM_GFX
7
RT6226AGQUF_UQFN12_3X3
VGA@ PLW01 JUMP_43X118
PGOOD
BOOT
@ PJPW01 1UH_6.6A_20%_5X5X3_M
1 2 +19VB_+1.35VGPU 5 2 LX_+1.35VGPU 1 2
+19VB 1 2 VIN LX +1.35VGPUP
0.1U_0402_25V6
82P_0402_50V8J
1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K~D
10U_0805_25V6K~D
JUMP_43X39
1
@VGA@ PCW14
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
10 330P_0402_50V7K
VGA@EMI@ PCW15
VGA@EMI@ PCW16
VGA@EMI@ PCW02
VGA@EMI@ PCW01
VGA@ PCW03
VGA@ PCW04
Mad@RF@ PCW17
FB
1
1
@VGA@EMI@
VGA@ PCW05
VGA@ PCW06
VGA@ PCW07
VGA@ PCW08
2+5VALW
1 2
6 11 1 PRW07
2
EN BYP PRW11 4.7_1206_5%
2
12 9 2.2_0402_1% @VGA@ PRW12
ILMT VCC
PGND
AGND
1K_0402_1%
1U_0402_10V6K
1U_0402_10V6K
2
1
1
NC
VGA@ PCW10
VGA@ PCW11
SNUB_+1.35VGPU
2 Vfb=0.6 2
2
R1
LIMT_+1.35VGPU
FB__+1.35VGPU
4
1 2
VGA@ PRW09
LX_+1.35VGPU
VGA@ 39.2K_0402_1%
VGA@ PRW01 PRW10
1
0_0402_5% @VGA@EMI@ 31.6K_0402_1%

1 2 EN_+1.35VGPU PCW13
R2
[27,55] DGPU_PWROK 680P_0603_50V7K
2
2
1
@ PCW09
VGA@ PRW02 0.1U_0402_25V6
+3VALW Switching Fsw : 500K Hz
1M_0402_1%
2
2
VGA@
PRW03
0_0402_5%
2
1
@ PRW04
0_0402_5%
2
3 3
4 4

2014/03/31 2015/04/30 Title
PWR_+1.35VGPUP
A B C D
A B C D
Main Func = +0.95VSDGPUP
1 2
+5VALW @ PJPF02
VGA@ PRF04 1 2
+0.95VSDGPUP +0.95VSDGPU
1
2.2_0402_1% VGA@ PCF04

1 1U_0402_10V6K JUMP_43X39 1
2
4 5
GND
@ PJPF01 VDD NC
0.95V_VIN
1 2 3 6 +0.95VSDGPUP
+1.2V_DDR VIN VOUT
ADJ_0.95V
JUMP_43X39 2 7
22U_0603_6.3V6M
EN ADJ
1
+0.95VSDGPU
1
1 8 VGA@
VGA@ PCF01
22U_0603_6.3V6M
22U_0603_6.3V6M
PGOOD GND
1
PRF02 @ PCF05
TDC 1.4 A
2
2K_0402_1% 0.01U_0402_25V7K
VGA@ PCF02
VGA@ PCF06
2
PUF01
Peak Current 2 A
2
RT9059GSP_SO8
VGA@
VGA@ PRF01
47K_0402_5%
EN_0.95V Vref=0.8V
1
1 2
[10,26,55] PXS_PWREN
VGA@
PRF03
10K_0402_1%
0.1U_0402_10V7K
1
VGA@ PCF03
2
2
3 3
4 4

Title
PWR_+0.95VSDGPU
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom X00
A B C D
5 4 3 2 1
D Power block D
APU OTP
Page 46
Turn Off
Input +19VB
DC IN +3VALWP: TDC:5A
Switch +5VALWP: TDC:7.56A EC_ON
Page 46,47
SY8286BRAC/SY8180CRAC Page 49
USB Type C
C +3VALW +1.8V_ALWP: TDC:1.6A 0.9_1.8VALW_PWREN C
RT8061AZQW
Page 52
CHARGER (Buck-Boost)
CV:13.5V CC:1.84A (3S1P) - 42Wh
ISL9538HRTZ-T
+3VALW +2.5VP: TDC:0.45A SYSON
RT9059GSP
Page 48 Page 52
Battery
+VGA_CORE
B
PXS_PWREN TDC: 40A B
ISL62771HRTZ-T +VDDP_ALWP: TDC:4A 0.9_1.8VALW_PWREN

Page 55
RT6226AGQUF Page 51
+1.2VP/+0.6VSP: TDC:7.2A/1.2A SYSON

+APU_CORE RT8207PGQW
VR_ON TDC: 35A Page 50
ISL62771HRTZ-T
Page 53
+1.2V_DDR +0.95VSDGPU: TDC:1.4A PXS_PWREN
RT9059GSP
Page 57
+APU_CORE_NB +1.35VGPUP: TDC:4.3A

VR_ON TDC: 10A PXS_PWREN
RT6226AGQUF
ISL62771HRTZ-T Page 56
A Page 53 A

PWR_POWER BLOCK DIAGRAM
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List )

Request Issue Solution
Item Page# Title Date Owner Description Description Rev.
D D
1 P46 PWR 20170704 COMPAL EMI test result for change capacity change PC2,PC4 from 0.1u to 2200p 0.2(X01)
2 P55 PWR 20170704 COMPAL Request by EE for adjust DGPU sequence change PRV15 from 0 to 10K and add PCV37 0.22u 0.2(X01)
3 P48 PWR 20170704 COMPAL support FTRD 1.6 and LPS from EC request change PRV15 from 0 to 10K and add PCV37 0.22u 0.2(X01)
4 P47 PWR 20170704 COMPAL add fast close MOS pop PQS06,PQS07,PQS13,PRS10,PRS15,PRS18,PRS36,PRS37,PRS38,PRS40.PRS41 0.2(X01)
5 P46 PWR 20170710 COMPAL for LPS SW solution add PQ20 0.2(X01)
6 P51 PWR 20170717 COMPAL adjust output to 0.9V by EE request change PRH08 from 10.7K to 15.8K 0.2(X01)
7 P46 PWR 20170917 COMPAL follow Intel design pop PR53 and unpop PR51 0.3(X02)
8 P46 PWR 20170917 COMPAL follow Intel design unpop PC23,PQS11,PRS30,PCS20 0.3(X02)
C
add PR100 1M C
9 P54 PWR 20170918 COMPAL for PSI_Dynamic test with AMD validation pop PCA106,PCA107 0.3(X02)
10 P48 PWR 20170918 COMPAL follow Intel design unpop PCB46 0.3(X02)
11 P51 PWR 20170918 COMPAL for VDDP_Static test with AMD validation change PRH08 from 15.8K to 16.9K 0.3(X02)
12
13
P46 PWR 20170920
COMPAL follow Intel design change PC7,PC10 from 0.1U_10V to 0.1U_50V 0.3(X02)
B B
A A

Changed-List PWR History
5 4 3 2 1
5 4 3 2 1
DVT1 change list

BOM change list
D D
C
GPIO change list C
B B
Design change list
A A

Changed-List HW History
Date:
Da te : Thursday, November 09, 2017 Sheet
Shee t 60 of 61
5 4 3 2 1
5 4 3 2 1
DVT2 change list

BOM change list
D D
GPIO change list
C C
Design change list www.laptoprepairsecrets.com
B B
A A

Changed-List HW History2
Da te : Thursday, November 09, 2017 Shee t 61 of 61
5 4 3 2 1

Dell Inspiron 15 5575 Compal CAL51 LA-F121P Rev 1.00 (A00)

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Dell Inspiron 15 5575 Compal CAL51 LA-F121P Rev 1.00 (A00)

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5 4 3 2 1

PROJECT NAME : CAL51/CLA61/CAL71

EMI@/ESD@/RF@ : EMI, ESD ,RF Component

Typec@EMI@/Tyepc@ESD@: EMI/ESD typec component

CRT@:D-sub TPM@:TPM FFS@:free fall sensor A

HDT@ /Debug use

Memory Bus 2400MHZ support two CHs

VRAM 256M*16 1.2V DDR4

eDP Conn. DP0 eDP DP1.2 USB2.0

Card Reader On IO/B

SATA ODD Conn. Port 1 SATA1.0

TPM 750 ALC3234(default)

TPM 650 LPC Bus

Int.KBD ENE KBC PS/2

FAN CONN Page 24

I/O BOARD POWER BOARD ODD BOARD

interposer board(M2_Sata) CRT BOARD(Reserve) Issued Date Deciphered Date

Platform Power Sequence 8 U4 AO4354

+5V_USB_PWR1 UL2 SY6288C20AAC

www.laptoprepairsecrets.com 121 74 116 95 127

Security Classification Compal Secret Data Compal Electronics, Inc.

Board ID Table for AD channel

Lane 5 RV2 NA Lane 5 10/100 LAN(GIGA RESERVE)

Lane 6 RV2 NA Lane 6 NGFF Card (WLAN)

Lane 7 RV2 NA RV2 Sata only Lane 7 use sata interface

Symbol Note : CLKOUT_PCIE1 10/100 LAN(GIGA RESERVE) SATA0 HDD

CLKOUT_PCIE3 NVME SSD

Security Classification Compal Secret Data Compal Electronics, Inc.

SMBus Block Diagram RPC64

BC20 APU_SCLK0 253 DIMM1

RC25 www.laptoprepairsecrets.com +3VS

DIS@ RV5 45.3K

R32 DIS@ RV6 45.3K

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

K11 P_GFX_RXP4 P_GFX_TXP4 K2

C PCIE_ARX_DTX_P0 N10 N2 PCIE_ATX_DRX_P0 C

PCIE_ARX_DTX_P1 L10 P4 PCIE_ATX_DRX_P1

place near UC1

FP5 REV 0.90

UC1 UC1 UC1

SA0000ASA2L SA0000ASA3L SA0000ASA4L

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU UC1A UC1I

EVENT# pull high

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

SA00004BV00 3.3VALW input AGPIO40 AU6

MC74VHC1G08DFT2G SC70 5P RC51 RC52

RC56 1 PTP@ 2 10K_0402_5% AGPIO8

RC618 MODS@ 0_0402_5%

for Modern standby

Main Func = CPU

AN3 GPP_CLK5P T114 2 1

USB20_0_P0 AE7 AD2 USB3_DP3_MTX_DRX_P2

[31,33] CCG4_APU_USBC_SCL USB3_ARX_DTX_0_N2 [23]

TYPEC@ AM7 USBC_I2C_SDA AA2

[31,33] CCG4_APU_USBC_SDA APU_DP2_P1

APU_DP2_N1 APU_DP2_P1 [36]

4.7K_0402_5% 1 TYPEC@2 RC94

1 TYPEC@2 RC95 APU_USBC_SDA T116 2 2