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Lecture 1 Ntroductiom
Lecture 1 Ntroductiom
Semiconductor Processing
Assignment (10%)
Attendance (0%)
[중요]
- 커닝 및 수업 방해 등 학습태도가 나쁜 경우 “F” 학점
2
Note
Reference Books:
S. E. Kim, Lecture note (All figures and tables are from the books, otherwise it is noted.)
− 제공하는 강의 노트는 교과서가 아님!
3
Schedule
Week Date Topic Comments
1 02/26 Introduction
- Device fabrication flow
2 03/4 - Plasma Basic & Vacuum
- Silicon Wafer Manufacturing
3 03/11 - Wafer Cleaning
4 03/18 Oxidation
5 03/25 Diffusion
10 04/29 Lithography
14 05/27 Metallization
15 06/03 Final Exam
Assignment
과제 제출 마감일 : 4월 24일 11:00PM
− 마감시간 이후는 제출 불허
과제 제출 방법 : e-class 과제 Tab
과제 작성 형식
− 분량: 최대 A4 용자 2장
− Format (Word 기준으로): Font =12 point / 줄 간격=1.5
− 페이지 맨 위에 반드시 이름과 학번 기입
과제 내용
− 2주차 ~ 7주차 강의 내용 중 하나를 선택
− 선택한 주제 관련하여 보고서 작성
Contents
Semiconductor Fabrication Flow
Wafer Size
Cleanroom Class
History of IC
6
Electronics
Electronic
Biomedical
Home
equipment
Appliances
7
Semiconductor Device Fabrication
8
Semiconductor Unit Processing
• Cleaning
• Oxidation
• Ion Implantation
Die (or Chip)
• Diffusion
• Lithography Wafer
• Etching
9
반도체 8대 공정 ?
① 세정 (Cleaning) 1) 웨이퍼 공정
② 이온 주입 (Ion Implantation) 2) 산화 공정
③ 확산 (Diffusion) 3) 포토리소그래피 공정
④ 산화 (Oxidation) 4) 식각 공정
⑤ 리소그래피 (Lithography) 5) 박막 공정
⑥ 식각 (Etching) 6) 금속배선 공정
10
Semiconductor Fabrication Flow
6. System Assembly
11
반도체 8대 공정 ?
2) 산화 공정
1) 웨이퍼 공정 8) 패키징 공정
3) 포토리소그래피 공정
4) 식각 공정
5) 박막 공정
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Semiconductor Fabrication Flow
transistor
Interconnect
[Cross-sectional view]
(Source: Lecture by M. Horowitz, J. Plummer, R. Howe, MOS Transistors, CMOS Logic Circuits, and Cheap, Powerful Computers)
13
Wafer Size
Wafer diameter
14
Cleanroom Class
Definition: Number of particles (which are larger than 0.5 µm diameter) per ft3
15
3 Factors in Semiconductor Processing
Circuit Design
& Architecture
Materials Fabrication
(Si, GaAs, SiC…) (Processing)
16
Transistors and Integrated Circuits (IC)
17
History of Transistor and Integrated Circuit
① Vacuum tube
1874: Solidstate rectifier by Braun
1906: Triode vacuum tube by DeForest
18
History of Transistor and Integrated Circuit
③ 1954 Bipolar Junction Transistor (Gordon Teal at Texas Instruments)
⑥ 1959 Metal Oxide Semiconductor field Effect Transistor, MOSFET (Mohamed Atalla
and Dawon Kahng at Bell labs)
20
History of Transistor and Integrated Circuit
21
Gordon Moore’s Prediction
"Cramming more components onto integrated circuits" (Electronics Magazine, 19 April 1965)
“The complexity for min. component costs has increased at a rate of roughly a factor of
two per year .....”
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Transistor per Die
23
Moore’s Law
(Source: https://en.wikipedia.org/wiki/Transistor_count)
24
CMOS (Complementary Metal Oxide Semiconductor)
“C" refers to the fact that the design uses pairs of transistors (NMOS and PMIOS) for
logic functions, only one of which is switched on at any time.
CMOS chips include microprocessor, microcontroller, SRAM, and other digital logic
circuits
25
MOSFET Structure
source drain
gate
M metal
O gate oxide
T n+
S
n+
p-Si
n-channel
FE electric field
(3) Current Flows
26
Transistor and Interconnect Structure
[MIM Capacitor]
Metal
Interconnect
Insulator (Dielectric)
Metal or Semiconductor
Contact
Transistor
27
Transistor and Interconnect Structure
(Ref. : Mark Bohr, Intel Senior Fellow, Intel Developer Forum 2012) 29